Searched refs:uint8_t (Results 226 - 250 of 1652) sorted by relevance

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/linux-master/fs/jffs2/
H A Djffs2_fs_i.h52 uint8_t usercompr;
/linux-master/fs/smb/client/
H A Dcifs_spnego.h27 uint8_t data[];
/linux-master/drivers/gpu/drm/amd/display/dc/link/hwss/
H A Dlink_hwss_dio_fixed_vs_pe_retimer.h31 uint8_t dp_dio_fixed_vs_pe_retimer_lane_cfg_to_hw_cfg(struct dc_link *link);
/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_ddc.h59 uint8_t *write_buf,
61 uint8_t *read_buf,
77 const uint8_t *data,
82 uint8_t *data,
H A Dlink_dp_training_fixed_vs_pe_retimer.h39 uint8_t lane_count);
H A Dlink_dp_dpia_bw.c75 static uint8_t get_bw_granularity(struct dc_link *link)
77 uint8_t bw_granularity = 0;
83 sizeof(uint8_t));
103 uint8_t bw_estimated_bw = 0;
109 sizeof(uint8_t));
116 uint8_t nrd_max_link_rate = 0;
122 sizeof(uint8_t));
129 uint8_t nrd_max_lane_count = 0;
135 sizeof(uint8_t));
163 static uint8_t get_lowest_dpia_inde
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce100/
H A Ddce100_hwseq.h45 bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dce110/
H A Ddce110_resource.h44 uint8_t num_virtual_links,
/linux-master/arch/x86/include/asm/
H A Dsetup_data.h18 uint8_t romdata[];
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v11_0_7_pptable.h135 uint8_t revision; //Revision = SMU_11_0_7_PP_OVERDRIVE_VERSION
136 uint8_t reserve[3]; //Zero filled field reserved for future use
139 uint8_t cap[SMU_11_0_7_MAX_ODFEATURE]; //OD feature support flags
165 uint8_t revision; //Revision = SMU_11_0_7_PP_POWERSAVINGCLOCK_VERSION
166 uint8_t reserve[3]; //Zero filled field reserved for future use
175 uint8_t table_revision; //For sienna_cichlid, table_revision = 2
182 uint8_t thermal_controller_type; //one of SMU_11_0_7_PP_THERMALCONTROLLER
H A Dsmu_v13_0_pptable.h107 uint8_t revision; //Revision = SMU_11_0_PP_OVERDRIVE_VERSION
108 uint8_t reserve[3]; //Zero filled field reserved for future use
111 uint8_t cap[SMU_13_0_MAX_ODFEATURE]; //OD feature support flags
132 uint8_t revision; //Revision = SMU_11_0_PP_POWERSAVINGCLOCK_VERSION
133 uint8_t reserve[3]; //Zero filled field reserved for future use
141 uint8_t table_revision;
148 uint8_t thermal_controller_type; //one of SMU_13_0_PP_THERMALCONTROLLER
H A Dsmu_v13_0_7_pptable.h144 uint8_t revision; //Revision = SMU_13_0_7_PP_OVERDRIVE_VERSION
145 uint8_t reserve[3]; //Zero filled field reserved for future use
148 uint8_t cap[SMU_13_0_7_MAX_ODFEATURE]; //OD feature support flags
174 uint8_t table_revision; //For PLUM_BONITO, table_revision = 2
175 uint8_t padding;
182 uint8_t thermal_controller_type; //one of SMU_13_0_7_PP_THERMALCONTROLLER
192 uint8_t padding1;
H A Dsmu_v11_0_pptable.h105 uint8_t revision; //Revision = SMU_11_0_PP_OVERDRIVE_VERSION
106 uint8_t reserve[3]; //Zero filled field reserved for future use
109 uint8_t cap[SMU_11_0_MAX_ODFEATURE]; //OD feature support flags
130 uint8_t revision; //Revision = SMU_11_0_PP_POWERSAVINGCLOCK_VERSION
131 uint8_t reserve[3]; //Zero filled field reserved for future use
139 uint8_t table_revision;
146 uint8_t thermal_controller_type; //one of SMU_11_0_PP_THERMALCONTROLLER
/linux-master/drivers/gpu/drm/amd/pm/inc/
H A Dsmu_v13_0_0_pptable.h144 uint8_t revision; //Revision = SMU_13_0_0_PP_OVERDRIVE_VERSION
145 uint8_t reserve[3]; //Zero filled field reserved for future use
148 uint8_t cap[SMU_13_0_0_MAX_ODFEATURE]; //OD feature support flags
174 uint8_t table_revision; //For SMU13, table_revision = 2
175 uint8_t padding;
182 uint8_t thermal_controller_type; //one of SMU_13_0_0_PP_THERMALCONTROLLER
192 uint8_t padding1;
/linux-master/drivers/gpu/drm/udl/
H A Dudl_transfer.c36 static inline u16 get_pixel_val16(const uint8_t *pixel, int log_bpp)
77 uint8_t **command_buffer_ptr,
78 const uint8_t *const cmd_buffer_end, int log_bpp)
83 uint8_t *cmd = *command_buffer_ptr;
87 uint8_t *raw_pixels_count_byte = NULL;
88 uint8_t *cmd_pixels_count_byte = NULL;
95 *cmd++ = (uint8_t) ((dev_addr >> 16) & 0xFF);
96 *cmd++ = (uint8_t) ((dev_addr >> 8) & 0xFF);
97 *cmd++ = (uint8_t) ((dev_addr) & 0xFF);
157 cmd = (uint8_t *) cmd_buffer_en
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/linux-master/tools/testing/selftests/net/tcp_ao/lib/
H A Daolib.h231 union tcp_addr addr, uint8_t prefix);
236 uint8_t vrf);
306 uint8_t prefix, int vrf, const char *password);
308 uint8_t prefix, int vrf, const char *password)
322 uint8_t prefix, uint8_t vrf,
323 uint8_t sndid, uint8_t rcvid, uint8_t maclen,
324 uint8_t keyflag
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/linux-master/fs/udf/
H A Dunicode.c42 static unicode_t get_utf16_char(const uint8_t *str_i, int str_i_max_len,
86 static int udf_name_conv_char(uint8_t *str_o, int str_o_max_len,
88 const uint8_t *str_i, int str_i_max_len,
148 uint8_t *str_o, int str_max_len,
149 const uint8_t *ocu, int ocu_len,
153 uint8_t cmp_id;
164 uint8_t ext[EXT_SIZE * NLS_MAX_CHARSET_SIZE + 1];
165 uint8_t crc[CRC_LEN];
272 uint8_t *ocu, int ocu_max_len,
273 const uint8_t *str_
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/linux-master/drivers/net/wireless/marvell/libertas/
H A Dtypes.h228 uint8_t firmwarestate;
229 uint8_t led;
230 uint8_t ledstate;
231 uint8_t ledarg;
246 uint8_t oui[3];
247 uint8_t type;
248 uint8_t subtype;
249 uint8_t version;
250 uint8_t active_protocol_id;
251 uint8_t active_metric_i
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/linux-master/drivers/gpu/drm/qxl/
H A Dqxl_dev.h243 uint8_t slots_start;
244 uint8_t slots_end;
245 uint8_t slot_gen_bits;
246 uint8_t slot_id_bits;
247 uint8_t slot_generation;
249 uint8_t client_present;
250 uint8_t client_capabilities[58];
350 uint8_t log_buf[QXL_LOG_BUF_SIZE];
368 uint8_t guest_capabilities[64];
385 uint8_t dat
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/linux-master/drivers/scsi/lpfc/
H A Dlpfc_sli4.h166 uint8_t qe_valid;
167 uint8_t mode; /* interrupt or polling */
231 uint8_t db_format;
234 uint8_t q_flag;
287 uint8_t duplex;
288 uint8_t status;
289 uint8_t type;
290 uint8_t number;
291 uint8_t fault;
292 uint8_t link_statu
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/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc_bios_types.h42 uint8_t (*get_connectors_number)(struct dc_bios *bios);
46 uint8_t connector_index);
142 uint8_t uc_pwr_on,
143 uint8_t pwrseq_instance,
144 uint8_t bypass_panel_control_wait);
156 uint8_t *dce_caps);
159 uint8_t *dce_caps);
175 uint8_t *bios;
178 uint8_t *bios_local_image;
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Datom.h143 uint8_t shift;
149 uint8_t name[STRLEN_LONG];
150 uint8_t vbios_pn[STRLEN_LONG];
152 uint8_t vbios_ver_str[STRLEN_NORMAL];
153 uint8_t date[STRLEN_NORMAL];
163 uint8_t *frev, uint8_t *crev, uint16_t *data_start);
165 uint8_t *frev, uint8_t *crev);
/linux-master/drivers/gpu/drm/amd/display/modules/hdcp/
H A Dhdcp_psp.h327 uint8_t display_handle;
332 uint8_t an_primary[TA_HDCP__HDCP1_AN_SIZE];
333 uint8_t aksv_primary[TA_HDCP__HDCP1_KSV_SIZE];
334 uint8_t ainfo_primary;
335 uint8_t an_secondary[TA_HDCP__HDCP1_AN_SIZE];
336 uint8_t aksv_secondary[TA_HDCP__HDCP1_KSV_SIZE];
337 uint8_t ainfo_secondary;
346 uint8_t bksv_primary[TA_HDCP__HDCP1_KSV_SIZE];
347 uint8_t bksv_secondary[TA_HDCP__HDCP1_KSV_SIZE];
348 uint8_t bcap
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/linux-master/drivers/hid/intel-ish-hid/ishtp/
H A Dclient.h46 uint8_t host_client_id;
47 uint8_t fw_client_id;
48 uint8_t ishtp_flow_ctrl_creds;
49 uint8_t out_flow_ctrl_creds;
113 int ishtp_fw_cl_by_id(struct ishtp_device *dev, uint8_t client_id);
136 uint8_t size);
/linux-master/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.c36 uint32_t value, uint32_t mask, uint8_t shift)
44 uint32_t addr, int n, uint8_t shift1,
67 uint8_t shift)
72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
90 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...)
104 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,

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