/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | nbio_v7_9.c | 41 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); 43 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); 426 adev->rmmio_remap.reg_offset =
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H A D | nbif_v6_3_1.c | 36 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); 38 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL);
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H A D | cik.c | 1124 u32 sh_num, u32 reg_offset) 1131 switch (reg_offset) { 1146 val = RREG32(reg_offset); 1155 switch (reg_offset) { 1192 idx = (reg_offset - mmGB_TILE_MODE0); 1210 idx = (reg_offset - mmGB_MACROTILE_MODE0); 1213 return RREG32(reg_offset); 1219 u32 sh_num, u32 reg_offset, u32 *value) 1227 if (reg_offset != cik_allowed_read_registers[i].reg_offset) 1122 cik_get_register_value(struct amdgpu_device *adev, bool indexed, u32 se_num, u32 sh_num, u32 reg_offset) argument 1218 cik_read_register(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 reg_offset, u32 *value) argument [all...] |
H A D | imu_v11_0_3.c | 117 reg = adev->reg_offset[entry->hwip][entry->instance][entry->segment] + entry->reg;
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/linux-master/drivers/perf/ |
H A D | marvell_cn10k_ddr_pmu.c | 441 u32 reg_offset; local 457 reg_offset = DDRC_PERF_CFG(counter); 462 writeq_relaxed(val, pmu->base + reg_offset);
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/linux-master/drivers/net/ethernet/chelsio/cxgb/ |
H A D | espi.c | 52 int ch_addr, int reg_offset, u32 wr_data) 57 V_REGISTER_OFFSET(reg_offset) | 51 tricn_write(adapter_t *adapter, int bundle_addr, int module_addr, int ch_addr, int reg_offset, u32 wr_data) argument
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/linux-master/drivers/phy/qualcomm/ |
H A D | phy-qcom-snps-femto-v2.c | 96 u8 reg_offset; member in struct:override_param_map 533 seq_entry->offset = map.reg_offset;
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/linux-master/drivers/perf/hisilicon/ |
H A D | hns3_pmu.c | 746 static u32 hns3_pmu_readl(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx) argument 748 u32 offset = hns3_pmu_get_offset(reg_offset, idx); 753 static void hns3_pmu_writel(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx, argument 756 u32 offset = hns3_pmu_get_offset(reg_offset, idx); 761 static u64 hns3_pmu_readq(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx) argument 763 u32 offset = hns3_pmu_get_offset(reg_offset, idx); 768 static void hns3_pmu_writeq(struct hns3_pmu *hns3_pmu, u32 reg_offset, u32 idx, argument 771 u32 offset = hns3_pmu_get_offset(reg_offset, idx);
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/linux-master/drivers/net/ethernet/8390/ |
H A D | zorro8390.c | 33 #define EI_SHIFT(x) (ei_local->reg_offset[x]) 377 ei_status.reg_offset = zorro8390_offsets;
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H A D | 8390.h | 103 u32 *reg_offset; /* Register mapping table */ member in struct:ei_device
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H A D | ax88796.c | 53 #define EI_SHIFT(x) (ei_local->reg_offset[(x)]) 895 ei_local->reg_offset = ax->plat->reg_offsets; 897 ei_local->reg_offset = ax->reg_offsets; 941 ei_local->reg_offset[0x1f] = ax->map2 - ei_local->mem;
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/linux-master/drivers/net/ipa/ |
H A D | ipa_mem.c | 120 iowrite32(val, ipa->reg_virt + reg_offset(reg)); 332 val = ioread32(ipa->reg_virt + reg_offset(reg));
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/linux-master/drivers/net/ethernet/intel/idpf/ |
H A D | idpf.h | 710 * @reg_offset: register offset value 715 resource_size_t reg_offset) 717 return (void __iomem *)(adapter->hw.hw_addr + reg_offset); 714 idpf_get_reg_addr(struct idpf_adapter *adapter, resource_size_t reg_offset) argument
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/linux-master/drivers/tty/serial/8250/ |
H A D | 8250_aspeed_vuart.c | 383 u32 reg_offset, u32 reg_mask) 394 if (regmap_read(regmap, reg_offset, &value)) { 381 aspeed_vuart_auto_configure_sirq_polarity( struct aspeed_vuart *vuart, struct device_node *syscon_np, u32 reg_offset, u32 reg_mask) argument
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/linux-master/drivers/tty/serial/ |
H A D | amba-pl011.c | 104 const u16 *reg_offset; member in struct:vendor_data 127 .reg_offset = pl011_std_offsets, 142 .reg_offset = pl011_std_offsets, 157 .reg_offset = pl011_std_offsets, 205 .reg_offset = pl011_st_offsets, 256 const u16 *reg_offset; member in struct:uart_amba_port 282 return uap->reg_offset[reg]; 2798 uap->reg_offset = vendor->reg_offset; 2918 uap->reg_offset [all...] |
/linux-master/drivers/gpu/drm/radeon/ |
H A D | rv770_dpm.h | 283 u16 reg_offset, u32 value);
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/linux-master/drivers/phy/broadcom/ |
H A D | phy-brcm-usb-init.c | 449 u32 reg_offset, u32 field) 454 brcm_usb_ctrl_unset(params->regs[BRCM_REGS_CTRL] + reg_offset, mask); 459 u32 reg_offset, u32 field) 464 brcm_usb_ctrl_set(params->regs[BRCM_REGS_CTRL] + reg_offset, mask); 448 usb_ctrl_unset_family(struct brcm_usb_init_params *params, u32 reg_offset, u32 field) argument 458 usb_ctrl_set_family(struct brcm_usb_init_params *params, u32 reg_offset, u32 field) argument
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/linux-master/sound/soc/fsl/ |
H A D | fsl_sai.h | 238 unsigned int reg_offset; member in struct:fsl_sai_soc_data
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/linux-master/drivers/mfd/ |
H A D | qcom-pm8008.c | 157 type->type_reg_offset = pm8008_irqs[i].reg_offset;
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H A D | wcd934x.c | 21 .reg_offset = (_off), \
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/linux-master/drivers/gpio/ |
H A D | gpio-zynq.c | 271 unsigned int reg_offset, bank_num, bank_pin_num; local 279 reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num); 281 reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num); 292 writel_relaxed(state, gpio->base_addr + reg_offset);
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/linux-master/drivers/gpu/drm/amd/include/ |
H A D | kgd_kfd_interface.h | 314 uint32_t *reg_offset,
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/linux-master/sound/soc/amd/acp/ |
H A D | amd.h | 151 u32 reg_offset; member in struct:acp_stream
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/linux-master/drivers/crypto/marvell/octeontx2/ |
H A D | otx2_cptvf_mbox.c | 116 rsp_reg->reg_offset, rsp_reg->is_write,
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/linux-master/drivers/platform/x86/amd/pmc/ |
H A D | pmc.c | 169 static inline u32 amd_pmc_reg_read(struct amd_pmc_dev *dev, int reg_offset) argument 171 return ioread32(dev->regbase + reg_offset); 174 static inline void amd_pmc_reg_write(struct amd_pmc_dev *dev, int reg_offset, u32 val) argument 176 iowrite32(val, dev->regbase + reg_offset);
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