Searched refs:reg (Results 226 - 250 of 7209) sorted by relevance

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/linux-master/drivers/media/pci/mgb4/
H A Dmgb4_i2c.c13 static int read_r16(struct i2c_client *client, u16 reg, u8 *val, int len) argument
31 buf[0] = (reg >> 8) & 0xff;
32 buf[1] = (reg >> 0) & 0xff;
43 static int write_r16(struct i2c_client *client, u16 reg, const u8 *val, int len) argument
59 buf[0] = (reg >> 8) & 0xff;
60 buf[1] = (reg >> 0) & 0xff;
89 s32 mgb4_i2c_read_byte(struct mgb4_i2c_client *client, u16 reg) argument
95 return i2c_smbus_read_byte_data(client->client, reg);
97 ret = read_r16(client->client, reg, &b, 1);
104 s32 mgb4_i2c_write_byte(struct mgb4_i2c_client *client, u16 reg, u argument
112 mgb4_i2c_mask_byte(struct mgb4_i2c_client *client, u16 reg, u8 mask, u8 val) argument
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/linux-master/drivers/staging/media/atomisp/pci/
H A Disp2400_input_system_private.h27 const hrt_address reg,
32 ia_css_device_store_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(hrt_data),
39 const hrt_address reg)
43 return ia_css_device_load_uint32(INPUT_SYSTEM_BASE[ID] + reg * sizeof(
49 const hrt_address reg,
54 ia_css_device_store_uint32(RX_BASE[ID] + reg * sizeof(hrt_data), value);
60 const hrt_address reg)
64 return ia_css_device_load_uint32(RX_BASE[ID] + reg * sizeof(hrt_data));
70 const hrt_address reg,
77 ia_css_device_store_uint32(RX_BASE[ID] + MIPI_PORT_OFFSET[port_ID] + reg *
25 input_system_reg_store( const input_system_ID_t ID, const hrt_address reg, const hrt_data value) argument
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/linux-master/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
H A Dcsi_rx_public.h88 * @param[in] reg The offset address of the register.
94 const hrt_address reg);
100 * @param[in] reg The offset address of the register.
106 const hrt_address reg,
113 * @param[in] reg The offset address of the register.
119 const hrt_address reg);
125 * @param[in] reg The offset address of the register.
131 const hrt_address reg,
/linux-master/drivers/base/regmap/
H A Dregcache-flat.c16 unsigned int reg)
18 return regcache_get_index_by_order(map, reg);
37 unsigned int reg = map->reg_defaults[i].reg; local
38 unsigned int index = regcache_flat_get_index(map, reg);
55 unsigned int reg, unsigned int *value)
58 unsigned int index = regcache_flat_get_index(map, reg);
65 static int regcache_flat_write(struct regmap *map, unsigned int reg, argument
69 unsigned int index = regcache_flat_get_index(map, reg);
15 regcache_flat_get_index(const struct regmap *map, unsigned int reg) argument
54 regcache_flat_read(struct regmap *map, unsigned int reg, unsigned int *value) argument
/linux-master/include/sound/
H A Dhdaudio_ext.h99 void __iomem *ml_addr; /* link output stream reg pointer */
122 #define snd_hdac_adsp_writeb(chip, reg, value) \
123 snd_hdac_reg_writeb(chip, (chip)->dsp_ba + (reg), value)
124 #define snd_hdac_adsp_readb(chip, reg) \
125 snd_hdac_reg_readb(chip, (chip)->dsp_ba + (reg))
126 #define snd_hdac_adsp_writew(chip, reg, value) \
127 snd_hdac_reg_writew(chip, (chip)->dsp_ba + (reg), value)
128 #define snd_hdac_adsp_readw(chip, reg) \
129 snd_hdac_reg_readw(chip, (chip)->dsp_ba + (reg))
130 #define snd_hdac_adsp_writel(chip, reg, valu
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/linux-master/arch/arm/mach-sunxi/
H A Dmc_smp.c118 u32 reg; local
121 reg = readl(prcm_base + PRCM_PWR_SWITCH_REG(cluster, cpu));
123 if (reg == 0x00) {
160 u32 reg; local
171 reg = readl(prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
172 reg &= ~PRCM_CPU_PO_RST_CTRL_CORE(cpu);
173 writel(reg, prcm_base + PRCM_CPU_PO_RST_CTRL(cluster));
177 reg = readl(r_cpucfg_base +
179 reg &= ~(R_CPUCFG_CLUSTER_PO_RST_CTRL_CORE(cpu));
180 writel(reg, r_cpucfg_bas
255 u32 reg; local
431 u32 reg; local
482 u32 reg; local
506 u32 reg; local
538 u32 reg; local
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/linux-master/drivers/net/wireless/ath/
H A Dregd.c26 static int __ath_regd_init(struct ath_regulatory *reg);
117 static bool dynamic_country_user_possible(struct ath_regulatory *reg) argument
122 switch (reg->country_code) {
189 static bool ath_reg_dyn_country_user_allow(struct ath_regulatory *reg) argument
193 if (!dynamic_country_user_possible(reg))
205 static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg) argument
207 return reg->current_rd & ~WORLDWIDE_ROAMING_FLAG;
210 bool ath_is_world_regd(struct ath_regulatory *reg) argument
212 return is_wwr_sku(ath_regd_get_eepromRD(reg));
223 ieee80211_regdomain *ath_world_regdomain(struct ath_regulatory *reg) argument
257 ath_is_radar_freq(u16 center_freq, struct ath_regulatory *reg) argument
308 __ath_reg_apply_beaconing_flags(struct wiphy *wiphy, struct ath_regulatory *reg, enum nl80211_reg_initiator initiator, struct ieee80211_channel *ch) argument
339 ath_reg_apply_beaconing_flags(struct wiphy *wiphy, struct ath_regulatory *reg, enum nl80211_reg_initiator initiator) argument
376 ath_reg_apply_ir_flags(struct wiphy *wiphy, struct ath_regulatory *reg, enum nl80211_reg_initiator initiator) argument
404 ath_reg_apply_radar_flags(struct wiphy *wiphy, struct ath_regulatory *reg) argument
436 ath_reg_apply_world_flags(struct wiphy *wiphy, enum nl80211_reg_initiator initiator, struct ath_regulatory *reg) argument
471 __ath_reg_dyn_country(struct wiphy *wiphy, struct ath_regulatory *reg, struct regulatory_request *request) argument
495 ath_reg_dyn_country(struct wiphy *wiphy, struct ath_regulatory *reg, struct regulatory_request *request) argument
508 ath_reg_notifier_apply(struct wiphy *wiphy, struct regulatory_request *request, struct ath_regulatory *reg) argument
551 ath_regd_is_eeprom_valid(struct ath_regulatory *reg) argument
635 ath_regd_init_wiphy(struct ath_regulatory *reg, struct wiphy *wiphy, void (*reg_notifier)(struct wiphy *wiphy, struct regulatory_request *request)) argument
675 ath_regd_sanitize(struct ath_regulatory *reg) argument
683 __ath_regd_init(struct ath_regulatory *reg) argument
758 ath_regd_init(struct ath_regulatory *reg, struct wiphy *wiphy, void (*reg_notifier)(struct wiphy *wiphy, struct regulatory_request *request)) argument
781 ath_regd_get_band_ctl(struct ath_regulatory *reg, enum nl80211_band band) argument
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/linux-master/drivers/acpi/pmic/
H A Dintel_pmic_xpower.c32 .reg = 0x13,
37 .reg = 0x13,
42 .reg = 0x13,
47 .reg = 0x12,
52 .reg = 0x12,
57 .reg = 0x12,
62 .reg = 0x12,
67 .reg = 0x12,
72 .reg = 0x12,
77 .reg
159 intel_xpower_pmic_get_power(struct regmap *regmap, int reg, int bit, u64 *value) argument
176 intel_xpower_pmic_update_power(struct regmap *regmap, int reg, int bit, bool on) argument
218 intel_xpower_pmic_get_raw_temp(struct regmap *regmap, int reg) argument
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/linux-master/drivers/mfd/
H A Dwm831x-irq.c27 int reg; member in struct:wm831x_irq_data
34 .reg = 1,
39 .reg = 5,
44 .reg = 5,
49 .reg = 5,
54 .reg = 5,
59 .reg = 5,
64 .reg = 5,
69 .reg = 5,
74 .reg
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/linux-master/drivers/net/wireless/ralink/rt2x00/
H A Drt2500pci.c48 u32 reg; local
56 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
57 reg = 0;
58 rt2x00_set_field32(&reg, BBPCSR_VALUE, value);
59 rt2x00_set_field32(&reg, BBPCSR_REGNUM, word);
60 rt2x00_set_field32(&reg, BBPCSR_BUSY, 1);
61 rt2x00_set_field32(&reg, BBPCSR_WRITE_CONTROL, 1);
63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg);
72 u32 reg; local
82 * doesn't become available in time, reg wil
106 u32 reg; local
131 u32 reg; local
146 u32 reg = 0; local
195 u32 reg; local
208 u32 reg; local
226 u32 reg; local
254 u32 reg; local
288 u32 reg; local
322 u32 reg; local
399 u32 reg; local
549 u32 reg; local
565 u32 reg; local
612 u32 reg; local
719 u32 reg; local
742 u32 reg; local
768 u32 reg; local
845 u32 reg; local
897 u32 reg; local
1115 u32 reg; local
1177 u32 reg, reg2; local
1321 u32 reg; local
1435 u32 reg; local
1454 u32 reg; local
1500 u32 reg, mask; local
1559 u32 reg; local
1623 u32 reg; local
1935 u32 reg; local
1986 u32 reg; local
1999 u32 reg; local
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/linux-master/drivers/memory/tegra/
H A Dtegra114.c20 .reg = 0x34c,
32 .reg = 0x228,
36 .reg = 0x2e8,
48 .reg = 0x228,
52 .reg = 0x2f4,
64 .reg = 0x228,
68 .reg = 0x2e8,
80 .reg = 0x228,
84 .reg = 0x2f4,
96 .reg
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/linux-master/include/linux/mtd/
H A Dsh_flctl.h18 #define FLCMNCR(f) (f->reg + 0x0)
19 #define FLCMDCR(f) (f->reg + 0x4)
20 #define FLCMCDR(f) (f->reg + 0x8)
21 #define FLADR(f) (f->reg + 0xC)
22 #define FLADR2(f) (f->reg + 0x3C)
23 #define FLDATAR(f) (f->reg + 0x10)
24 #define FLDTCNTR(f) (f->reg + 0x14)
25 #define FLINTDMACR(f) (f->reg + 0x18)
26 #define FLBSYTMR(f) (f->reg + 0x1C)
27 #define FLBSYCNT(f) (f->reg
137 void __iomem *reg; member in struct:sh_flctl
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/linux-master/drivers/media/platform/st/stm32/stm32-dcmipp/
H A Ddcmipp-common.h163 #define reg_write(device, reg, val) \
164 (__reg_write((device)->dev, (device)->regs, (reg), (val)))
165 #define reg_read(device, reg) \
166 (__reg_read((device)->dev, (device)->regs, (reg)))
167 #define reg_set(device, reg, mask) \
168 (__reg_set((device)->dev, (device)->regs, (reg), (mask)))
169 #define reg_clear(device, reg, mask) \
170 (__reg_clear((device)->dev, (device)->regs, (reg), (mask)))
172 static inline u32 __reg_read(struct device *dev, void __iomem *base, u32 reg) argument
174 u32 val = readl_relaxed(base + reg);
180 __reg_write(struct device *dev, void __iomem *base, u32 reg, u32 val) argument
187 __reg_set(struct device *dev, void __iomem *base, u32 reg, u32 mask) argument
194 __reg_clear(struct device *dev, void __iomem *base, u32 reg, u32 mask) argument
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/linux-master/drivers/pinctrl/samsung/
H A Dpinctrl-exynos.h55 #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
58 .pctl_offset = reg, \
64 #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
67 .pctl_offset = reg, \
74 #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
77 .pctl_offset = reg, \
84 #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \
87 .pctl_offset = reg, \
94 #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \
97 .pctl_offset = reg, \
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/linux-master/sound/firewire/tascam/
H A Dtascam-stream.c19 __be32 reg; local
25 &reg, sizeof(reg), 0);
29 *data = be32_to_cpu(reg);
48 __be32 reg; local
79 reg = cpu_to_be32(data);
83 &reg, sizeof(reg), 0);
88 reg = cpu_to_be32(0x0000001a);
90 reg
143 __be32 reg; local
179 __be32 reg; local
195 __be32 reg; local
224 __be32 reg; local
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/linux-master/arch/arm64/kvm/hyp/include/hyp/
H A Ddebug-sr.h21 #define save_debug(ptr,reg,nr) \
23 case 15: ptr[15] = read_debug(reg, 15); \
25 case 14: ptr[14] = read_debug(reg, 14); \
27 case 13: ptr[13] = read_debug(reg, 13); \
29 case 12: ptr[12] = read_debug(reg, 12); \
31 case 11: ptr[11] = read_debug(reg, 11); \
33 case 10: ptr[10] = read_debug(reg, 10); \
35 case 9: ptr[9] = read_debug(reg, 9); \
37 case 8: ptr[8] = read_debug(reg, 8); \
39 case 7: ptr[7] = read_debug(reg,
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/linux-master/drivers/clk/berlin/
H A Dberlin2-div.c69 u32 reg; local
74 reg = readl_relaxed(div->base + map->gate_offs);
75 reg >>= map->gate_shift;
80 return (reg & 0x1);
87 u32 reg; local
92 reg = readl_relaxed(div->base + map->gate_offs);
93 reg |= BIT(map->gate_shift);
94 writel_relaxed(reg, div->base + map->gate_offs);
106 u32 reg; local
111 reg
123 u32 reg; local
154 u32 reg; local
199 u32 reg; local
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/linux-master/drivers/net/ethernet/broadcom/genet/
H A Dbcmgenet_wol.c145 u32 reg, hfb_ctrl_reg, hfb_enable = 0; local
155 reg = bcmgenet_umac_readl(priv, UMAC_CMD);
156 if (reg & CMD_SW_RESET)
157 reg &= ~CMD_SW_RESET;
160 reg &= ~CMD_RX_EN;
161 bcmgenet_umac_writel(priv, reg, UMAC_CMD);
166 reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
167 reg |= MPD_EN;
170 reg |= MPD_PW_EN;
172 bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTR
230 u32 reg; local
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/linux-master/drivers/cpufreq/
H A Ds5pv210-cpufreq.c200 void __iomem *reg = NULL; local
203 reg = (dmc_base[0] + 0x30);
205 reg = (dmc_base[1] + 0x30);
220 writel_relaxed(tmp1, reg);
225 unsigned long reg; local
296 reg = readl_relaxed(S5P_CLK_DIV2);
297 reg &= ~(S5P_CLKDIV2_G3D_MASK | S5P_CLKDIV2_MFC_MASK);
298 reg |= (3 << S5P_CLKDIV2_G3D_SHIFT) |
300 writel_relaxed(reg, S5P_CLK_DIV2);
304 reg
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/linux-master/arch/s390/include/asm/
H A Dnospec-insn.h55 .macro __DECODE_R expand,reg
58 .ifc \reg,%r\r1
85 .macro __THUNK_EX_BR reg
88 555: br \reg
92 .macro GEN_BR_THUNK reg
94 .macro GEN_BR_THUNK_EXTERN reg
96 .macro GEN_BR_THUNK reg
98 __DECODE_R __THUNK_PROLOG_BR,\reg
99 __THUNK_EX_BR \reg
100 __DECODE_R __THUNK_EPILOG_BR,\reg
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/linux-master/drivers/mmc/host/
H A Dsdhci-pltfm.h36 static inline u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg) argument
38 return in_be32(host->ioaddr + reg);
41 static inline u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg) argument
43 return in_be16(host->ioaddr + (reg ^ 0x2));
46 static inline u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg) argument
48 return in_8(host->ioaddr + (reg ^ 0x3));
52 u32 val, int reg)
54 out_be32(host->ioaddr + reg, val);
58 u16 val, int reg)
61 int base = reg
51 sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg) argument
57 sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg) argument
81 sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg) argument
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/linux-master/arch/powerpc/platforms/86xx/
H A Dgef_ppc9a.c98 unsigned int reg; local
100 reg = ioread32be(ppc9a_regs);
101 return (reg >> 16) & 0xff;
107 unsigned int reg; local
109 reg = ioread32be(ppc9a_regs);
110 return (reg >> 8) & 0xff;
116 unsigned int reg; local
118 reg = ioread32be(ppc9a_regs);
119 return reg & 0xf;
125 unsigned int reg; local
134 unsigned int reg; local
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/linux-master/drivers/net/wireless/ath/carl9170/
H A Ddebug.h49 u32 reg; member in struct:hw_stat_reg_entry
53 #define STAT_MAC_REG(reg) \
54 { (AR9170_MAC_REG_##reg), #reg }
56 #define STAT_PTA_REG(reg) \
57 { (AR9170_PTA_REG_##reg), #reg }
59 #define STAT_USB_REG(reg) \
60 { (AR9170_USB_REG_##reg), #reg }
116 u32 reg; member in struct:carl9170_debug_mem_rbe
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/linux-master/drivers/net/fjes/
H A Dfjes_regs.h50 __le32 reg; member in union:REG_OWNER_EPID
58 __le32 reg; member in union:REG_MAX_EP
68 __le32 reg; member in union:REG_DCTL
79 __le32 reg; member in union:REG_CR
89 __le32 reg; member in union:REG_CS
98 __le32 reg; member in union:REG_ICTL
117 u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg);
119 #define wr32(reg, val) \
122 writel((val), &base[(reg)]); \
125 #define rd32(reg) (fjes_hw_rd3
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/linux-master/drivers/clk/sunxi-ng/
H A Dccu_reset.c19 u32 reg; local
23 reg = readl(ccu->base + map->reg);
24 writel(reg & ~map->bit, ccu->base + map->reg);
37 u32 reg; local
41 reg = readl(ccu->base + map->reg);
42 writel(reg | map->bit, ccu->base + map->reg);
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