Lines Matching refs:reg
69 u32 reg;
74 reg = readl_relaxed(div->base + map->gate_offs);
75 reg >>= map->gate_shift;
80 return (reg & 0x1);
87 u32 reg;
92 reg = readl_relaxed(div->base + map->gate_offs);
93 reg |= BIT(map->gate_shift);
94 writel_relaxed(reg, div->base + map->gate_offs);
106 u32 reg;
111 reg = readl_relaxed(div->base + map->gate_offs);
112 reg &= ~BIT(map->gate_shift);
113 writel_relaxed(reg, div->base + map->gate_offs);
123 u32 reg;
129 reg = readl_relaxed(div->base + map->pll_switch_offs);
131 reg &= ~BIT(map->pll_switch_shift);
133 reg |= BIT(map->pll_switch_shift);
134 writel_relaxed(reg, div->base + map->pll_switch_offs);
138 reg = readl_relaxed(div->base + map->pll_select_offs);
139 reg &= ~(PLL_SELECT_MASK << map->pll_select_shift);
140 reg |= (index - 1) << map->pll_select_shift;
141 writel_relaxed(reg, div->base + map->pll_select_offs);
154 u32 reg;
161 reg = readl_relaxed(div->base + map->pll_switch_offs);
162 reg &= BIT(map->pll_switch_shift);
163 if (reg) {
164 reg = readl_relaxed(div->base + map->pll_select_offs);
165 reg >>= map->pll_select_shift;
166 reg &= PLL_SELECT_MASK;
167 index = 1 + reg;
199 u32 reg;
200 reg = readl_relaxed(div->base + map->div_select_offs);
201 reg >>= map->div_select_shift;
202 reg &= DIV_SELECT_MASK;
203 divider = clk_div[reg];