Searched refs:reg (Results 226 - 250 of 1755) sorted by relevance

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/freebsd-11-stable/sys/mips/rt305x/
H A Duart_dev_rt305x.h38 #define uart_getreg(bas, reg) \
39 bus_space_read_4((bas)->bst, (bas)->bsh, reg)
40 #define uart_setreg(bas, reg, value) \
41 bus_space_write_4((bas)->bst, (bas)->bsh, reg, value)
/freebsd-11-stable/sys/i386/include/
H A Dxbox.h45 void pic16l_setbyte(int addr, int reg, int data);
/freebsd-11-stable/sys/arm/ti/
H A Dti_adcvar.h34 #define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg)
35 #define ADC_WRITE4(_sc, reg, value) \
36 bus_write_4((_sc)->sc_mem_res, reg, value)
/freebsd-11-stable/sys/dev/liquidio/base/
H A Dlio_mem_ops.c61 lio_write_bar1_mem8(struct octeon_device *oct, uint32_t reg, uint64_t val) argument
65 oct->mem_bus_space[1].handle, reg, val);
70 lio_read_bar1_mem32(struct octeon_device *oct, uint32_t reg) argument
74 oct->mem_bus_space[1].handle, reg));
78 lio_write_bar1_mem32(struct octeon_device *oct, uint32_t reg, uint32_t val) argument
82 oct->mem_bus_space[1].handle, reg, val);
87 lio_read_bar1_mem64(struct octeon_device *oct, uint32_t reg) argument
91 return (lio_read_bar1_mem32(oct, reg) |
92 ((uint64_t)lio_read_bar1_mem32(oct, reg + 4) << 32));
95 oct->mem_bus_space[1].handle, reg));
100 lio_write_bar1_mem64(struct octeon_device *oct, uint32_t reg, uint64_t val) argument
138 lio_read_bar1_mem8(struct octeon_device *oct, uint32_t reg) argument
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/freebsd-11-stable/sys/dev/mii/
H A Dmicphy.c121 ksz9031_read(struct mii_softc *sc, uint32_t devaddr, uint32_t reg) argument
125 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg);
135 ksz9031_write(struct mii_softc *sc, uint32_t devaddr, uint32_t reg, argument
141 PHY_WRITE(sc, MII_KSZ9031_MMD_ACCESS_DATA, reg);
150 ksz9021_read(struct mii_softc *sc, uint32_t reg) argument
153 PHY_WRITE(sc, MII_KSZPHY_EXTREG, reg);
159 ksz9021_write(struct mii_softc *sc, uint32_t reg, uint32_t val) argument
162 PHY_WRITE(sc, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | reg);
168 uint32_t dev, uint32_t reg, char *field1, uint32_t f1mask, int f1off,
177 val = ksz9031_read(sc, dev, reg);
167 ksz90x1_load_values(struct mii_softc *sc, phandle_t node, uint32_t dev, uint32_t reg, char *field1, uint32_t f1mask, int f1off, char *field2, uint32_t f2mask, int f2off, char *field3, uint32_t f3mask, int f3off, char *field4, uint32_t f4mask, int f4off) argument
285 int reg; local
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/freebsd-11-stable/sys/dev/iwm/
H A Dif_iwm_pcie_trans.h113 extern int iwm_poll_bit(struct iwm_softc *sc, int reg,
118 uint32_t reg, uint32_t bits, uint32_t mask);
119 extern void iwm_set_bits_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits);
120 extern void iwm_clear_bits_prph(struct iwm_softc *sc, uint32_t reg, uint32_t bits);
/freebsd-11-stable/sys/dev/ixl/
H A Di40e_osdep.h198 rd32_osdep(struct i40e_osdep *osdep, uint32_t reg) argument
201 KASSERT(reg < osdep->mem_bus_space_size,
203 (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
206 osdep->mem_bus_space_handle, reg));
210 wr32_osdep(struct i40e_osdep *osdep, uint32_t reg, uint32_t value) argument
213 KASSERT(reg < osdep->mem_bus_space_size,
215 (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
218 osdep->mem_bus_space_handle, reg, value);
227 #define rd32(a, reg) rd32_osdep((a)->back, (reg))
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/freebsd-11-stable/lib/libthread_db/arch/mips/
H A Dlibpthread_md.c42 pt_reg_to_ucontext(const struct reg *r, ucontext_t *uc)
53 pt_ucontext_to_reg(const ucontext_t *uc, struct reg *r)
85 pt_reg_sstep(struct reg *reg __unused, int step __unused)
/freebsd-11-stable/sys/contrib/octeon-sdk/
H A Dcvmx-pcie.h93 uint64_t reg : 12; /* Selects a register in the configuration space of the target. */ member in struct:__anon8663::__anon8664
185 * @param reg Register to access
189 uint8_t cvmx_pcie_config_read8(int pcie_port, int bus, int dev, int fn, int reg);
198 * @param reg Register to access
202 uint16_t cvmx_pcie_config_read16(int pcie_port, int bus, int dev, int fn, int reg);
211 * @param reg Register to access
215 uint32_t cvmx_pcie_config_read32(int pcie_port, int bus, int dev, int fn, int reg);
224 * @param reg Register to access
227 void cvmx_pcie_config_write8(int pcie_port, int bus, int dev, int fn, int reg, uint8_t val);
236 * @param reg Registe
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/freebsd-11-stable/sys/dev/extres/clk/
H A Dclk_mux.c77 uint32_t reg; local
84 rv = RD4(clk, sc->offset, &reg);
89 reg = (reg >> sc->shift) & sc->mask;
90 clknode_init_parent_idx(clk, reg);
97 uint32_t reg; local
110 RD4(clk, sc->offset, &reg);
/freebsd-11-stable/sys/arm/altera/socfpga/
H A Dsocfpga_mp.c111 int reg; local
132 reg = bus_space_read_4(fdtbus_bs_tag, scu, SCU_DIAG_CONTROL);
133 reg |= (SCU_DIAG_DISABLE_MIGBIT);
134 bus_space_write_4(fdtbus_bs_tag, scu, SCU_DIAG_CONTROL, reg);
140 reg = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG);
141 reg |= (SCU_CONTROL_ENABLE);
142 bus_space_write_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG, reg);
/freebsd-11-stable/sys/arm/samsung/exynos/
H A Dexynos5_mp.c62 int reg; local
67 reg = bus_space_read_4(fdtbus_bs_tag, chipid, 0x0);
70 return (reg & EXYNOS5_SOC_ID_MASK);
91 int reg; local
98 reg = EXYNOS5420_SYSRAM_NS;
100 reg = EXYNOS_SYSRAM;
102 err = bus_space_map(fdtbus_bs_tag, reg, 0x100, 0, &sysram);
/freebsd-11-stable/sys/arm/amlogic/aml8726/
H A Daml8726_mp.c144 #define SCU_WRITE_4(reg, value) bus_write_4(&aml8726_smp.scu_res, \
145 (reg), (value))
146 #define SCU_READ_4(reg) bus_read_4(&aml8726_smp.scu_res, (reg))
147 #define SCU_BARRIER(reg) bus_barrier(&aml8726_smp.scu_res, \
148 (reg), 4, (BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE))
150 #define CPUCONF_WRITE_4(reg, value) bus_write_4(&aml8726_smp.cpucfg_res, \
151 (reg), (value))
152 #define CPUCONF_READ_4(reg) bus_read_4(&aml8726_smp.cpucfg_res, \
153 (reg))
425 uint32_t reg; local
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/freebsd-11-stable/sys/dev/extres/regulator/
H A Dregulator.h127 int regulator_enable(regulator_t reg);
128 int regulator_disable(regulator_t reg);
129 int regulator_stop(regulator_t reg);
130 int regulator_status(regulator_t reg, int *status);
131 int regulator_get_voltage(regulator_t reg, int *uvolt);
132 int regulator_set_voltage(regulator_t reg, int min_uvolt, int max_uvolt);
136 regulator_t *reg);
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_mips.h33 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \
35 #reg, alt, sizeof(((GPR_linux_mips *) NULL)->reg) / 2, \
36 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
37 {kind1, kind2, kind3, ptrace_##reg##_mips, \
38 gpr_##reg##_mips }, \
47 #define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \
49 #reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \
50 FPR_OFFSET(reg), eEncodingIEEE75
[all...]
H A DRegisterContextPOSIX_x86.h38 virtual unsigned GetRegisterSize(unsigned reg);
40 virtual unsigned GetRegisterOffset(unsigned reg);
42 const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
48 const char *GetRegisterName(unsigned reg);
157 bool IsGPR(unsigned reg);
159 bool IsFPR(unsigned reg);
161 bool IsAVX(unsigned reg);
165 bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order);
166 bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order);
167 bool IsFPR(unsigned reg, FPRTyp
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.cpp89 Register reg = MI.getOperand(i - 1).getReg();
90 BuildMI(MBB, ++II, DL, TII.get(BPF::ADD_ri), reg)
91 .addReg(reg)
108 Register reg = MI.getOperand(i - 1).getReg();
110 BuildMI(MBB, ++II, DL, TII.get(BPF::MOV_rr), reg)
112 BuildMI(MBB, II, DL, TII.get(BPF::ADD_ri), reg)
113 .addReg(reg)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp309 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
310 if (MRI->isPhysRegUsed(reg))
313 for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
314 if (MRI->isPhysRegUsed(reg))
335 for (unsigned reg = SP::I0; reg <
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/freebsd-11-stable/sys/dev/drm2/i915/
H A Di915_drv.c851 * - reset the chip using the reset reg
1241 #define NEEDS_FORCE_WAKE(dev_priv, reg) \
1243 ((reg) < 0x40000) && \
1244 ((reg) != FORCEWAKE))
1246 static bool IS_DISPLAYREG(u32 reg) argument
1252 if (reg >= VLV_DISPLAY_BASE)
1255 if (reg >= RENDER_RING_BASE &&
1256 reg < RENDER_RING_BASE + 0xff)
1258 if (reg >= GEN6_BSD_RING_BASE &&
1259 reg < GEN6_BSD_RING_BAS
1422 struct drm_i915_reg_read *reg = data; local
[all...]
/freebsd-11-stable/sys/dev/pccbb/
H A Dpccbbvar.h148 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val) argument
150 bus_space_write_4(sc->bst, sc->bsh, reg, val);
154 cbb_get(struct cbb_softc *sc, uint32_t reg) argument
156 return (bus_space_read_4(sc->bst, sc->bsh, reg));
160 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) argument
162 cbb_set(sc, reg, cbb_get(sc, reg) | bits);
166 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) argument
168 cbb_set(sc, reg, cbb_get(sc, reg)
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/freebsd-11-stable/sys/arm/freescale/imx/
H A Dimx6_ssi.c528 int reg; local
538 reg = (SIER_TDMAE);
539 WRITE4(sc, SSI_SIER, reg);
550 int reg; local
554 reg = READ4(sc, SSI_SIER);
555 reg &= ~(SIER_TDMAE);
556 WRITE4(sc, SSI_SIER, reg);
682 int reg; local
684 reg = READ4(sc, SSI_STCCR);
685 reg
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/freebsd-11-stable/sys/dev/sk/
H A Dif_skreg.h145 #define SK_WIN(reg) (((reg) & SK_WIN_MASK) / SK_WIN_LEN)
148 #define SK_REG(reg) ((reg) & SK_REG_MASK)
175 #define SK_IF_READ_4(sc_if, skip, reg) \
176 sk_win_read_4(sc_if->sk_softc, reg + \
178 #define SK_IF_READ_2(sc_if, skip, reg) \
179 sk_win_read_2(sc_if->sk_softc, reg + \
181 #define SK_IF_READ_1(sc_if, skip, reg) \
182 sk_win_read_1(sc_if->sk_softc, reg
1430 int reg; member in struct:sk_bcom_hack
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/freebsd-11-stable/sys/dev/pccard/
H A Dpccard_cis.c692 u_int reg, dtype, dspeed; local
694 reg = pccard_tuple_read_1(tuple, 0);
695 dtype = reg & PCCARD_DTYPE_MASK;
696 dspeed = reg & PCCARD_DSPEED_MASK;
847 u_int reg, rasz, rmsz, rfsz; local
850 reg = pccard_tuple_read_1(tuple, 0);
851 rasz = 1 + ((reg & PCCARD_TPCC_RASZ_MASK) >>
853 rmsz = 1 + ((reg & PCCARD_TPCC_RMSZ_MASK) >>
855 rfsz = ((reg & PCCARD_TPCC_RFSZ_MASK) >>
902 u_int reg, reg local
[all...]
/freebsd-11-stable/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_main.c476 al_dbg("[%s]: %s - reg %d. val 0x%x",
499 al_dbg("[%s]: %s - reg %d. val 0x%x",
521 al_dbg("[%s]: %s - reg %d. val 0x%x",
544 al_dbg("[%s]: %s - reg %d. val 0x%x",
558 uint32_t reg; local
700 reg = al_reg_read32(&adapter->ec_regs_base->tso.in_cfg);
701 reg &= ~0x7F00; /*clear bits 14:8 */
702 al_reg_write32(&adapter->ec_regs_base->tso.in_cfg, reg);
1603 uint32_t reg; local
1604 reg
1612 uint32_t reg; local
1627 uint32_t reg; local
1730 al_eth_mdio_1g_mac_read(struct al_hal_eth_adapter *adapter, uint32_t phy_addr __attribute__((__unused__)), uint32_t reg, uint16_t *val) argument
1739 al_eth_mdio_1g_mac_write(struct al_hal_eth_adapter *adapter, uint32_t phy_addr __attribute__((__unused__)), uint32_t reg, uint16_t val) argument
1773 al_eth_mdio_10g_mac_type22( struct al_hal_eth_adapter *adapter, int read, uint32_t phy_addr, uint32_t reg, uint16_t *val) argument
1821 al_eth_mdio_10g_mac_type45( struct al_hal_eth_adapter *adapter, int read, uint32_t port_addr, uint32_t device, uint32_t reg, uint16_t *val) argument
1952 al_eth_mdio_read(struct al_hal_eth_adapter *adapter, uint32_t phy_addr, uint32_t device, uint32_t reg, uint16_t *val) argument
1974 al_eth_mdio_write(struct al_hal_eth_adapter *adapter, uint32_t phy_addr, uint32_t device, uint32_t reg, uint16_t val) argument
2409 uint32_t reg; local
2813 uint32_t reg; local
2915 uint32_t reg; local
2951 uint32_t reg; local
2989 uint32_t reg; local
3024 uint32_t reg; local
3214 uint32_t reg; local
3231 uint32_t reg; local
3279 uint32_t reg; local
3327 uint32_t reg; local
3344 uint32_t reg; local
3361 uint32_t reg; local
3383 uint32_t reg; local
3402 uint32_t reg; local
3420 uint32_t reg; local
3439 uint32_t reg; local
3454 uint32_t reg; local
3469 uint32_t reg; local
3484 uint32_t reg; local
3499 uint32_t reg; local
3551 uint32_t reg; local
3617 uint32_t reg = 0; local
3919 uint32_t reg; local
4060 uint32_t reg = 0; local
4142 uint32_t reg = al_reg_read32((void*)((uint32_t)mac_base + 0x4)); local
4272 al_eth_byte_arr_to_reg( uint32_t *reg, uint8_t *arr, unsigned int num_bytes) argument
4292 uint32_t reg = 0; local
[all...]
/freebsd-11-stable/sys/arm/xscale/ixp425/
H A Davila_led.c53 uint32_t reg; local
56 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
58 reg &= ~GPIO_LED_STATUS_BIT;
60 reg |= GPIO_LED_STATUS_BIT;
61 GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg);

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