1263693Sloos/*- 2263693Sloos * Copyright 2014 Luiz Otavio O Souza <loos@freebsd.org> 3263693Sloos * All rights reserved. 4263693Sloos * 5263693Sloos * Redistribution and use in source and binary forms, with or without 6263693Sloos * modification, are permitted provided that the following conditions 7263693Sloos * are met: 8263693Sloos * 1. Redistributions of source code must retain the above copyright 9263693Sloos * notice, this list of conditions and the following disclaimer. 10263693Sloos * 2. Redistributions in binary form must reproduce the above copyright 11263693Sloos * notice, this list of conditions and the following disclaimer in the 12263693Sloos * documentation and/or other materials provided with the distribution. 13263693Sloos * 14263693Sloos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15263693Sloos * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16263693Sloos * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17263693Sloos * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18263693Sloos * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19263693Sloos * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20263693Sloos * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21263693Sloos * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22263693Sloos * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23263693Sloos * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24263693Sloos * SUCH DAMAGE. 25263693Sloos * 26263693Sloos * $FreeBSD: stable/11/sys/arm/ti/ti_adcvar.h 307775 2016-10-22 15:26:32Z gonzo $ 27263693Sloos */ 28263693Sloos 29263693Sloos#ifndef _TI_ADCVAR_H_ 30263693Sloos#define _TI_ADCVAR_H_ 31263693Sloos 32266960Sloos#define TI_ADC_NPINS 8 33263693Sloos 34263693Sloos#define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg) 35263693Sloos#define ADC_WRITE4(_sc, reg, value) \ 36263693Sloos bus_write_4((_sc)->sc_mem_res, reg, value) 37263693Sloos 38263693Sloosstruct ti_adc_softc { 39263693Sloos device_t sc_dev; 40263693Sloos int sc_last_state; 41263693Sloos struct mtx sc_mtx; 42263693Sloos struct resource *sc_mem_res; 43263693Sloos struct resource *sc_irq_res; 44263693Sloos void *sc_intrhand; 45298802Sgonzo int sc_tsc_wires; 46298802Sgonzo int sc_tsc_wire_config[TI_ADC_NPINS]; 47298802Sgonzo int sc_coord_readouts; 48298802Sgonzo int sc_x_plate_resistance; 49298802Sgonzo int sc_charge_delay; 50298802Sgonzo int sc_adc_nchannels; 51298802Sgonzo int sc_adc_channels[TI_ADC_NPINS]; 52298802Sgonzo int sc_xp_bit, sc_xp_inp; 53298802Sgonzo int sc_xn_bit, sc_xn_inp; 54298802Sgonzo int sc_yp_bit, sc_yp_inp; 55298802Sgonzo int sc_yn_bit, sc_yn_inp; 56298802Sgonzo uint32_t sc_tsc_enabled; 57298802Sgonzo int sc_pen_down; 58307775Sgonzo#ifdef EVDEV_SUPPORT 59307762Sgonzo int sc_x; 60307762Sgonzo int sc_y; 61307762Sgonzo struct evdev_dev *sc_evdev; 62307762Sgonzo#endif 63263693Sloos}; 64263693Sloos 65263693Sloosstruct ti_adc_input { 66263693Sloos int32_t enable; /* input enabled */ 67263693Sloos int32_t samples; /* samples average */ 68263693Sloos int32_t input; /* input number */ 69263693Sloos int32_t value; /* raw converted value */ 70263693Sloos uint32_t stepconfig; /* step config register */ 71263693Sloos uint32_t stepdelay; /* step delay register */ 72263693Sloos struct ti_adc_softc *sc; /* pointer to adc softc */ 73263693Sloos}; 74263693Sloos 75263693Sloos#define TI_ADC_LOCK(_sc) \ 76263693Sloos mtx_lock(&(_sc)->sc_mtx) 77263693Sloos#define TI_ADC_UNLOCK(_sc) \ 78263693Sloos mtx_unlock(&(_sc)->sc_mtx) 79263693Sloos#define TI_ADC_LOCK_INIT(_sc) \ 80263693Sloos mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 81263693Sloos "ti_adc", MTX_DEF) 82263693Sloos#define TI_ADC_LOCK_DESTROY(_sc) \ 83263693Sloos mtx_destroy(&_sc->sc_mtx); 84263693Sloos#define TI_ADC_LOCK_ASSERT(_sc) \ 85263693Sloos mtx_assert(&(_sc)->sc_mtx, MA_OWNED) 86263693Sloos 87263693Sloos#endif /* _TI_ADCVAR_H_ */ 88