/linux-master/drivers/pinctrl/renesas/ |
H A D | pinctrl-rzg2l.c | 37 * Use 16 lower bits [15:0] for pin identifier 38 * Use 16 higher bits [31:16] for pin mux function 87 * and f is pin configuration capabilities supported. 95 * and f is pin configuration capabilities supported. 100 * BIT(63) indicates dedicated pin, p is the register index while 102 * (b * 8) and f is the pin configuration capabilities supported. 217 * @oen_max_pin: the maximum pin number supporting output enable 238 * struct rzg2l_variable_pin_cfg - pin data cfg 239 * @cfg: port pin configuration 241 * @pin 246 u32 pin:3; member in struct:rzg2l_variable_pin_cfg 326 rzg2l_pinctrl_get_variable_pin_cfg(struct rzg2l_pinctrl *pctrl, u64 pincfg, unsigned int port, u8 pin) argument 462 rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl, u8 pin, u8 off, u8 func) argument 524 u32 pin = RZG2L_PIN_ID_TO_PIN(pins[i]); local 577 const char *pin; local 850 rzg2l_get_power_source(struct rzg2l_pinctrl *pctrl, u32 pin, u32 caps) argument 878 rzg2l_set_power_source(struct rzg2l_pinctrl *pctrl, u32 pin, u32 caps, u32 ps) argument 1015 rzg2l_oen_is_supported(u32 caps, u8 pin, u8 max_pin) argument 1026 rzg2l_pin_to_oen_bit(u32 offset, u8 pin, u8 max_port) argument 1037 rzg2l_read_oen(struct rzg2l_pinctrl *pctrl, u32 caps, u32 offset, u8 pin) argument 1051 rzg2l_write_oen(struct rzg2l_pinctrl *pctrl, u32 caps, u32 offset, u8 pin, u8 oen) argument 1082 const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin]; local 1183 const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin]; local 2534 u8 pin; local [all...] |
H A D | pinctrl-rzn1.c | 85 * @groups: corresponding pin groups 95 * struct rzn1_pin_group - describes an rzn1 pin group 96 * @name: the name of this specific pin group 130 #define RZN1_PIN(pin) PINCTRL_PIN(pin, "pl_gpio"#pin) 212 * Using a composite pin description, set the hardware pinmux registers 219 static int rzn1_set_hw_pin_func(struct rzn1_pinctrl *ipctl, unsigned int pin, argument 256 if (pin >= ARRAY_SIZE(ipctl->lev1->conf) || 260 l1 = readl(&ipctl->lev1->conf[pin]); 489 rzn1_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument 541 rzn1_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) argument 662 unsigned int pin = grp->pins[i]; local [all...] |
/linux-master/arch/mips/pci/ |
H A D | fixup-rc32434.c | 39 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
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/linux-master/drivers/staging/olpc_dcon/ |
H A D | olpc_dcon_xo_1.c | 43 const struct dcon_gpio *pin = &gpios_asis[0]; local 46 gpios[i] = devm_gpiod_get(&dcon->client->dev, pin[i].name, 47 pin[i].flags); 50 pr_err("failed to request %s GPIO: %d\n", pin[i].name, 64 * this is because OFW will disable input for the pin and set a value.. 66 * then a value is set. So, future readings of the pin can use
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H A D | olpc_dcon_xo_1_5.c | 89 const struct dcon_gpio *pin = &gpios_asis[0]; local 99 gpios[i] = devm_gpiod_get(&dcon->client->dev, pin[i].name, 100 pin[i].flags); 103 pr_err("failed to request %s GPIO: %d\n", pin[i].name,
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | r600.h | 42 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
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/linux-master/include/drm/ |
H A D | drm_audio_component.h | 18 * @owner: drm module to pin down 76 * @pin_eld_notify: Notify the HDA driver that pin sense and/or ELD information has changed 85 * @pin2port: Check and convert from pin node to port number 87 * Called by HDA driver to check and convert from the pin widget node 90 int (*pin2port)(void *audio_ptr, int pin);
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/linux-master/drivers/xen/ |
H A D | platform-pci.c | 47 u8 pin; local 54 pin = pdev->pin; 62 ((uint64_t)(pin - 1) & 3);
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/linux-master/fs/bcachefs/ |
H A D | btree_write_buffer_types.h | 46 struct journal_entry_pin pin; member in struct:btree_write_buffer_keys
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/linux-master/drivers/pinctrl/ |
H A D | core.h | 3 * Core private header for the pin control subsystem 30 * struct pinctrl_dev - pin control class device 31 * @node: node to include this pin controller in the global pin controller list 32 * @desc: the pin controller descriptor supplied when initializing this pin 34 * @pin_desc_tree: each pin descriptor for this pin controller is stored in 36 * @pin_group_tree: optionally each pin group can be stored in this radix tree 40 * @gpio_ranges: a list of GPIO ranges that is handled by this pin controlle 244 pin_desc_get(struct pinctrl_dev *pctldev, unsigned int pin) argument [all...] |
H A D | pinctrl-single.c | 2 * Generic device tree based pinctrl driver for one register per pin 86 * @conf: array of pin configurations 87 * @nconfs: number of pin configurations available 102 * struct pcs_gpiofunc_range - pin ranges with same mux value of gpio function 153 * @pctl: pin controller device 165 * @bits_per_pin: number of bits per pin 171 * @desc: pin controller descriptor 213 static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, 215 static int pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, 273 unsigned int pin) 272 pcs_pin_reg_offset_get(struct pcs_device *pcs, unsigned int pin) argument 287 pcs_pin_shift_reg_get(struct pcs_device *pcs, unsigned int pin) argument 293 pcs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned pin) argument 337 pcs_get_function(struct pinctrl_dev *pctldev, unsigned pin, struct pcs_function **func) argument 406 pcs_request_gpio(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned pin) argument 455 pcs_pinconf_clear_bias(struct pinctrl_dev *pctldev, unsigned pin) argument 469 pcs_pinconf_bias_disable(struct pinctrl_dev *pctldev, unsigned pin) argument 484 pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *config) argument 548 pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *configs, unsigned num_configs) argument 651 pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned pin) argument 687 struct pinctrl_pin_desc *pin; local 1025 int pin; local 1153 int pin; local [all...] |
/linux-master/arch/x86/kvm/ |
H A D | irq_comm.c | 35 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level); 43 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level, 259 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, argument 266 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin); 291 e->irqchip.pin = ue->u.irqchip.pin; 294 e->irqchip.pin += PIC_NUM_PINS / 2; 297 if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2) 302 if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS) 368 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin [all...] |
/linux-master/arch/mips/include/asm/mach-loongson2ef/cs5536/ |
H A D | cs5536_pci.h | 107 #define CFG_PCI_INTERRUPT_LINE(pin, mod_intr) \ 109 ((pin) << 8) | (mod_intr))
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/linux-master/drivers/pinctrl/meson/ |
H A D | pinctrl-meson8-pmx.c | 11 * a given pin are disabled the pin acts as a GPIO. 22 * meson8_pmx_disable_other_groups() - disable other groups using a given pin 24 * @pc: meson pin controller device 25 * @pin: number of the pin 28 * The function disables all pinmux groups using a pin except the 30 * the pin in GPIO mode. 33 unsigned int pin, int sel_group) 46 if (group->pins[j] == pin) { 32 meson8_pmx_disable_other_groups(struct meson_pinctrl *pc, unsigned int pin, int sel_group) argument [all...] |
/linux-master/drivers/pinctrl/nomadik/ |
H A D | pinctrl-abx500.h | 36 * @groups: An array of pin groups that may select this function. 46 * struct abx500_pingroup - describes a ABx500 pin group 47 * @name: the name of this specific pin group 49 * from the driver-local pin enumeration space 62 #define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \ 64 .pin_number = pin, \ 76 * @pin_number: The pin number 111 * @start: The pin number of the first pin interrupt capable 112 * @end: The pin numbe [all...] |
/linux-master/drivers/platform/x86/x86-android-tablets/ |
H A D | x86-android-tablets.h | 26 * (either IOAPIC index, or GPIO chip name + pin-number). 75 int pin; member in struct:x86_gpio_button 96 int x86_android_tablet_get_gpiod(const char *chip, int pin, const char *con_id,
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/linux-master/arch/mips/pic32/pic32mzda/ |
H A D | early_pin.c | 123 void pic32_pps_input(int function, int pin) argument 130 __raw_writel(pin, pps_base + input_pin_reg[i].reg); 195 int pin; member in struct:__anon13 253 void pic32_pps_output(int function, int pin) argument 259 if (output_pin_reg[i].pin == pin) {
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/linux-master/arch/alpha/kernel/ |
H A D | sys_sable.c | 196 sable_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument 378 lynx_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument 410 int slot, pin = *pinp; local 427 pin = pci_swizzle_interrupt_pin(dev, pin); 435 *pinp = pin;
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/linux-master/drivers/gpio/ |
H A D | gpio-exar.c | 50 unsigned int pin = exar_gpio->first_pin + (offset % 16); local 52 unsigned int addr = pin / 8 ? EXAR_OFFSET_MPIOSEL_HI : EXAR_OFFSET_MPIOSEL_LO; 60 unsigned int pin = exar_gpio->first_pin + (offset % 16); local 62 unsigned int addr = pin / 8 ? EXAR_OFFSET_MPIOLVL_HI : EXAR_OFFSET_MPIOLVL_LO; 70 unsigned int pin = exar_gpio->first_pin + (offset % 16); local 72 return pin % 8; 164 ret = device_property_read_u32(dev, "exar,first-pin", &first_pin);
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H A D | gpio-mvebu.c | 300 static void mvebu_gpio_set(struct gpio_chip *chip, unsigned int pin, int value) argument 305 BIT(pin), value ? BIT(pin) : 0); 308 static int mvebu_gpio_get(struct gpio_chip *chip, unsigned int pin) argument 315 if (u & BIT(pin)) { 327 return (u >> pin) & 1; 330 static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned int pin, argument 336 BIT(pin), value ? BIT(pin) : 0); 339 static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned int pin) argument 358 mvebu_gpio_direction_output(struct gpio_chip *chip, unsigned int pin, int value) argument 381 mvebu_gpio_get_direction(struct gpio_chip *chip, unsigned int pin) argument 394 mvebu_gpio_to_irq(struct gpio_chip *chip, unsigned int pin) argument 499 int pin; local [all...] |
/linux-master/arch/powerpc/platforms/82xx/ |
H A D | ep8248e.c | 160 int port, pin, flags; member in struct:cpm_pin 230 const struct cpm_pin *pin = &ep8248e_pins[i]; local 231 cpm2_set_pin(pin->port, pin->pin, pin->flags);
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/linux-master/drivers/pinctrl/nxp/ |
H A D | pinctrl-s32cc.c | 3 * Core driver for the S32 CC (Common Chassis) pin controller 65 * Holds pin configuration for GPIO's. 68 * @list: Linked list entry for each gpio pin 86 * @regions: reserved memory regions with start/end pin 87 * @info: structure containing information about the pin 105 s32_get_region(struct pinctrl_dev *pctldev, unsigned int pin) argument 114 if (pin >= pin_range->start && pin <= pin_range->end) 122 unsigned int pin) 124 return s32_get_region(pctldev, pin) 121 s32_check_pin(struct pinctrl_dev *pctldev, unsigned int pin) argument 127 s32_regmap_read(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int *val) argument 143 s32_regmap_write(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int val) argument 161 s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int mask, unsigned int val) argument 664 s32_pinctrl_should_save(struct s32_pinctrl *ipctl, unsigned int pin) argument 686 const struct pinctrl_pin_desc *pin; local 714 const struct pinctrl_pin_desc *pin; local [all...] |
/linux-master/drivers/pinctrl/bcm/ |
H A D | pinctrl-nsp-mux.c | 81 * nsp mux function and supported pin groups 123 * Description of a pin in nsp 125 * @pin: pin number 126 * @name: pin name 130 unsigned int pin; member in struct:nsp_pin 137 .pin = p, \ 235 * List of nsp pin groups 476 unsigned int pin) 479 u32 *gpio_select = pctrl_dev->desc->pins[pin] 474 nsp_gpio_request_enable(struct pinctrl_dev *pctrl_dev, struct pinctrl_gpio_range *range, unsigned int pin) argument 495 nsp_gpio_disable_free(struct pinctrl_dev *pctrl_dev, struct pinctrl_gpio_range *range, unsigned int pin) argument [all...] |
/linux-master/sound/pci/hda/ |
H A D | hda_auto_parser.c | 17 * Helper for automatic pin configuration 28 /* a pair of input pin and its sequence */ 30 hda_nid_t pin; member in struct:auto_out_pin 43 * then store it to a pin array. 51 pins[i] = list[i].pin; 55 /* add the found input-pin to the cfg->inputs[] table */ 60 cfg->inputs[cfg->num_inputs].pin = nid; 103 /* check whether the given pin has a proper pin I/O capability bit */ 104 static bool check_pincap_validity(struct hda_codec *codec, hda_nid_t pin, argument 480 hda_get_input_pin_label(struct hda_codec *codec, const struct auto_pin_cfg_item *item, hda_nid_t pin, bool check_location) argument 738 hda_nid_t pin = cfg->dig_out_pins[i]; local 893 const struct hda_pincfg *pin; local [all...] |
/linux-master/drivers/pinctrl/intel/ |
H A D | pinctrl-lynxpoint.c | 152 #define LP_ACPI_OWNED 0x00 /* Bitmap, set by bios, 0: pin reserved for ACPI */ 153 #define LP_IRQ2IOXAPIC 0x10 /* Bitmap, set by bios, 1: pin routed to IOxAPIC */ 158 /* Each pin has two 32 bit config registers, starting at 0x100 */ 233 static bool lp_gpio_acpi_use(struct intel_pinctrl *lg, unsigned int pin) argument 237 acpi_use = lp_gpio_reg(&lg->chip, pin, LP_ACPI_OWNED); 241 return !(ioread32(acpi_use) & BIT(pin % 32)); 262 unsigned int pin) 265 void __iomem *reg = lp_gpio_reg(&lg->chip, pin, LP_CONFIG1); 266 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2); 279 if (lp_gpio_acpi_use(lg, pin)) 261 lp_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int pin) argument 328 lp_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin) argument 355 lp_gpio_disable_free(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin) argument 368 lp_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, bool input) argument 407 lp_pin_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument 448 lp_pin_config_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) argument 550 u32 base, pin; local [all...] |