Searched refs:write (Results 201 - 225 of 2711) sorted by path

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/linux-master/arch/arc/kernel/
H A Dunaligned.c137 /* register write back */
165 /* register write back */
183 /* write fix-up */
232 if (!state.write)
/linux-master/arch/arc/mm/
H A Dfault.c79 unsigned int write = 0, exec = 0, mask; local
104 write = 1;
112 if (write)
125 if (write)
/linux-master/arch/arm/boot/compressed/
H A Dbig-endian.S13 mcr p15, 0, r0, c1, c0, 0 @ write control reg
H A Dhead.S145 mcr p15, 0, \reg, c1, c0, 0 @ write SCTLR
737 mcr p15, 0, r0, c3, c0, 0 @ write-buffer on
744 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
752 mcr p15, 0, r0, c1, c0, 0 @ write control reg
765 mcr p15, 0, r0, c3, c0, 0 @ write-buffer on
781 mcr p15, 0, r0, c1, c0, 0 @ write control reg
840 mcr p15, 0, r0, c1, c0, 0 @ write SCTLR
855 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
876 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
883 orr r0, r0, #0x003c @ write buffe
[all...]
/linux-master/arch/arm/crypto/
H A Daes-ce-core.S531 vst1.8 {q0-q1}, [r0]! @ write 4 ct blocks
623 vst1.8 {q0-q1}, [r0]! @ write 4 pt blocks
/linux-master/arch/arm/include/asm/
H A Dpgtable.h147 * 3) write implies read permissions
192 static inline bool pte_access_permitted(pte_t pte, bool write) argument
197 if (write)
H A Duaccess-asm.h79 mcr p15, 0, \tmp, c2, c0, 2 @ write TTBCR
93 mcr p15, 0, \tmp, c2, c0, 2 @ write TTBCR
H A Dvfpmacros.h56 @ write all the working registers out of the VFP
/linux-master/arch/arm/kernel/
H A Dentry-ftrace.S72 str r0, [sp, #8] @ write r0 as OLD_R0 over previous LR
H A Dentry-header.S149 @ write basic exception frame
H A Dhead-nommu.S184 mcr p15, 0, r0, c1, c0, 0 @ write control reg
H A Dhead.S227 add r4, r4, #4 @ we only write the bottom word
503 mcr p15, 0, r0, c1, c0, 0 @ write control reg
/linux-master/arch/arm/mach-dove/
H A Dpcie.c133 .write = pcie_wr_conf,
/linux-master/arch/arm/mach-footbridge/
H A Ddc21285.c130 .write = dc21285_write_config,
/linux-master/arch/arm/mach-imx/
H A Dheadsmp.S21 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
H A Dmmdc.c89 PMU_EVENT_ATTR_STRING(write-accesses, mmdc_pmu_write_accesses, "event=0x03")
93 PMU_EVENT_ATTR_STRING(write-bytes, mmdc_pmu_write_bytes, "event=0x05")
94 PMU_EVENT_ATTR_STRING(write-bytes.unit, mmdc_pmu_write_bytes_unit, "MB");
95 PMU_EVENT_ATTR_STRING(write-bytes.scale, mmdc_pmu_write_bytes_scale, "0.000001");
/linux-master/arch/arm/mach-mv78xx0/
H A Dpcie.c177 .write = pcie_wr_conf,
/linux-master/arch/arm/mach-omap1/
H A Dsleep.S31 * with this program; if not, write to the Free Software Foundation, Inc.,
146 @ Drain write cache
H A Dsram.S40 strh r1, [r3] @ write new ckctl value
41 strh r0, [r2] @ write new dpll value
/linux-master/arch/arm/mach-omap2/
H A Dsleep34xx.S77 str r1, [r2, r3] @ write to l2dis_3630
96 dsb @ data write barrier
209 str r5, [r4] @ write back to SDRC_POWER register
417 dsb @ data write barrier
428 dsb @ data write barrier
443 dsb @ data write barrier
528 str r5, [r4] @ write back change
531 str r5, [r4] @ write back change
534 str r5, [r4] @ write back change
540 str r5, [r4] @ write bac
[all...]
H A Dvc.c155 if (!voltdm->read || !voltdm->write) {
156 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
168 voltdm->write(vc_cmdval, vc->cmdval_reg);
210 voltdm->write(vc_bypass_value, vc_bypass_val_reg);
211 voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
290 vd->write(voltctrl, OMAP3_PRM_VOLTCTRL_OFFSET);
294 vd->write(c->voltsetup1,
299 vd->write(c->voltsetup2,
322 vd->write(val, OMAP4_PRM_VOLTCTRL_OFFSET);
346 voltdm->write(va
[all...]
H A Dvoltage.h54 * @write: write a VC/VP register
55 * @read: read-modify-write a VC/VP register
75 void (*write) (u32 val, u8 offset); member in struct:voltagedomain
H A Dvoltagedomains54xx_data.c37 .write = omap4_prm_vcvp_write,
48 .write = omap4_prm_vcvp_write,
59 .write = omap4_prm_vcvp_write,
/linux-master/arch/arm/mach-orion5x/
H A Dpci.c135 .write = pcie_wr_conf,
366 .write = orion5x_pci_wr_conf,
/linux-master/arch/arm/mach-shmobile/
H A Dheadsmp-scu.S28 str r2, [r0, #8] @ write back

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