Searched refs:val (Results 176 - 200 of 467) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/
H A Dar5212_misc.c282 uint32_t val = OS_REG_READ(ah, AR_BEACON); local
284 OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
292 OS_REG_WRITE(ah, AR_BEACON, val | AR_BEACON_RESET_TSF);
1168 uint32_t val; local
1169 val = OS_REG_READ(ah, AR_PHY_RADAR_0);
1172 val &= ~AR_PHY_RADAR_0_FIRPWR;
1173 val |= SM(pe->pe_firpwr, AR_PHY_RADAR_0_FIRPWR);
1176 val &= ~AR_PHY_RADAR_0_RRSSI;
1177 val |= SM(pe->pe_rrssi, AR_PHY_RADAR_0_RRSSI);
1180 val
1309 uint32_t val,temp; local
[all...]
H A Dar5212_attach.c185 uint32_t val; local
192 val = (OS_REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
193 val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
194 return ath_hal_reverseBits(val, 8);
329 uint32_t val; local
354 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
355 AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
356 AH_PRIVATE(ah)->ah_macRev = val
723 uint16_t capField, val; local
[all...]
/haiku/src/system/libroot/posix/glibc/extensions/
H A Dgetopt.h84 to the value given in the field `val' when the option is found, but
89 option's `flag' field to zero and its `val' field to a nonzero
92 returns the contents of the `val' field. */
105 int val; member in struct:option
/haiku/src/system/libroot/posix/glibc/intl/
H A Dloadinfo.h50 # define __builtin_expect(expr, val) (expr)
/haiku/headers/os/drivers/bus/
H A DATA.h43 status_t (*write_device_control)(void *channelCookie, uint8 val);
/haiku/headers/os/midi/
H A DMidiStore.h107 void Write32Bit(uint32 val);
108 void Write16Bit(uint16 val);
109 void WriteByte(uint8 val);
110 void WriteVarLength(uint32 val);
/haiku/src/add-ons/kernel/file_systems/nfs/
H A DXDROutPacket.h20 void XDROutPacketAddInt32 (struct XDROutPacket *packet, int32 val);
/haiku/src/add-ons/kernel/drivers/network/ether/rtl81xx/dev/mii/
H A Drgephy.c474 int val; local
484 val = PHY_READ(sc, 4) & 0xFFF;
485 PHY_WRITE(sc, 4, val);
492 val = (PHY_READ(sc, 4) & 0xFFF) | 0x7000;
493 PHY_WRITE(sc, 4, val);
498 val = (PHY_READ(sc, 4) & 0xFFF) | 0xA000;
499 PHY_WRITE(sc, 4, val);
504 val = (PHY_READ(sc, 4) & 0xFFF) | 0xB000;
505 PHY_WRITE(sc, 4, val);
510 val
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/haiku/src/libs/libfdt/
H A Dfdt_overlay.c30 const fdt32_t *val; local
33 val = fdt_getprop(fdto, fragment, "target", &len);
34 if (!val)
37 if ((len != sizeof(*val)) || (fdt32_to_cpu(*val) == (uint32_t)-1))
40 return fdt32_to_cpu(*val);
119 const fdt32_t *val; local
123 val = fdt_getprop(fdt, node, name, &len);
124 if (!val)
127 if (len != sizeof(*val))
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8192e/
H A Dr92e_init.c86 uint8_t val; local
88 val = rs->crystalcap & 0x3f;
91 RW(reg, R92E_AFE_XTAL_CTRL_ADDR, val | val << 6));
125 "BB: reg 0x%03x, val 0x%08x\n",
126 bb_prog->reg[j], bb_prog->val[j]);
128 rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]);
146 "AGC: val 0x%08x\n", agc_prog->val[j]);
149 agc_prog->val[
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/haiku/src/add-ons/accelerants/3dfx/
H A Daccelerant.h181 #define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val
182 #define OUTREG16(addr, val) *((vuint16*)(gInfo.regs + addr)) = val
183 #define OUTREG32(addr, val) *((vuint32*)(gInfo.regs + addr)) = val
/haiku/src/add-ons/accelerants/ati/
H A Daccelerant.h240 #define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val
241 #define OUTREG16(addr, val) *((vuint16*)(gInfo.regs + addr)) = val
242 #define OUTREG(addr, val) *((vuint32*)(gInfo.regs + addr)) = val
/haiku/src/add-ons/accelerants/s3/
H A Dregister_io.cpp21 #define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val
22 #define OUTREG16(addr, val) *((vuint16*)(gInfo.regs + addr)) = val
23 #define OUTREG32(addr, val) *((vuint32*)(gInfo.regs + addr)) = val
/haiku/src/libs/stdc++/legacy/
H A Diostream.cc272 static int read_int(istream& stream, unsigned LONGEST& val, int& neg) argument
298 val = 0;
317 val = 0;
338 val = base * val + digit;
360 unsigned LONGEST val; int neg;\
361 if (read_int(*this, val, neg)) {\
362 if (neg) val = -val;\
363 i = (TYPE)val;\
506 write_int(ostream& stream, unsigned LONGEST val, int sign) argument
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/haiku/src/add-ons/kernel/drivers/disk/nvme/libnvme/
H A Dnvme_common.h151 extern int nvme_parse_sysfs_value(const char *filename, unsigned long *val);
357 #define nvme_align_down(val, align) \
358 ((val) & (~((typeof(val))((align) - 1))))
359 #define nvme_align_up(val, align) \
360 nvme_align_down((val) + (align) - 1, (align))
/haiku/src/libs/compat/freebsd_network/compat/sys/
H A Dsysctl.h137 #define SYSCTL_ADD_INT(ctx, parent, nbr, name, access, ptr, val, descr) \
139 ptr, val, sysctl_handle_int, "I", __DESCR(descr))
141 #define SYSCTL_ADD_UINT(ctx, parent, nbr, name, access, ptr, val, descr) \
143 ptr, val, sysctl_handle_int, "IU", __DESCR(descr))
145 #define SYSCTL_ADD_XINT(ctx, parent, nbr, name, access, ptr, val, descr) \
147 ptr, val, sysctl_handle_int, "IX", __DESCR(descr))
/haiku/src/add-ons/kernel/drivers/network/ether/atheros813x/dev/alc/
H A Dif_alcvar.h262 #define CSR_WRITE_4(_sc, reg, val) \
263 bus_write_4((_sc)->alc_res[0], (reg), (val))
264 #define CSR_WRITE_2(_sc, reg, val) \
265 bus_write_2((_sc)->alc_res[0], (reg), (val))
266 #define CSR_WRITE_1(_sc, reg, val) \
267 bus_write_1((_sc)->alc_res[0], (reg), (val))
/haiku/src/add-ons/kernel/drivers/network/ether/atheros81xx/dev/ale/
H A Dif_alevar.h231 #define CSR_WRITE_4(_sc, reg, val) \
232 bus_write_4((_sc)->ale_res[0], (reg), (val))
233 #define CSR_WRITE_2(_sc, reg, val) \
234 bus_write_2((_sc)->ale_res[0], (reg), (val))
235 #define CSR_WRITE_1(_sc, reg, val) \
236 bus_write_1((_sc)->ale_res[0], (reg), (val))
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/
H A Dar5211_attach.c192 uint32_t val; local
198 val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;
199 val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
200 return ath_hal_reverseBits(val, 8);
214 uint32_t val; local
264 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;
265 AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
266 AH_PRIVATE(ah)->ah_macRev = val
[all...]
H A Dar5211_misc.c233 ar5211GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val) argument
241 reg |= (val&1) << gpio;
254 uint32_t val = OS_REG_READ(ah, AR_GPIODI); local
255 val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;
256 return val;
268 uint32_t val = OS_REG_READ(ah, AR_GPIOCR); local
271 val &= ~(AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA |
274 val |= AR_GPIOCR_INT_SEL0 | AR_GPIOCR_INT_ENA;
276 val |
369 uint32_t val = OS_REG_READ(ah, AR_BEACON); local
[all...]
/haiku/src/bin/fwcontrol/
H A Dfwcrom.c139 ptr->dir = (struct csrdirectory *) (reg + reg->val);
189 if (reg->key == CSRKEY_SPEC && reg->val == spec)
194 if (reg->key == CSRKEY_VER && reg->val == ver)
218 (vm_offset_t)(reg + reg->val) > CROM_END(cc)) {
222 textleaf = (struct csrtext *)(reg + reg->val);
327 len -= snprintf(buf, len, "%d", reg->val);
335 reg->val, reg->val);
341 dir = (struct csrdirectory *) (reg + reg->val);
363 crom_desc_specver(0, reg->val, bu
427 crom_add_entry(struct crom_chunk *chunk, int key, int val) argument
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/broadcom43xx/dev/bwi/
H A Dbwiphy.c160 uint16_t val; local
164 val = CSR_READ_2(sc, BWI_PHYINFO);
165 phyrev = __SHIFTOUT(val, BWI_PHYINFO_REV_MASK);
166 phytype = __SHIFTOUT(val, BWI_PHYINFO_TYPE_MASK);
167 phyver = __SHIFTOUT(val, BWI_PHYINFO_VER_MASK);
342 uint16_t val; local
344 val = PHY_READ(mac, 0x400) & 0xff;
345 if (val == 3 || val == 5) {
348 if (val
440 uint16_t val, ofs; local
517 uint16_t ofs, val; local
612 uint16_t val, ofs; local
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8192c/
H A Dr92c_init.c143 "BB: reg 0x%03x, val 0x%08x\n",
144 bb_prog->reg[j], bb_prog->val[j]);
146 rtwn_bb_write(sc, bb_prog->reg[j], bb_prog->val[j]);
180 "AGC: val 0x%08x\n", agc_prog->val[j]);
183 agc_prog->val[j]);
213 "RF: reg 0x%02x, val 0x%05x\n",
214 prog->reg[j], prog->val[j]);
222 rtwn_delay(sc, prog->val[j]);
226 rtwn_rf_write(sc, chain, prog->reg[j], prog->val[
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar9002/
H A Dar9280_attach.c159 uint32_t val; local
231 val = OS_REG_READ(ah, AR_SREV);
234 __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
235 MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
238 (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
239 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
240 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
430 uint32_t val; local
537 uint32_t val = HAL_INI_VAL(ia, i, modesIndex); local
[all...]
H A Dar9287_attach.c122 uint32_t val; local
198 val = OS_REG_READ(ah, AR_SREV);
201 __func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),
202 MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));
205 (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
206 AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
207 AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;

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