Searched refs:reg (Results 151 - 175 of 313) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8188e/pci/
H A Dr88ee_init.c162 uint8_t reg; local
246 reg = rtwn_read_1(sc, R92C_RSV_CTRL + 1);
247 rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
248 rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
/haiku/src/add-ons/kernel/drivers/network/ether/rtl8139/dev/rl/
H A Dif_rlreg.h946 #define CSR_WRITE_STREAM_4(sc, reg, val) \
947 bus_space_write_stream_4(sc->rl_btag, sc->rl_bhandle, reg, val)
948 #define CSR_WRITE_4(sc, reg, val) \
949 bus_space_write_4(sc->rl_btag, sc->rl_bhandle, reg, val)
950 #define CSR_WRITE_2(sc, reg, val) \
951 bus_space_write_2(sc->rl_btag, sc->rl_bhandle, reg, val)
952 #define CSR_WRITE_1(sc, reg, val) \
953 bus_space_write_1(sc->rl_btag, sc->rl_bhandle, reg, val)
955 #define CSR_READ_4(sc, reg) \
956 bus_space_read_4(sc->rl_btag, sc->rl_bhandle, reg)
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/rtl81xx/dev/rl/
H A Dif_rlreg.h946 #define CSR_WRITE_STREAM_4(sc, reg, val) \
947 bus_space_write_stream_4(sc->rl_btag, sc->rl_bhandle, reg, val)
948 #define CSR_WRITE_4(sc, reg, val) \
949 bus_space_write_4(sc->rl_btag, sc->rl_bhandle, reg, val)
950 #define CSR_WRITE_2(sc, reg, val) \
951 bus_space_write_2(sc->rl_btag, sc->rl_bhandle, reg, val)
952 #define CSR_WRITE_1(sc, reg, val) \
953 bus_space_write_1(sc->rl_btag, sc->rl_bhandle, reg, val)
955 #define CSR_READ_4(sc, reg) \
956 bus_space_read_4(sc->rl_btag, sc->rl_bhandle, reg)
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8188e/usb/
H A Dr88eu_init.c140 uint8_t reg; local
240 reg = rtwn_read_1(sc, R92C_RSV_CTRL + 1);
241 rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
242 rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
/haiku/src/add-ons/kernel/drivers/network/ether/wb840/
H A Dinterface.c226 wb_miibus_readreg(wb_device *device, int phy, int reg) argument
233 frame.mii_regaddr = reg;
241 wb_miibus_writereg(wb_device *device, int phy, int reg, int data) argument
248 frame.mii_regaddr = reg;
H A Dwb840.h486 #define WB_SETBIT(reg, x) write32(reg, read32(reg) | x)
487 #define WB_CLRBIT(reg, x) write32(reg, read32(reg) & ~x)
/haiku/src/add-ons/kernel/busses/scsi/ahci/
H A Dahci_defs.h359 wait_until_set(volatile uint32 *reg, uint32 bits, bigtime_t timeout) argument
363 if (((*reg) & bits) == bits)
372 wait_until_clear(volatile uint32 *reg, uint32 bits, bigtime_t timeout) argument
376 if (((*reg) & bits) == 0)
/haiku/headers/private/kernel/arch/arm64/
H A Darch_uart_linflex.h480 REG reg; local
481 reg.R = 0;
482 return reg;
535 void Out(TA* reg, TO value) { argument
536 *(volatile TO*)(reg) = value;
540 TI In(TA* reg) { argument
541 return *(volatile TI*)(reg);
/haiku/src/libs/compat/freebsd_network/compat/machine/x86/
H A Dcpufunc.h453 rxcr(u_int reg) argument
457 __asm __volatile("xgetbv" : "=a" (low), "=d" (high) : "c" (reg));
462 load_xcr(u_int reg, uint64_t val) argument
468 __asm __volatile("xsetbv" : : "c" (reg), "a" (low), "d" (high));
691 read_cyrix_reg(u_char reg) argument
693 outb(0x22, reg);
698 write_cyrix_reg(u_char reg, u_char data) argument
700 outb(0x22, reg);
783 u_char read_cyrix_reg(u_char reg);
792 void write_cyrix_reg(u_char reg, u_cha
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/broadcom440x/dev/bfe/
H A Dif_bfereg.h428 #define PCI_SETBIT(dev, reg, x, s) \
429 pci_write_config(dev, reg, (pci_read_config(dev, reg, s) | (x)), s)
430 #define PCI_CLRBIT(dev, reg, x, s) \
431 pci_write_config(dev, reg, (pci_read_config(dev, reg, s) & ~(x)), s)
446 #define CSR_READ_4(sc, reg) bus_read_4(sc->bfe_res, reg)
448 #define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->bfe_res, reg, va
[all...]
/haiku/src/add-ons/kernel/drivers/graphics/intel_extreme/
H A Ddevice.cpp76 uint32 reg = parse_expression(argv[1]); local
82 kprintf("intel_extreme register %#" B_PRIx32 "\n", reg);
85 uint32 oldValue = read32(info, reg);
91 write32(info, reg, value);
93 value = read32(info, reg);
/haiku/src/kits/debugger/dwarf/
H A DDwarfFile.cpp2426 TRACE_CFI(" reg %" B_PRIu32 "\n", i);
2579 B_PRId32 ", return address reg: %" B_PRIu32 "\n", length,
2630 TRACE_CFI(" DW_CFA_offset: reg: %" B_PRIu32 ", offset: "
2712 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2715 TRACE_CFI(" DW_CFA_offset_extended: reg: %" B_PRIu32 ", "
2716 "offset: %" B_PRIu64 "\n", reg, offset);
2718 if (CfaRule* rule = context.RegisterRule(reg)) {
2726 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2729 reg);
2731 context.RestoreRegisterRule(reg);
2736 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2746 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2786 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2797 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2838 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2852 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2866 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2893 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2907 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2921 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
2971 uint32 reg = dataReader.ReadUnsignedLEB128(0); local
[all...]
H A DDwarfExpressionEvaluator.h87 void _PushRegister(uint32 reg, target_addr_t offset);
/haiku/src/bin/
H A Dsysinfo.cpp295 print_TLB(uint32 reg, const char *pages) argument
301 entries[0] = (reg & 0xff);
302 ways[0] = ((reg >> 8) & 0xff);
303 entries[1] = ((reg >> 16) & 0xff);
304 ways[1] = ((reg >> 24) & 0xff);
319 print_level2_cache(uint32 reg, const char *name) argument
321 uint32 size = (reg >> 16) & 0xffff;
322 uint32 ways = (reg >> 12) & 0xf;
323 uint32 linesPerTag = (reg >> 8) & 0xf;
325 uint32 lineSize = reg
340 print_level1_cache(uint32 reg, const char *name) argument
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/
H A De1000_ich8lan.c1021 u16 reg; local
1030 &reg);
1037 reg &
1050 reg);
1062 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, &reg);
1067 reg &= ~I217_INBAND_CTRL_LINK_STAT_TX_TIMEOUT_MASK;
1071 reg |= 5 << I217_INBAND_CTRL_LINK_STAT_TX_TIMEOUT_SHIFT;
1077 reg |= 50 <<
1084 ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg);
1127 u32 reg local
2496 u32 reg = 0; local
3102 u16 reg; local
4973 u32 ctrl, reg; local
5193 u32 reg; local
5574 u32 reg; local
[all...]
/haiku/src/kits/interface/
H A DRegionSupport.cpp121 #define MEMCHECK(reg, rect, firstrect){\
122 if ((reg)->fCount >= ((reg)->fDataSize - 1)){\
124 ((char *)(firstrect), (unsigned) (2 * (sizeof(clipping_rect)) * ((reg)->fDataSize)));\
127 (reg)->fDataSize *= 2;\
128 (rect) = &(firstrect)[(reg)->fCount];\
144 #define ADDRECT(reg, r, rx1, ry1, rx2, ry2){\
146 CHECK_PREVIOUS((reg), (r), (rx1), (ry1), (rx2), (ry2))){\
151 EXTENTS((r), (reg));\
152 (reg)
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/attansic_l2/dev/ae/
H A Dif_ae.c114 static int ae_miibus_readreg(device_t dev, int phy, int reg);
115 static int ae_miibus_writereg(device_t dev, int phy, int reg, int val);
149 static int ae_vpd_read_word(ae_softc_t *sc, int reg, uint32_t *word);
193 #define AE_READ_4(sc, reg) \
194 bus_read_4((sc)->mem[0], (reg))
195 #define AE_READ_2(sc, reg) \
196 bus_read_2((sc)->mem[0], (reg))
197 #define AE_READ_1(sc, reg) \
198 bus_read_1((sc)->mem[0], (reg))
199 #define AE_WRITE_4(sc, reg, va
808 ae_miibus_readreg(device_t dev, int phy, int reg) argument
843 ae_miibus_writereg(device_t dev, int phy, int reg, int val) argument
945 ae_vpd_read_word(ae_softc_t *sc, int reg, uint32_t *word) argument
976 uint32_t word, reg, val; local
[all...]
/haiku/src/libs/x86emu/
H A Ddecode.c546 reg - Register to decode
556 decode_rm_byte_register(int reg) argument
558 switch (reg) {
590 reg - Register to decode
600 decode_rm_word_register(int reg) argument
602 switch (reg) {
634 reg - Register to decode
644 decode_rm_long_register(int reg) argument
646 switch (reg) {
678 reg
689 decode_rm_seg_register(int reg) argument
[all...]
/haiku/src/add-ons/kernel/drivers/power/x86_cpuidle/
H A Dacpi_cpuidle.cpp328 struct acpicpu_reg *reg = (struct acpicpu_reg *)pointer->data.buffer.buffer; local
329 switch (reg->reg_spaceid) {
332 if (reg->reg_addr == 0) {
336 if (reg->reg_bitwidth != 8) {
340 ci->address = reg->reg_addr;
347 ci->address = reg->reg_addr;
352 !(reg->reg_accesssize & ACPI_PDC_GAS_BM))
357 dprintf("invalid spaceid %" B_PRId8 "\n", reg->reg_spaceid);
/haiku/headers/private/usb_vision/
H A Dnt100x.h27 uint8 reg; member in struct:__anon1199
/haiku/src/add-ons/kernel/drivers/video/usb_vision/
H A Dtracing.c105 " reg:%02x\n"
107 ri->reg, ri->data_length);
/haiku/src/add-ons/kernel/drivers/network/ether/nforce/dev/nfe/
H A Dif_nfereg.h290 #define NFE_READ(sc, reg) \
291 bus_read_4((sc)->nfe_res[0], (reg))
293 #define NFE_WRITE(sc, reg, val) \
294 bus_write_4((sc)->nfe_res[0], (reg), (val))
/haiku/src/add-ons/kernel/drivers/network/wlan/ralinkwifi/dev/usb/wlan/
H A Dif_uralvar.h120 uint8_t reg; member in struct:ural_softc::__anon21
/haiku/src/add-ons/kernel/interrupt_controllers/openpic/
H A Dopenpic.cpp117 openpic_read(openpic_info *info, int reg) argument
120 info->virtual_registers + reg));
125 openpic_write(openpic_info *info, int reg, uint32 val) argument
127 info->pci->write_io_32(info->device, info->virtual_registers + reg,
206 "unknown (feature reg: 0x%lx)", x);
/haiku/src/kits/debugger/debug_info/
H A DDwarfImageDebugInfo.cpp112 const Register* reg = _RegisterAt(index); local
113 return reg != NULL ? reg->ValueType() : 0;
128 const Register* reg = _RegisterAt(index); local
129 return reg != NULL && reg->IsCalleePreserved();
199 const Register* reg = _RegisterAt(index); local
200 if (reg == NULL)
202 return fCpuState->GetRegisterValue(reg, _value);
207 const Register* reg local
664 const Register* reg = registers + i; local
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