Searched refs:chan (Results 151 - 175 of 1789) sorted by relevance

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/linux-master/sound/synth/emux/
H A Demux_voice.h34 void snd_emux_note_on(void *p, int note, int vel, struct snd_midi_channel *chan);
35 void snd_emux_note_off(void *p, int note, int vel, struct snd_midi_channel *chan);
36 void snd_emux_key_press(void *p, int note, int vel, struct snd_midi_channel *chan);
37 void snd_emux_terminate_note(void *p, int note, struct snd_midi_channel *chan);
38 void snd_emux_control(void *p, int type, struct snd_midi_channel *chan);
42 struct snd_midi_channel *chan, int update);
54 struct snd_midi_channel *chan, int type, int val);
56 struct snd_midi_channel *chan, int type, int val, int mode);
63 struct snd_midi_channel *chan, int param);
64 void snd_emux_nrpn(void *private_data, struct snd_midi_channel *chan,
[all...]
/linux-master/drivers/comedi/
H A Drange.c51 int subd, chan; local
56 chan = (it->range_type >> 16) & 0xff;
66 if (chan >= s->n_chan)
68 lr = s->range_table_list[chan];
110 int chan, range_len, i; local
114 chan = CR_CHAN(chanspec);
117 else if (s->range_table_list && chan < s->n_chan)
118 range_len = s->range_table_list[chan]->length;
121 if (chan >= s->n_chan ||
124 "bad chanlist[%d]=0x%08x chan
[all...]
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_fence.c131 nouveau_fence_update(struct nouveau_channel *chan, struct nouveau_fence_chan *fctx) argument
135 u32 seq = fctx->read(chan);
160 struct nouveau_channel *chan; local
163 chan = rcu_dereference_protected(fence->channel, lockdep_is_held(&fctx->lock));
164 if (nouveau_fence_update(chan, fctx))
182 nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_chan *fctx) argument
184 struct nouveau_fence_priv *priv = (void*)chan->drm->fence;
185 struct nouveau_cli *cli = (void *)chan->user.client;
196 fctx->context = chan->drm->runl[chan
222 struct nouveau_channel *chan = unrcu_pointer(fence->channel); local
264 struct nouveau_channel *chan; local
357 nouveau_fence_sync(struct nouveau_bo *nvbo, struct nouveau_channel *chan, bool exclusive, bool intr) argument
418 nouveau_fence_create(struct nouveau_fence **pfence, struct nouveau_channel *chan) argument
437 nouveau_fence_new(struct nouveau_fence **pfence, struct nouveau_channel *chan) argument
476 struct nouveau_channel *chan; local
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxgp100.c33 gp100_grctx_generate_pagepool(struct gf100_gr_chan *chan, u64 addr) argument
35 gf100_grctx_patch_wr32(chan, 0x40800c, addr >> 8);
36 gf100_grctx_patch_wr32(chan, 0x408010, 0x8007d800);
37 gf100_grctx_patch_wr32(chan, 0x419004, addr >> 8);
38 gf100_grctx_patch_wr32(chan, 0x419008, 0x00000000);
42 gp100_grctx_generate_attrib(struct gf100_gr_chan *chan) argument
44 struct gf100_gr *gr = chan->gr;
54 gf100_grctx_patch_wr32(chan, 0x405830, attrib);
55 gf100_grctx_patch_wr32(chan, 0x40585c, alpha);
56 gf100_grctx_patch_wr32(chan,
84 gp100_grctx_generate_attrib_cb(struct gf100_gr_chan *chan, u64 addr, u32 size) argument
[all...]
H A Dctxgp102.c40 gp102_grctx_generate_attrib(struct gf100_gr_chan *chan) argument
42 struct gf100_gr *gr = chan->gr;
53 gf100_grctx_patch_wr32(chan, 0x405830, attrib);
54 gf100_grctx_patch_wr32(chan, 0x40585c, alpha);
55 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);
69 gf100_grctx_patch_wr32(chan, o + 0xc0, gs);
70 gf100_grctx_patch_wr32(chan, p, bs);
71 gf100_grctx_patch_wr32(chan, o + 0xf4, bo);
72 gf100_grctx_patch_wr32(chan, o + 0xf0, bs);
74 gf100_grctx_patch_wr32(chan,
[all...]
/linux-master/drivers/mailbox/
H A Dhi3660-mailbox.c65 * @chan: Representation of channels in mailbox controller
75 struct mbox_chan chan[MBOX_CHAN_MAX]; member in struct:hi3660_mbox
85 static int hi3660_mbox_check_state(struct mbox_chan *chan) argument
87 unsigned long ch = (unsigned long)chan->con_priv;
88 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
112 static int hi3660_mbox_unlock(struct mbox_chan *chan) argument
114 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox);
133 static int hi3660_mbox_acquire_channel(struct mbox_chan *chan) argument
135 unsigned long ch = (unsigned long)chan->con_priv;
136 struct hi3660_mbox *mbox = to_hi3660_mbox(chan
159 hi3660_mbox_startup(struct mbox_chan *chan) argument
174 hi3660_mbox_send_data(struct mbox_chan *chan, void *msg) argument
241 struct mbox_chan *chan; local
[all...]
H A Darm_mhu_db.c75 static void mhu_db_mbox_clear_irq(struct mbox_chan *chan) argument
77 struct mhu_db_channel *chan_info = chan->con_priv;
98 struct mbox_chan *chan = NULL; local
112 chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
113 if (chan)
120 return chan;
125 struct mbox_chan *chan; local
129 while (NULL != (chan = mhu_db_mbox_irq_to_channel(mhu, pchan))) {
130 mbox_chan_received_data(chan, NULL);
131 mhu_db_mbox_clear_irq(chan);
137 mhu_db_last_tx_done(struct mbox_chan *chan) argument
148 mhu_db_send_data(struct mbox_chan *chan, void *data) argument
159 mhu_db_startup(struct mbox_chan *chan) argument
165 mhu_db_shutdown(struct mbox_chan *chan) argument
191 struct mbox_chan *chan; local
[all...]
H A Darm_mhuv2.c207 int (*rx_startup)(struct mhuv2 *mhu, struct mbox_chan *chan);
208 void (*rx_shutdown)(struct mhuv2 *mhu, struct mbox_chan *chan);
209 void *(*read_data)(struct mhuv2 *mhu, struct mbox_chan *chan);
211 void (*tx_startup)(struct mhuv2 *mhu, struct mbox_chan *chan);
212 void (*tx_shutdown)(struct mhuv2 *mhu, struct mbox_chan *chan);
213 int (*last_tx_done)(struct mhuv2 *mhu, struct mbox_chan *chan);
214 int (*send_data)(struct mhuv2 *mhu, struct mbox_chan *chan, void *arg);
261 static int mhuv2_doorbell_rx_startup(struct mhuv2 *mhu, struct mbox_chan *chan) argument
263 struct mhuv2_mbox_chan_priv *priv = chan->con_priv;
271 struct mbox_chan *chan)
270 mhuv2_doorbell_rx_shutdown(struct mhuv2 *mhu, struct mbox_chan *chan) argument
279 mhuv2_doorbell_read_data(struct mhuv2 *mhu, struct mbox_chan *chan) argument
288 mhuv2_doorbell_last_tx_done(struct mhuv2 *mhu, struct mbox_chan *chan) argument
297 mhuv2_doorbell_send_data(struct mhuv2 *mhu, struct mbox_chan *chan, void *arg) argument
325 mhuv2_data_transfer_rx_startup(struct mhuv2 *mhu, struct mbox_chan *chan) argument
339 mhuv2_data_transfer_rx_shutdown(struct mhuv2 *mhu, struct mbox_chan *chan) argument
348 mhuv2_data_transfer_read_data(struct mhuv2 *mhu, struct mbox_chan *chan) argument
385 mhuv2_data_transfer_tx_startup(struct mhuv2 *mhu, struct mbox_chan *chan) argument
398 mhuv2_data_transfer_tx_shutdown(struct mhuv2 *mhu, struct mbox_chan *chan) argument
408 mhuv2_data_transfer_last_tx_done(struct mhuv2 *mhu, struct mbox_chan *chan) argument
445 mhuv2_data_transfer_send_data(struct mhuv2 *mhu, struct mbox_chan *chan, void *arg) argument
543 struct mbox_chan *chan; local
624 struct mbox_chan *chan; local
679 struct mbox_chan *chan = get_irq_chan_rx(mhu); local
711 mhuv2_sender_last_tx_done(struct mbox_chan *chan) argument
719 mhuv2_sender_send_data(struct mbox_chan *chan, void *data) argument
730 mhuv2_sender_startup(struct mbox_chan *chan) argument
740 mhuv2_sender_shutdown(struct mbox_chan *chan) argument
756 mhuv2_receiver_startup(struct mbox_chan *chan) argument
764 mhuv2_receiver_shutdown(struct mbox_chan *chan) argument
772 mhuv2_receiver_send_data(struct mbox_chan *chan, void *data) argument
779 mhuv2_receiver_last_tx_done(struct mbox_chan *chan) argument
[all...]
H A Dhi6220-mailbox.c86 struct mbox_chan *chan; member in struct:hi6220_mbox
110 static bool hi6220_mbox_last_tx_done(struct mbox_chan *chan) argument
112 struct hi6220_mbox_chan *mchan = chan->con_priv;
123 static int hi6220_mbox_send_data(struct mbox_chan *chan, void *msg) argument
125 struct hi6220_mbox_chan *mchan = chan->con_priv;
153 struct mbox_chan *chan; local
168 chan = mbox->irq_map_chan[intr_bit];
169 if (!chan) {
175 mchan = chan->con_priv;
177 mbox_chan_txdone(chan,
194 hi6220_mbox_startup(struct mbox_chan *chan) argument
206 hi6220_mbox_shutdown(struct mbox_chan *chan) argument
228 struct mbox_chan *chan; local
[all...]
H A Dsun6i-msgbox.c53 static bool sun6i_msgbox_last_tx_done(struct mbox_chan *chan);
54 static bool sun6i_msgbox_peek_data(struct mbox_chan *chan);
56 static inline int channel_number(struct mbox_chan *chan) argument
58 return chan - chan->mbox->chans;
61 static inline struct sun6i_msgbox *to_sun6i_msgbox(struct mbox_chan *chan) argument
63 return chan->con_priv;
80 struct mbox_chan *chan = &mbox->controller.chans[n]; local
85 while (sun6i_msgbox_peek_data(chan)) {
89 mbox_chan_received_data(chan,
99 sun6i_msgbox_send_data(struct mbox_chan *chan, void *data) argument
115 sun6i_msgbox_startup(struct mbox_chan *chan) argument
139 sun6i_msgbox_shutdown(struct mbox_chan *chan) argument
162 sun6i_msgbox_last_tx_done(struct mbox_chan *chan) argument
179 sun6i_msgbox_peek_data(struct mbox_chan *chan) argument
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dgf100.c26 #include "chan.h"
41 gf100_chan_preempt(struct nvkm_chan *chan) argument
43 nvkm_wr32(chan->cgrp->runl->fifo->engine.subdev.device, 0x002634, chan->id);
47 gf100_chan_stop(struct nvkm_chan *chan) argument
49 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device;
51 nvkm_mask(device, 0x003004 + (chan->id * 8), 0x00000001, 0x00000000);
55 gf100_chan_start(struct nvkm_chan *chan) argument
57 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device;
59 nvkm_wr32(device, 0x003004 + (chan
65 gf100_chan_unbind(struct nvkm_chan *chan) argument
77 gf100_chan_bind(struct nvkm_chan *chan) argument
85 gf100_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv) argument
118 gf100_chan_userd_clear(struct nvkm_chan *chan) argument
161 gf100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
322 struct nvkm_chan *chan; local
419 gf100_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset) argument
542 struct nvkm_chan *chan; local
[all...]
/linux-master/drivers/dma/
H A Dfsl_raid.c86 /* Add descriptors into per chan software queue - submit_q */
95 re_chan = container_of(tx->chan, struct fsl_re_chan, chan);
105 /* Copy descriptor from per chan software queue into hardware job ring */
106 static void fsl_re_issue_pending(struct dma_chan *chan) argument
113 re_chan = container_of(chan, struct fsl_re_chan, chan);
155 fsl_re_issue_pending(&re_chan->chan);
220 dev_err(re_chan->dev, "chan error irqstate: %x, status: %x\n",
232 static enum dma_status fsl_re_tx_status(struct dma_chan *chan, argument
315 fsl_re_prep_dma_genq( struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, unsigned long flags) argument
390 fsl_re_prep_dma_xor( struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, unsigned int src_cnt, size_t len, unsigned long flags) argument
402 fsl_re_prep_dma_pq( struct dma_chan *chan, dma_addr_t *dest, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, unsigned long flags) argument
525 fsl_re_prep_dma_memcpy( struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) argument
572 fsl_re_alloc_chan_resources(struct dma_chan *chan) argument
602 fsl_re_free_chan_resources(struct dma_chan *chan) argument
628 struct fsl_re_chan *chan; local
849 fsl_re_remove_chan(struct fsl_re_chan *chan) argument
[all...]
H A Dof-dma.c58 struct dma_chan *chan; local
73 chan = ERR_PTR(-EPROBE_DEFER);
77 chan = ofdma_target->of_dma_xlate(&dma_spec_target, ofdma_target);
78 if (IS_ERR_OR_NULL(chan)) {
84 chan->router = ofdma->dma_router;
85 chan->route_data = route_data;
87 if (chan->device->device_router_config)
88 ret = chan->device->device_router_config(chan);
91 dma_release_channel(chan);
256 struct dma_chan *chan; local
355 struct dma_chan *chan, *candidate = NULL; local
[all...]
H A Dhisi_dma.c166 struct hisi_dma_chan chan[] __counted_by(chan_num);
322 return container_of(c, struct hisi_dma_chan, vc.chan);
420 static void hisi_dma_reset_or_disable_hw_chan(struct hisi_dma_chan *chan, argument
423 struct hisi_dma_dev *hdma_dev = chan->hdma_dev;
424 u32 index = chan->qp_num, tmp;
463 struct hisi_dma_chan *chan = to_hisi_dma_chan(c); local
464 struct hisi_dma_dev *hdma_dev = chan->hdma_dev;
466 hisi_dma_reset_or_disable_hw_chan(chan, false);
467 vchan_free_chan_resources(&chan->vc);
469 memset(chan
485 struct hisi_dma_chan *chan = to_hisi_dma_chan(c); local
506 hisi_dma_start_transfer(struct hisi_dma_chan *chan) argument
541 struct hisi_dma_chan *chan = to_hisi_dma_chan(c); local
554 struct hisi_dma_chan *chan = to_hisi_dma_chan(c); local
578 struct hisi_dma_chan *chan = to_hisi_dma_chan(c); local
588 struct hisi_dma_chan *chan; local
609 struct hisi_dma_chan *chan = &hdma_dev->chan[index]; local
729 struct hisi_dma_chan *chan = data; local
[all...]
/linux-master/net/vmw_vsock/
H A Dhyperv_transport.c100 struct vmbus_channel *chan; member in struct:hvsock
177 static void hvs_set_channel_pending_send_size(struct vmbus_channel *chan) argument
179 set_channel_pending_send_size(chan,
185 static bool hvs_channel_readable(struct vmbus_channel *chan) argument
187 u32 readable = hv_get_bytes_to_read(&chan->inbound);
193 static int hvs_channel_readable_payload(struct vmbus_channel *chan) argument
195 u32 readable = hv_get_bytes_to_read(&chan->inbound);
214 static size_t hvs_channel_writable_bytes(struct vmbus_channel *chan) argument
216 u32 writeable = hv_get_bytes_to_write(&chan->outbound);
231 static int __hvs_send_data(struct vmbus_channel *chan, argument
241 hvs_send_data(struct vmbus_channel *chan, struct hvs_send_buf *send_buf, size_t to_write) argument
252 struct vmbus_channel *chan = hvs->chan; local
281 hvs_close_connection(struct vmbus_channel *chan) argument
295 hvs_open_connection(struct vmbus_channel *chan) argument
546 struct vmbus_channel *chan = hvs->chan; local
649 struct vmbus_channel *chan = hvs->chan; local
870 struct vmbus_channel *chan = hdev->channel; local
884 struct vmbus_channel *chan = hdev->channel; local
[all...]
/linux-master/drivers/net/wan/
H A Dhd64572.h45 /* Register Access Macros (chan is 0 or 1 in _any_ case) */
46 #define M_REG(reg, chan) (reg + 0x80*chan) /* MSCI */
47 #define DRX_REG(reg, chan) (reg + 0x40*chan) /* DMA Rx */
48 #define DTX_REG(reg, chan) (reg + 0x20*(2*chan + 1)) /* DMA Tx */
49 #define TRX_REG(reg, chan) (reg + 0x20*chan) /* Timer Rx */
50 #define TTX_REG(reg, chan) (re
[all...]
/linux-master/drivers/iio/multiplexer/
H A Diio-mux.c34 struct iio_chan_spec *chan; member in struct:mux
43 struct iio_chan_spec const *chan = &mux->chan[idx]; local
47 ret = mux_control_select_delay(mux->control, chan->channel,
54 if (mux->cached_state == chan->channel)
57 if (chan->ext_info) {
58 for (i = 0; chan->ext_info[i].name; ++i) {
59 const char *attr = chan->ext_info[i].name;
78 mux->cached_state = chan->channel;
89 struct iio_chan_spec const *chan,
88 mux_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) argument
118 mux_read_avail(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, const int **vals, int *type, int *length, long mask) argument
146 mux_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument
178 mux_read_ext_info(struct iio_dev *indio_dev, uintptr_t private, struct iio_chan_spec const *chan, char *buf) argument
198 mux_write_ext_info(struct iio_dev *indio_dev, uintptr_t private, struct iio_chan_spec const *chan, const char *buf, size_t len) argument
245 struct iio_chan_spec *chan = &mux->chan[idx]; local
[all...]
/linux-master/drivers/iio/dac/
H A Dad7303.c53 static int ad7303_write(struct ad7303_state *st, unsigned int chan, argument
57 (chan << AD7303_CFG_ADDR_OFFSET) |
64 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
69 AD7303_CFG_POWER_DOWN(chan->channel)));
73 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
87 st->config |= AD7303_CFG_POWER_DOWN(chan->channel);
89 st->config &= ~AD7303_CFG_POWER_DOWN(chan->channel);
93 ad7303_write(st, chan->channel, st->dac_cache[chan->channel]);
100 struct iio_chan_spec const *chan)
63 ad7303_read_dac_powerdown(struct iio_dev *indio_dev, uintptr_t private, const struct iio_chan_spec *chan, char *buf) argument
72 ad7303_write_dac_powerdown(struct iio_dev *indio_dev, uintptr_t private, const struct iio_chan_spec *chan, const char *buf, size_t len) argument
99 ad7303_get_vref(struct ad7303_state *st, struct iio_chan_spec const *chan) argument
113 ad7303_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long info) argument
140 ad7303_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument
[all...]
H A Dmax517.c67 struct iio_chan_spec const *chan,
77 *val = data->vref_mv[chan->channel];
87 struct iio_chan_spec const *chan, int val, int val2, long mask)
93 ret = max517_set_value(indio_dev, val, chan->channel);
124 #define MAX517_CHANNEL(chan) { \
128 .channel = (chan), \
150 int chan; local
181 for (chan = 0; chan < indio_dev->num_channels; chan
66 max517_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) argument
86 max517_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument
[all...]
/linux-master/arch/mips/kernel/
H A Drtlx.c38 struct rtlx_channel *chan = &rtlx->channel[i]; local
41 chan->rt_state, chan->lx_state, chan->buffer_size);
44 chan->rt_read, chan->rt_write);
47 chan->lx_read, chan->lx_write);
49 pr_info(" rt_buffer <%s>\n", chan->rt_buffer);
50 pr_info(" lx_buffer <%s>\n", chan
94 struct rtlx_channel *chan; local
194 struct rtlx_channel *chan; local
236 struct rtlx_channel *chan = &rtlx->channel[index]; local
[all...]
/linux-master/drivers/usb/dwc2/
H A Dhcd.c395 * @chan: Pointer to the channel to dump
403 struct dwc2_host_chan *chan)
414 if (!chan)
417 hcchar = dwc2_readl(hsotg, HCCHAR(chan->hc_num));
418 hcsplt = dwc2_readl(hsotg, HCSPLT(chan->hc_num));
419 hctsiz = dwc2_readl(hsotg, HCTSIZ(chan->hc_num));
420 hc_dma = dwc2_readl(hsotg, HCDMA(chan->hc_num));
422 dev_dbg(hsotg->dev, " Assigned to channel %p:\n", chan);
428 chan->dev_addr, chan
402 dwc2_dump_channel_info(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
453 struct dwc2_host_chan *chan = hsotg->hc_ptr_array[i]; local
495 dwc2_hc_enable_slave_ints(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
573 dwc2_hc_enable_dma_ints(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
610 dwc2_hc_enable_ints(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
651 dwc2_hc_init(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
766 dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, enum dwc2_halt_status halt_status) argument
930 dwc2_hc_cleanup(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
958 dwc2_hc_set_even_odd_frame(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, u32 *hcchar) argument
1057 dwc2_set_pid_isoc(struct dwc2_host_chan *chan) argument
1093 dwc2_hc_write_packet(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
1139 dwc2_hc_do_ping(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
1192 dwc2_hc_start_transfer(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
1407 dwc2_hc_start_transfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
1496 dwc2_hc_continue_transfer(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan) argument
2271 struct dwc2_host_chan *chan, *chan_tmp; local
2305 dwc2_hc_init_split(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd, struct dwc2_hcd_urb *urb) argument
2319 dwc2_hc_init_xfer(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd) argument
2409 dwc2_alloc_split_dma_aligned_buf(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh, struct dwc2_host_chan *chan) argument
2546 struct dwc2_host_chan *chan; local
2788 dwc2_queue_transaction(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, u16 fifo_dwords_avail) argument
3862 struct dwc2_host_chan *chan; local
5044 struct dwc2_host_chan *chan = hsotg->hc_ptr_array[i]; local
[all...]
/linux-master/include/linux/firmware/intel/
H A Dstratix10-svc-client.h243 * @chan: service channel to be freed
245 void stratix10_svc_free_channel(struct stratix10_svc_chan *chan);
249 * @chan: service channel assigned to the client
258 void *stratix10_svc_allocate_memory(struct stratix10_svc_chan *chan,
263 * @chan: service channel assigned to the client
266 void stratix10_svc_free_memory(struct stratix10_svc_chan *chan, void *kaddr);
270 * @chan: service channel assigned to the client
276 int stratix10_svc_send(struct stratix10_svc_chan *chan, void *msg);
280 * @chan: service channel assigned to the client
286 void stratix10_svc_done(struct stratix10_svc_chan *chan);
[all...]
/linux-master/drivers/dma/sh/
H A Dshdma.h35 struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS]; member in struct:sh_dmae_device
55 #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
58 #define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
/linux-master/drivers/dma/ppc4xx/
H A Dadma.c67 struct dma_chan *chan; member in struct:ppc_dma_chan_ref
129 static void print_cb(struct ppc440spe_adma_chan *chan, void *block) argument
135 switch (chan->device->id) {
145 cdb, chan->device->id,
159 cb, chan->device->id,
173 static void print_cb_list(struct ppc440spe_adma_chan *chan, argument
177 print_cb(chan, iter->hw_desc);
232 struct ppc440spe_adma_chan *chan)
236 switch (chan->device->id) {
250 printk(KERN_ERR "Unsupported id %d in %s\n", chan
231 ppc440spe_desc_init_interrupt(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan) argument
522 ppc440spe_desc_set_src_addr(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan, int src_idx, dma_addr_t addrh, dma_addr_t addrl) argument
557 ppc440spe_desc_set_src_mult(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan, u32 mult_index, int sg_index, unsigned char mult_value) argument
601 ppc440spe_desc_set_dest_addr(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan, dma_addr_t addrh, dma_addr_t addrl, u32 dst_idx) argument
642 ppc440spe_desc_set_byte_count(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan, u32 byte_count) argument
677 ppc440spe_desc_set_dcheck(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan, u8 *qword) argument
721 ppc440spe_desc_set_link(struct ppc440spe_adma_chan *chan, struct ppc440spe_adma_desc_slot *prev_desc, struct ppc440spe_adma_desc_slot *next_desc) argument
769 ppc440spe_desc_get_link(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan) argument
896 ppc440spe_adma_device_clear_eot_status( struct ppc440spe_adma_chan *chan) argument
1016 ppc440spe_chan_is_busy(struct ppc440spe_adma_chan *chan) argument
1047 ppc440spe_chan_set_first_xor_descriptor( struct ppc440spe_adma_chan *chan, struct ppc440spe_adma_desc_slot *next_desc) argument
1074 ppc440spe_dma_put_desc(struct ppc440spe_adma_chan *chan, struct ppc440spe_adma_desc_slot *desc) argument
1094 ppc440spe_chan_append(struct ppc440spe_adma_chan *chan) argument
1173 ppc440spe_chan_get_current_descriptor(struct ppc440spe_adma_chan *chan) argument
1197 ppc440spe_chan_run(struct ppc440spe_adma_chan *chan) argument
1326 ppc440spe_adma_estimate(struct dma_chan *chan, enum dma_transaction_type cap, struct page **dst_lst, int dst_cnt, struct page **src_lst, int src_cnt, size_t src_sz) argument
1444 ppc440spe_adma_free_slots(struct ppc440spe_adma_desc_slot *slot, struct ppc440spe_adma_chan *chan) argument
1461 ppc440spe_adma_run_tx_complete_actions( struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan, dma_cookie_t cookie) argument
1487 ppc440spe_adma_clean_slot(struct ppc440spe_adma_desc_slot *desc, struct ppc440spe_adma_chan *chan) argument
1533 __ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan) argument
1663 struct ppc440spe_adma_chan *chan = from_tasklet(chan, t, irq_tasklet); local
1673 ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan) argument
1683 ppc440spe_adma_alloc_slots( struct ppc440spe_adma_chan *chan, int num_slots, int slots_per_op) argument
1764 ppc440spe_adma_alloc_chan_resources(struct dma_chan *chan) argument
1879 ppc440spe_adma_check_threshold(struct ppc440spe_adma_chan *chan) argument
1898 struct ppc440spe_adma_chan *chan = to_ppc440spe_adma_chan(tx->chan); local
1944 ppc440spe_adma_prep_dma_interrupt( struct dma_chan *chan, unsigned long flags) argument
1975 ppc440spe_adma_prep_dma_memcpy( struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src, size_t len, unsigned long flags) argument
2016 ppc440spe_adma_prep_dma_xor( struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t *dma_src, u32 src_cnt, size_t len, unsigned long flags) argument
2100 struct ppc440spe_adma_chan *chan; local
2186 struct ppc440spe_adma_chan *chan; local
2507 ppc440spe_adma_prep_dma_pq( struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, unsigned long flags) argument
2583 ppc440spe_adma_prep_dma_pqzero_sum( struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, unsigned int src_cnt, const unsigned char *scf, size_t len, enum sum_check_flags *pqres, unsigned long flags) argument
2635 struct ppc440spe_adma_chan *chan; local
2658 struct ppc440spe_adma_chan *chan; local
2735 struct ppc440spe_adma_chan *chan; local
2762 ppc440spe_adma_prep_dma_xor_zero_sum( struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, size_t len, enum sum_check_flags *result, unsigned long flags) argument
2786 struct ppc440spe_adma_chan *chan; local
2809 ppc440spe_adma_pq_zero_op(struct ppc440spe_adma_desc_slot *iter, struct ppc440spe_adma_chan *chan, dma_addr_t addr) argument
2834 struct ppc440spe_adma_chan *chan; local
3024 struct ppc440spe_adma_chan *chan; local
3099 struct ppc440spe_adma_chan *chan; local
3209 struct ppc440spe_adma_chan *chan; local
3450 struct ppc440spe_adma_chan *chan; local
3532 ppc440spe_adma_free_chan_resources(struct dma_chan *chan) argument
3573 ppc440spe_adma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
3594 struct ppc440spe_adma_chan *chan = data; local
3611 struct ppc440spe_adma_chan *chan = data; local
3633 ppc440spe_adma_issue_pending(struct dma_chan *chan) argument
3653 ppc440spe_chan_start_null_xor(struct ppc440spe_adma_chan *chan) argument
3699 ppc440spe_test_raid6(struct ppc440spe_adma_chan *chan) argument
3864 ppc440spe_adma_setup_irqs(struct ppc440spe_adma_device *adev, struct ppc440spe_adma_chan *chan, int *initcode) argument
3971 ppc440spe_adma_release_irqs(struct ppc440spe_adma_device *adev, struct ppc440spe_adma_chan *chan) argument
4009 struct ppc440spe_adma_chan *chan; local
4238 struct dma_chan *chan, *_chan; local
[all...]
/linux-master/drivers/hwmon/
H A Dlochnagar-hwmon.c89 static int do_measurement(struct regmap *regmap, int chan, argument
95 chan = 1 << (chan + LOCHNAGAR2_IMON_MEASURED_CHANNELS_SHIFT);
98 LOCHNAGAR2_IMON_ENA_MASK | chan | mode);
140 static int request_data(struct regmap *regmap, int chan, u32 *data) argument
147 chan << LOCHNAGAR2_IMON_CH_SEL_SHIFT);
172 static int read_sensor(struct device *dev, int chan, argument
183 ret = do_measurement(regmap, chan, mode, nsamples);
189 ret = request_data(regmap, chan, &data);
203 static int read_power(struct device *dev, int chan, lon argument
235 lochnagar_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr, int chan) argument
255 lochnagar_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int chan, long *val) argument
284 lochnagar_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, int chan, const char **str) argument
299 lochnagar_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int chan, long val) argument
[all...]

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