Searched refs:cache (Results 151 - 175 of 961) sorted by relevance

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/linux-master/arch/powerpc/boot/dts/fsl/
H A Dp1010si-pre.dtsi64 next-level-cache = <&L2>;
/linux-master/arch/powerpc/kernel/
H A Dcpu_setup_pa6t.S13 #include <asm/cache.h>
/linux-master/lib/
H A Ddebug_info.c13 #include <linux/fscache-cache.h>
/linux-master/drivers/md/bcache/
H A Dfeatures.c33 if (BCH_HAS_ ## type ## _FEATURE(&c->cache->sb, f->mask)) { \
47 if (BCH_HAS_ ## type ## _FEATURE(&c->cache->sb, f->mask)) \
H A Dio.c30 meta_bucket_pages(&c->cache->sb), 0);
40 bio_set_dev(bio, c->cache->bdev);
82 void bch_count_io_errors(struct cache *ca,
141 struct cache *ca = c->cache;
/linux-master/fs/cachefiles/
H A Dxattr.c29 XATTR_USER_PREFIX "CacheFiles.cache";
37 * set the state xattr on a cache file
92 * check the consistency between the backing cache and the FS-Cache cookie
129 pr_warn("Dirty object in cache\n");
145 int cachefiles_remove_object_xattr(struct cachefiles_cache *cache, argument
160 cachefiles_io_error(cache,
171 * Stick a marker on the cache object to indicate that it's dirty.
177 struct cachefiles_cache *cache = object->volume->cache; local
182 cachefiles_begin_secure(cache,
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/linux-master/drivers/hwmon/
H A Dbt1-pvt.c178 * IRQs being periodically raised to get the data cache/alarms status up to
195 * driver data cache. This solution is implemented if hwmon alarms are enabled
208 struct pvt_cache *cache; local
223 cache = &pvt->cache[pvt->sensor];
251 * We can now update the data cache with data just retrieved from the
255 write_seqlock(&cache->data_seqlock);
257 cache->data = FIELD_GET(PVT_DATA_DATA_MASK, val);
259 write_sequnlock(&cache->data_seqlock);
267 if ((thres_sts & info->thres_sts_lo) ^ cache
293 struct pvt_cache *cache = &pvt->cache[type]; local
411 struct pvt_cache *cache; local
455 struct pvt_cache *cache = &pvt->cache[type]; local
662 ktime_t kt, cache; local
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/linux-master/arch/arc/lib/
H A Dmemset-archs.S7 #include <asm/cache.h>
11 * instruction in case of CPU with 64B L1 data cache line (L1_CACHE_SHIFT == 6)
12 * If you want to implement optimized memset for other possible L1 data cache
14 * we don't call any prefetchw/prealloc instruction for L1 cache lines which
/linux-master/mm/kasan/
H A Dreport_generic.c46 size_t kasan_get_alloc_size(void *object, struct kmem_cache *cache) argument
61 while (size < cache->object_size) {
71 return cache->object_size;
168 if (!info->cache || !info->object)
171 alloc_meta = kasan_get_alloc_meta(info->cache, info->object);
178 free_meta = kasan_get_free_meta(info->cache, info->object);
189 void kasan_print_aux_stacks(struct kmem_cache *cache, const void *object) argument
193 alloc_meta = kasan_get_alloc_meta(cache, object);
H A Dreport_tags.c37 if ((!info->cache || !info->object) && !info->bug_type) {
63 info->cache->object_size != entry->size)
H A Dkasan.h218 struct kmem_cache *cache; member in struct:kasan_report_info
359 size_t kasan_get_alloc_size(void *object, struct kmem_cache *cache);
376 void kasan_print_aux_stacks(struct kmem_cache *cache, const void *object);
378 static inline void kasan_print_aux_stacks(struct kmem_cache *cache, const void *object) { } argument
388 struct kasan_alloc_meta *kasan_get_alloc_meta(struct kmem_cache *cache,
390 struct kasan_free_meta *kasan_get_free_meta(struct kmem_cache *cache,
392 void kasan_init_object_meta(struct kmem_cache *cache, const void *object);
394 static inline void kasan_init_object_meta(struct kmem_cache *cache, const void *object) { } argument
400 void kasan_save_alloc_info(struct kmem_cache *cache, void *object, gfp_t flags);
401 void kasan_save_free_info(struct kmem_cache *cache, voi
408 kasan_quarantine_put(struct kmem_cache *cache, void *object) argument
410 kasan_quarantine_remove_cache(struct kmem_cache *cache) argument
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H A Dkasan_test.c235 * that does not fit into the largest slab cache and therefore is allocated via
931 struct kmem_cache *cache; local
933 cache = kmem_cache_create("test_cache", size, 0, 0, NULL);
934 KUNIT_ASSERT_NOT_ERR_OR_NULL(test, cache);
936 p = kmem_cache_alloc(cache, GFP_KERNEL);
939 kmem_cache_destroy(cache);
945 kmem_cache_free(cache, p);
946 kmem_cache_destroy(cache);
953 struct kmem_cache *cache; local
955 cache
974 struct kmem_cache *cache; local
1003 struct kmem_cache *cache; local
1017 struct kmem_cache *cache; local
1041 struct kmem_cache *cache; local
1088 struct kmem_cache *cache; local
1174 struct kmem_cache *cache; local
1237 struct kmem_cache *cache; local
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/linux-master/arch/arm/mm/
H A Dcache-v6.S3 * linux/arch/arm/mm/cache-v6.S
27 * Flush the whole I-cache.
42 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
43 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
44 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
45 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
51 mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
59 * Flush the entire cache.
66 mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate
68 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidat
[all...]
H A Dproc-arm946.S7 * (Many of cache codes are from proc-arm926.S)
44 bic r0, r0, #0x00001000 @ i-cache
45 bic r0, r0, #0x00000004 @ d-cache
57 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
58 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
62 bic ip, ip, #0x00001000 @ i-cache
83 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
96 * Clean and invalidate the entire cache.
103 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
114 mcrne p15, 0, ip, c7, c5, 0 @ flush I cache
[all...]
H A Dproc-arm940.S37 bic r0, r0, #0x00001000 @ i-cache
38 bic r0, r0, #0x00000004 @ d-cache
50 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
51 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
55 bic ip, ip, #0x00001000 @ i-cache
76 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
89 * Clean and invalidate the entire cache.
98 * There is no efficient way to flush a range of cache entries
108 mcr p15, 0, ip, c7, c6, 0 @ flush D cache
119 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
[all...]
H A Dcache-v7m.S3 * linux/arch/arm/mm/cache-v7m.S
5 * Based on linux/arch/arm/mm/cache-v7.S
23 /* Generic V7M read/write macros for memory mapped cache operations */
50 * dcisw: Invalidate data cache by set/way
57 * dccisw: Clean and invalidate data cache by set/way
64 * dccimvac: Clean and invalidate data cache line by MVA to PoC.
73 * dcimvac: Invalidate data cache line by MVA to PoC
82 * dccmvau: Clean data cache line by MVA to PoU
89 * dccmvac: Clean data cache line by MVA to PoC
157 * Flush the whole I-cache
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/linux-master/sound/firewire/motu/
H A Dmotu-stream.c156 kfree(motu->cache.event_offsets);
157 motu->cache.event_offsets = NULL;
188 motu->cache.size = motu->tx_stream.syt_interval * frames_per_buffer;
189 motu->cache.event_offsets = kcalloc(motu->cache.size, sizeof(*motu->cache.event_offsets),
191 if (!motu->cache.event_offsets) {
285 motu->cache.tail = 0;
286 motu->cache.tx_cycle_count = UINT_MAX;
287 motu->cache
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/linux-master/include/net/
H A Dnetlabel.h110 * struct netlbl_lsm_cache - NetLabel LSM security attribute cache
112 * @free: LSM supplied function to free the cache data
113 * @data: LSM supplied cache data
118 * cache. If the LSM has to perform a lot of translation from the NetLabel
119 * security attributes into it's own internal representation then the cache
121 * overhead on a cache hit.
164 * @cache: NetLabel LSM specific cache
197 struct netlbl_lsm_cache *cache; member in struct:netlbl_lsm_secattr
223 * @cache_invalidate: invalidate cache
279 struct netlbl_lsm_cache *cache; local
295 netlbl_secattr_cache_free(struct netlbl_lsm_cache *cache) argument
[all...]
/linux-master/drivers/md/
H A DMakefile21 dm-cache-y += dm-cache-target.o dm-cache-metadata.o dm-cache-policy.o \
22 dm-cache-background-tracker.o
23 dm-cache-smq-y += dm-cache-policy-smq.o
31 raid456-y += raid5.o raid5-cache.o raid5-ppl.o
72 obj-$(CONFIG_DM_CACHE) += dm-cache.o
73 obj-$(CONFIG_DM_CACHE_SMQ) += dm-cache
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/linux-master/net/rds/
H A Dib_recv.c89 static void rds_ib_cache_xfer_to_ready(struct rds_ib_refill_cache *cache) argument
93 tmp = xchg(&cache->xfer, NULL);
95 if (cache->ready)
96 list_splice_entire_tail(tmp, cache->ready);
98 cache->ready = tmp;
102 static int rds_ib_recv_alloc_cache(struct rds_ib_refill_cache *cache, gfp_t gfp) argument
107 cache->percpu = alloc_percpu_gfp(struct rds_ib_cache_head, gfp);
108 if (!cache->percpu)
112 head = per_cpu_ptr(cache->percpu, cpu);
116 cache
136 rds_ib_cache_splice_all_lists(struct rds_ib_refill_cache *cache, struct list_head *caller_list) argument
479 rds_ib_recv_cache_put(struct list_head *new_item, struct rds_ib_refill_cache *cache) argument
519 rds_ib_recv_cache_get(struct rds_ib_refill_cache *cache) argument
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/linux-master/drivers/acpi/
H A Dpptt.c8 * which is optionally used to describe the processor and cache topology.
14 * the caches available at that level. Each cache structure optionally
15 * contains properties describing the cache at a given level which can be
83 * @local_level: passed res reflects this cache level
84 * @split_levels: Number of split cache levels (data/instruction).
85 * @res: cache resource in the PPTT we want to walk
87 * @level: the requested cache level
88 * @type: the requested cache type
90 * Attempt to find a given cache level, while counting the max number
91 * of cache level
109 struct acpi_pptt_cache *cache; local
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/linux-master/drivers/net/wireless/st/cw1200/
H A Dtxrx.c45 /* TX policy cache implementation */
213 static int tx_policy_find(struct tx_policy_cache *cache, argument
217 * the cache.
222 list_for_each_entry(it, &cache->used, link) {
224 return it - cache->cache;
227 list_for_each_entry(it, &cache->free, link) {
229 return it - cache->cache;
234 static inline void tx_policy_use(struct tx_policy_cache *cache, argument
241 tx_policy_release(struct tx_policy_cache *cache, struct tx_policy_cache_entry *entry) argument
253 struct tx_policy_cache *cache = &priv->tx_policy_cache; local
283 struct tx_policy_cache *cache = &priv->tx_policy_cache; local
301 struct tx_policy_cache *cache = &priv->tx_policy_cache; local
340 struct tx_policy_cache *cache = &priv->tx_policy_cache; local
354 struct tx_policy_cache *cache = &priv->tx_policy_cache; local
[all...]
/linux-master/drivers/power/supply/
H A Dbq27xxx_battery.c1762 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1764 if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1766 if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1768 if (unlikely(bq27xxx_battery_capacity_inaccurate(di, di->cache.flags)))
1793 struct bq27xxx_reg_cache *cache)
1805 if (cache) {
1806 flags = cache->flags;
1847 struct bq27xxx_reg_cache cache = {0, }; local
1850 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1851 if ((cache
1789 bq27xxx_battery_current_and_status( struct bq27xxx_device_info *di, union power_supply_propval *val_curr, union power_supply_propval *val_status, struct bq27xxx_reg_cache *cache) argument
[all...]
/linux-master/arch/mips/alchemy/common/
H A Dsleeper.S92 /* cache following instructions, as memory gets put to sleep */
95 cache 0x14, 0(t0)
96 cache 0x14, 32(t0)
97 cache 0x14, 64(t0)
98 cache 0x14, 96(t0)
118 /* cache following instructions, as memory gets put to sleep */
121 cache 0x14, 0(t0)
122 cache 0x14, 32(t0)
123 cache 0x14, 64(t0)
124 cache
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/linux-master/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp_rtsym.c54 nfp_rtsym_sw_entry_init(struct nfp_rtsym_table *cache, u32 strtab_size, argument
58 sw->name = cache->strtab + le16_to_cpu(fw->name) % strtab_size;
101 struct nfp_rtsym_table *cache; local
121 size = sizeof(*cache);
124 cache = kmalloc(size, GFP_KERNEL);
125 if (!cache)
128 cache->cpp = cpp;
129 cache->num = symtab_size / sizeof(*rtsymtab);
130 cache->strtab = (void *)&cache
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