Searched refs:base (Results 151 - 175 of 6511) sorted by relevance

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/linux-master/drivers/rtc/
H A Drtc-goldfish.c17 void __iomem *base; member in struct:goldfish_rtc
28 void __iomem *base; local
32 base = rtcdrv->base;
34 rtc_alarm_low = gf_ioread32(base + TIMER_ALARM_LOW);
35 rtc_alarm_high = gf_ioread32(base + TIMER_ALARM_HIGH);
43 if (gf_ioread32(base + TIMER_ALARM_STATUS))
57 void __iomem *base; local
60 base = rtcdrv->base;
84 void __iomem *base; local
101 void __iomem *base = rtcdrv->base; local
113 void __iomem *base; local
135 void __iomem *base; local
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/linux-master/drivers/gpu/drm/sun4i/
H A Dsun8i_csc.h20 #define SUN8I_CSC_CTRL(base) ((base) + 0x0)
21 #define SUN8I_CSC_COEFF(base, i) ((base) + 0x10 + 4 * (i))
/linux-master/include/linux/mfd/
H A Dbcm2835-pm.h10 void __iomem *base; member in struct:bcm2835_pm
/linux-master/arch/arm/mach-omap2/
H A Dtimer.c60 void __iomem *base; local
66 base = ioremap(REALTIME_COUNTER_BASE, SZ_32);
67 if (!base) {
74 iounmap(base);
145 reg = readl_relaxed(base + INCREMENTER_NUMERATOR_OFFSET) &
148 writel_relaxed(reg, base + INCREMENTER_NUMERATOR_OFFSET);
150 reg = readl_relaxed(base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET) &
153 writel_relaxed(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
158 iounmap(base);
/linux-master/include/drm/
H A Di915_component.h46 * @base: the drm_audio_component base class
48 struct drm_audio_component base; member in struct:i915_audio_component
/linux-master/include/linux/
H A Daperture.h13 resource_size_t base,
16 int aperture_remove_conflicting_devices(resource_size_t base, resource_size_t size,
24 resource_size_t base,
30 static inline int aperture_remove_conflicting_devices(resource_size_t base, resource_size_t size, argument
23 devm_aperture_acquire_for_platform_device(struct platform_device *pdev, resource_size_t base, resource_size_t size) argument
/linux-master/include/crypto/internal/
H A Dsig.h15 return crypto_tfm_ctx(&tfm->base);
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
H A Dnv04.c24 #define nv04_instmem(p) container_of((p), struct nv04_instmem, base)
31 struct nvkm_instmem base; member in struct:nv04_instmem
38 #define nv04_instobj(p) container_of((p), struct nv04_instobj, base.memory)
41 struct nvkm_instobj base; member in struct:nv04_instobj
50 struct nvkm_device *device = iobj->imem->base.subdev.device;
58 struct nvkm_device *device = iobj->imem->base.subdev.device;
77 struct nvkm_device *device = iobj->imem->base.subdev.device;
103 mutex_lock(&iobj->imem->base.mutex);
105 mutex_unlock(&iobj->imem->base.mutex);
106 nvkm_instobj_dtor(&iobj->imem->base,
121 nv04_instobj_new(struct nvkm_instmem *base, u32 size, u32 align, bool zero, struct nvkm_memory **pmemory) argument
201 nv04_instmem_oneinit(struct nvkm_instmem *base) argument
241 nv04_instmem_dtor(struct nvkm_instmem *base) argument
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/linux-master/drivers/gpu/drm/xe/
H A Dxe_gt_sysfs.h16 return container_of(kobj, struct kobj_gt, base)->gt;
H A Dxe_gt_sysfs_types.h20 /** @base: The actual kobject */
21 struct kobject base; member in struct:kobj_gt
H A Dxe_gt_tlb_invalidation_types.h18 /** @base: dma fence base */
19 struct dma_fence base; member in struct:xe_gt_tlb_invalidation_fence
H A Dxe_sa_types.h13 struct drm_suballoc_manager base; member in struct:xe_sa_manager
H A Dxe_tile_sysfs.h16 return container_of(kobj, struct kobj_tile, base)->tile;
H A Dxe_tile_sysfs_types.h21 /** @base: The actual kobject */
22 struct kobject base; member in struct:kobj_tile
H A Dxe_ttm_sys_mgr.c20 struct ttm_range_mgr_node base; member in struct:xe_ttm_sys_node
26 return container_of(res, struct xe_ttm_sys_node, base.base);
37 node = kzalloc(struct_size(node, base.mm_nodes, 1), GFP_KERNEL);
42 ttm_resource_init(tbo, place, &node->base.base);
50 node->base.mm_nodes[0].start = 0;
51 node->base.mm_nodes[0].size = PFN_UP(node->base.base
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H A Dxe_wopcm_types.h19 /** @guc.base: GuC WOPCM base which is offset from WOPCM base */
20 u32 base; member in struct:xe_wopcm::__anon650
/linux-master/drivers/clk/stm32/
H A Dreset-stm32.h14 void __iomem *base);
/linux-master/drivers/misc/pvpanic/
H A Dpvpanic.h16 int devm_pvpanic_probe(struct device *dev, void __iomem *base);
/linux-master/tools/perf/tests/shell/
H A Ddaemon.sh9 local base=$3
30 if [ "${base}" != "${line_base}" ]; then
31 echo "FAILED: wrong base"
56 local base=$4
87 if [ "${base}" != "${line_base}" ]; then
88 echo "FAILED: wrong base"
163 local base
164 base=$(mktemp -d /tmp/perf.daemon.base.XXX)
168 base
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/linux-master/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_28nm_8960.c97 void __iomem *base = pll_28nm->phy->pll_base; local
106 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_1,
109 val = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2);
113 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_2,
116 val = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3);
120 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_3,
123 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_6,
126 val = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8);
128 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8,
146 void __iomem *base local
180 void __iomem *base = pll_28nm->phy->pll_base; local
347 void __iomem *base = pll_28nm->phy->pll_base; local
363 void __iomem *base = pll_28nm->phy->pll_base; local
478 void __iomem *base = phy->base; local
508 void __iomem *base = phy->reg_base; local
520 void __iomem *base = phy->reg_base; local
531 void __iomem *base = phy->reg_base; local
561 void __iomem *base = phy->base; local
588 void __iomem *base = phy->base; local
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/linux-master/drivers/irqchip/
H A Dirq-vic.c50 * @base: The register base for the VIC.
51 * @irq: The IRQ number for the base of the VIC.
62 void __iomem *base; member in struct:vic_device
83 * @base: Base of the VIC.
88 static void vic_init2(void __iomem *base) argument
93 void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4);
97 writel(32, base + VIC_PL190_DEF_VECT_ADDR);
103 void __iomem *base = vic->base; local
133 void __iomem *base = vic->base; local
267 vic_register(void __iomem *base, unsigned int parent_irq, unsigned int irq, u32 valid_sources, u32 resume_sources, struct device_node *node) argument
307 void __iomem *base = irq_data_get_irq_chip_data(d); local
316 void __iomem *base = irq_data_get_irq_chip_data(d); local
323 void __iomem *base = irq_data_get_irq_chip_data(d); local
374 vic_disable(void __iomem *base) argument
383 vic_clear_interrupts(void __iomem *base) argument
403 vic_init_st(void __iomem *base, unsigned int irq_start, u32 vic_sources, struct device_node *node) argument
433 __vic_init(void __iomem *base, int parent_irq, int irq_start, u32 vic_sources, u32 resume_sources, struct device_node *node) argument
480 vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources) argument
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/linux-master/drivers/phy/samsung/
H A Dphy-exynos-pcie.c39 void __iomem *base; member in struct:exynos_pcie_phy
44 static void exynos_pcie_phy_writel(void __iomem *base, u32 val, u32 offset) argument
46 writel(val, base + offset);
73 exynos_pcie_phy_writel(ep->base, 0x11, PCIE_PHY_OFFSET(0x3));
76 exynos_pcie_phy_writel(ep->base, 0, PCIE_PHY_OFFSET(0x20));
77 exynos_pcie_phy_writel(ep->base, 0, PCIE_PHY_OFFSET(0x4b));
80 exynos_pcie_phy_writel(ep->base, 0x34, PCIE_PHY_OFFSET(0x4));
81 exynos_pcie_phy_writel(ep->base, 0x02, PCIE_PHY_OFFSET(0x7));
82 exynos_pcie_phy_writel(ep->base, 0x41, PCIE_PHY_OFFSET(0x21));
83 exynos_pcie_phy_writel(ep->base,
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/linux-master/drivers/gpu/drm/vmwgfx/
H A Dttm_object.c73 * for fast lookup of ref objects given a base object.
118 * that way, one can easily detect whether a base object is referenced by
120 * multiple ref objects if a ttm_object_file references the same base
191 struct ttm_base_object *base,
199 base->shareable = shareable;
200 base->tfile = ttm_object_file_ref(tfile);
201 base->refcount_release = refcount_release;
202 base->object_type = object_type;
203 kref_init(&base->refcount);
206 ret = idr_alloc(&tdev->idr, base,
190 ttm_base_object_init(struct ttm_object_file *tfile, struct ttm_base_object *base, bool shareable, enum ttm_object_type object_type, void (*refcount_release) (struct ttm_base_object **)) argument
229 struct ttm_base_object *base = local
250 struct ttm_base_object *base = *p_base; local
260 struct ttm_base_object *base = NULL; local
281 struct ttm_base_object *base; local
293 ttm_ref_object_add(struct ttm_object_file *tfile, struct ttm_base_object *base, bool *existed, bool require_existed) argument
493 struct ttm_base_object *base = *p_base; local
518 struct ttm_base_object *base = &prime->base; local
547 struct ttm_base_object *base; local
581 struct ttm_base_object *base; local
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/linux-master/drivers/gpio/
H A Dgpio-winbond.c131 unsigned long base; member in struct:winbond_gpio_params
142 static int winbond_sio_enter(unsigned long base) argument
144 if (!request_muxed_region(base, 2, WB_GPIO_DRIVER_NAME))
151 outb(WB_SIO_EXT_ENTER_KEY, base);
152 outb(WB_SIO_EXT_ENTER_KEY, base);
157 static void winbond_sio_select_logical(unsigned long base, u8 dev) argument
159 outb(WB_SIO_REG_LOGICAL, base);
160 outb(dev, base + 1);
163 static void winbond_sio_leave(unsigned long base) argument
165 outb(WB_SIO_EXT_EXIT_KEY, base);
170 winbond_sio_reg_write(unsigned long base, u8 reg, u8 data) argument
176 winbond_sio_reg_read(unsigned long base, u8 reg) argument
182 winbond_sio_reg_bset(unsigned long base, u8 reg, u8 bit) argument
191 winbond_sio_reg_bclear(unsigned long base, u8 reg, u8 bit) argument
200 winbond_sio_reg_btest(unsigned long base, u8 reg, u8 bit) argument
385 unsigned long *base = gpiochip_get_data(gc); local
409 unsigned long *base = gpiochip_get_data(gc); local
433 unsigned long *base = gpiochip_get_data(gc); local
464 unsigned long *base = gpiochip_get_data(gc); local
497 winbond_gpio_configure_port0_pins(unsigned long base) argument
514 winbond_gpio_configure_port1_check_i2c(unsigned long base) argument
522 winbond_gpio_configure_port(unsigned long base, unsigned int idx) argument
571 winbond_gpio_configure(unsigned long base) argument
587 winbond_gpio_check_chip(unsigned long base) argument
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/linux-master/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_cfg.c35 .base = { 0x00500, 0x00600, 0x00700, 0x00800, 0x00900 },
40 .base = { 0x01100, 0x01500, 0x01900 },
49 .base = { 0x01d00, 0x02100, 0x02500 },
57 .base = { 0x02900, 0x02d00 },
64 .base = { 0x03100, 0x03500, 0x03900, 0x03d00, 0x04100 },
83 .base = { 0x04500, 0x04900, 0x04d00 },
87 .base = { 0x21a00, 0x21b00, 0x21c00 },
90 .base = { 0x21000, 0x21200, 0x21400, 0x21600 },
124 .base = { 0x00500, 0x00600 },
129 .base
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