Searched refs:pitch (Results 126 - 150 of 266) sorted by relevance

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/linux-master/drivers/video/fbdev/mmp/hw/
H A Dmmp_ctrl.c139 writel_relaxed(win->pitch[0],
141 writel_relaxed(win->pitch[2] << 16 | win->pitch[1],
151 writel_relaxed(win->pitch[0], (void __iomem *)&regs->g_pitch);
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv40.c189 nvkm_wr32(device, NV20_PGRAPH_TSIZE(i), tile->pitch);
192 nvkm_wr32(device, NV40_PGRAPH_TSIZE1(i), tile->pitch);
214 nvkm_wr32(device, NV47_PGRAPH_TSIZE(i), tile->pitch);
217 nvkm_wr32(device, NV40_PGRAPH_TSIZE1(i), tile->pitch);
H A Dgf100.h237 int gk20a_gr_av_to_init_(struct nvkm_blob *, u8 count, u32 pitch, struct gf100_gr_pack **);
303 u32 pitch; member in struct:gf100_gr_init
/linux-master/drivers/gpu/drm/vkms/
H A Dvkms_drv.h35 unsigned int pitch; member in struct:vkms_frame_info
/linux-master/include/drm/
H A Ddrm_format_helper.h69 unsigned int drm_fb_clip_offset(unsigned int pitch, const struct drm_format_info *format,
/linux-master/drivers/gpu/drm/exynos/
H A Dexynos_drm_scaler.c171 val = SCALER_SRC_SPAN_SET_Y_SPAN(src_buf->buf.pitch[0] /
175 val |= SCALER_SRC_SPAN_SET_C_SPAN(src_buf->buf.pitch[1]);
234 val = SCALER_DST_SPAN_SET_Y_SPAN(dst_buf->buf.pitch[0] /
238 val |= SCALER_DST_SPAN_SET_C_SPAN(dst_buf->buf.pitch[1]);
H A Dexynos_drm_gem.c339 args->pitch = args->width * ((args->bpp + 7) / 8);
340 args->size = args->pitch * args->height;
H A Dexynos_drm_rotator.c145 ROT_SET_BUF_SIZE_W(buf->buf.pitch[0] / buf->format->cpp[0]);
193 ROT_SET_BUF_SIZE_W(buf->buf.pitch[0] / buf->format->cpp[0]);
/linux-master/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_mman.c369 unsigned int pitch; local
397 for (pitch = max_pitch; pitch; pitch >>= 1) {
398 tile.stride = tile.width * pitch;
405 if (pitch > 2 && GRAPHICS_VER(i915) >= 4) {
406 tile.stride = tile.width * (pitch - 1);
414 if (pitch < max_pitch && GRAPHICS_VER(i915) >= 4) {
415 tile.stride = tile.width * (pitch + 1);
425 for_each_prime_number(pitch, max_pitc
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hubp.c170 uint32_t pitch, meta_pitch, pitch_c, meta_pitch_c; local
172 /* Program data and meta surface pitch (calculation from addrlib)
177 /* Chroma pitch zero can cause system hang! */
179 pitch = plane_size->surface_pitch - 1;
184 pitch = plane_size->surface_pitch - 1;
196 PITCH, pitch, META_PITCH, meta_pitch);
1100 enum cursor_pitch hubp1_get_cursor_pitch(unsigned int pitch) argument
1104 switch (pitch) {
1115 DC_ERR("Invalid cursor pitch of %d. "
1116 "Only 64/128/256 is supported on DCN.\n", pitch);
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dbase.c42 u32 pitch, u32 flags, struct nvkm_fb_tile *tile)
44 fb->func->tile.init(fb, region, addr, size, pitch, flags, tile);
41 nvkm_fb_tile_init(struct nvkm_fb *fb, int region, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) argument
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_bo.c57 u32 addr, u32 size, u32 pitch, u32 flags)
66 if (tile->pitch)
69 if (pitch)
70 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
109 u32 size, u32 pitch, u32 zeta)
119 if (pitch && !found) {
123 } else if (tile && fb->tile.region[i].pitch) {
132 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
56 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg, u32 addr, u32 size, u32 pitch, u32 flags) argument
108 nv10_bo_set_tiling(struct drm_device *dev, u32 addr, u32 size, u32 pitch, u32 zeta) argument
/linux-master/drivers/media/platform/renesas/vsp1/
H A Dvsp1_drm.c580 u32 pixelformat, unsigned int pitch)
593 * Only formats with three planes can affect the chroma planes pitch.
596 * the luma plane and chroma plane having the same pitch.
602 rwpf->format.plane_fmt[0].bytesperline = pitch;
603 rwpf->format.plane_fmt[1].bytesperline = pitch / chroma_hsub;
799 * value. The memory pitch is configurable to allow for padding at end of lines,
801 * @cfg.pitch value is expressed in bytes and applies to all planes for
841 "%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad, %pad } zpos %u\n",
845 cfg->pixelformat, cfg->pitch, &cfg->mem[0], &cfg->mem[1],
853 cfg->pitch);
578 vsp1_du_pipeline_set_rwpf_format(struct vsp1_device *vsp1, struct vsp1_rwpf *rwpf, u32 pixelformat, unsigned int pitch) argument
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/linux-master/drivers/gpu/drm/tiny/
H A Dsimpledrm.c241 unsigned int pitch; member in struct:simpledrm_device
612 sdev->pitch, GFP_KERNEL);
648 iosys_map_incr(&dst, drm_fb_clip_offset(sdev->pitch, sdev->format, &dst_clip));
649 drm_fb_blit(&dst, &sdev->pitch, sdev->format->format, shadow_plane_state->data,
669 iosys_map_memset(&sdev->screen_base, 0, 0, sdev->pitch * sdev->mode.vdisplay);
856 sdev->pitch = stride;
/linux-master/drivers/video/fbdev/
H A Dsh_mobile_lcdcfb.c169 * @pitch: Overlay line pitch
200 unsigned int pitch; member in struct:sh_mobile_lcdc_overlay
854 ovl->pitch << LDBBSMWR_BSMW_SHIFT);
1013 /* Compute frame buffer base address and pitch for each channel. */
1022 ch->line_size = ch->pitch;
1444 ovl->pitch = info->var.xres_virtual;
1446 ovl->pitch = info->var.xres_virtual * ovl->format->bpp / 8;
1450 info->fix.line_length = ovl->pitch;
1581 info->fix.line_length = ovl->pitch;
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H A Dtridentfb.c305 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp) argument
307 int v1 = (pitch >> 3) << 20;
379 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp) argument
382 int v1 = pitch << (bpp == 24 ? 20 : (18 + x));
384 switch (pitch << (bpp >> 3)) {
477 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp) argument
488 writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
543 static void tgui_init_accel(struct tridentfb_par *par, int pitch, int bpp) argument
551 switch ((pitch * bp
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H A Dcyber2000fb.c417 u_int pitch; member in struct:par_info
517 ((hw->pitch >> 4) & 0x30), cfb);
559 hw->crtc[13] = hw->pitch;
863 hw.pitch = hw.width >> 3;
869 hw.pitch = hw.width >> 2;
889 hw.pitch = hw.width >> 3;
896 hw.pitch = hw.width >> 1;
920 hw.fetch = hw.pitch;
/linux-master/drivers/gpu/drm/radeon/
H A Dr100.c175 /* update pitch */
910 uint32_t pitch; local
918 /* radeon pitch is /64 */
919 pitch = stride_bytes / 64;
952 radeon_ring_write(ring, (pitch << 22) | (src_offset >> 10));
953 radeon_ring_write(ring, (pitch << 22) | (dst_offset >> 10));
1725 track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;
1729 track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK;
1812 track->textures[i].pitch = idx_value + 32;
2087 DRM_ERROR("pitch
3090 r100_set_surface_reg(struct radeon_device *rdev, int reg, uint32_t tiling_flags, uint32_t pitch, uint32_t offset, uint32_t obj_size) argument
[all...]
/linux-master/drivers/media/pci/sta2x11/
H A Dsta2x11_vip.c642 unsigned int t_stop, b_stop, pitch; local
660 pitch = 4 * vip->format.width;
666 pitch = 2 * vip->format.width;
672 pitch = 2 * vip->format.width;
689 reg_write(vip, DVP_VMP, pitch);
/linux-master/include/uapi/drm/
H A Dradeon_drm.h678 int pitch; member in struct:drm_radeon_texture
859 __u32 pitch; member in struct:drm_radeon_gem_set_tiling
865 __u32 pitch; member in struct:drm_radeon_gem_get_tiling
H A Ddrm_mode.h659 __u32 pitch; member in struct:drm_mode_fb_cmd
681 * offsets and pitches per plane. The pitch and offset order are dictated by
1059 * @pitch: number of bytes between two consecutive lines
1063 * the kernel fills @handle, @pitch and @size.
1072 __u32 pitch; member in struct:drm_mode_create_dumb
/linux-master/drivers/gpu/drm/mediatek/
H A Dmtk_disp_ovl_adaptor.c153 &pending->addr, (pending->pitch / fmt_info->cpp[0]),
188 rdma_config.pitch = pending->pitch;
/linux-master/drivers/gpu/drm/hyperv/
H A Dhyperv_drm_proto.c278 u32 w, u32 h, u32 pitch)
295 msg.situ.video_output[0].pitch_bytes = pitch;
277 hyperv_update_situation(struct hv_device *hdev, u8 active, u32 bpp, u32 w, u32 h, u32 pitch) argument
/linux-master/drivers/gpu/drm/rockchip/
H A Drockchip_drm_gem.c398 * This aligns the pitch and size arguments to the minimum required. wrap
411 args->pitch = ALIGN(min_pitch, 64);
412 args->size = args->pitch * args->height;
/linux-master/drivers/gpu/drm/meson/
H A Dmeson_drv.c88 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
89 args->size = PAGE_ALIGN(args->pitch * args->height);

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