Searched refs:chan (Results 126 - 150 of 1789) sorted by relevance

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/linux-master/drivers/soc/ti/
H A Dknav_dma.c136 static bool check_config(struct knav_dma_chan *chan, struct knav_dma_cfg *cfg) argument
138 if (!memcmp(&chan->cfg, cfg, sizeof(*cfg)))
144 static int chan_start(struct knav_dma_chan *chan, argument
149 spin_lock(&chan->lock);
150 if ((chan->direction == DMA_MEM_TO_DEV) && chan->reg_chan) {
155 writel_relaxed(v, &chan->reg_chan->mode);
156 writel_relaxed(DMA_ENABLE, &chan->reg_chan->control);
159 if (chan->reg_tx_sched)
160 writel_relaxed(cfg->u.tx.priority, &chan
202 chan_teardown(struct knav_dma_chan *chan) argument
228 chan_stop(struct knav_dma_chan *chan) argument
311 dma_debug_show_channels(struct seq_file *s, struct knav_dma_chan *chan) argument
342 struct knav_dma_chan *chan; local
411 struct knav_dma_chan *chan = NULL, *iter2; local
498 struct knav_dma_chan *chan = channel; local
542 pktdma_init_rx_chan(struct knav_dma_chan *chan, u32 flow) argument
554 pktdma_init_tx_chan(struct knav_dma_chan *chan, u32 channel) argument
572 struct knav_dma_chan *chan; local
[all...]
/linux-master/drivers/media/pci/ngene/
H A Dngene-core.c73 struct ngene_channel *chan = from_tasklet(chan, t, demux_tasklet); local
74 struct device *pdev = &chan->dev->pci_dev->dev;
75 struct SBufferHeader *Cur = chan->nextBuffer;
77 spin_lock_irq(&chan->state_lock);
80 if (chan->mode & NGENE_IO_TSOUT) {
81 u32 Flags = chan->DataFormatFlags;
84 if (chan->pBufferExchange) {
85 if (!chan->pBufferExchange(chan,
497 flush_buffers(struct ngene_channel *chan) argument
509 clear_buffers(struct ngene_channel *chan) argument
544 struct ngene_channel *chan = &dev->channel[stream]; local
683 set_transfer(struct ngene_channel *chan, int state) argument
805 struct ngene_channel *chan; local
1390 release_channel(struct ngene_channel *chan) argument
1439 init_channel(struct ngene_channel *chan) argument
[all...]
/linux-master/drivers/dma/
H A Dxgene-dma.c194 #define chan_dbg(chan, fmt, arg...) \
195 dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg)
196 #define chan_err(chan, fmt, arg...) \
197 dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
300 * @chan: reference to X-Gene DMA channels
312 struct xgene_dma_chan chan[XGENE_DMA_MAX_CHANNEL]; member in struct:xgene_dma
414 static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan, argument
428 xgene_dma_init_desc(desc1, chan
460 struct xgene_dma_chan *chan; local
481 xgene_dma_clean_descriptor(struct xgene_dma_chan *chan, struct xgene_dma_desc_sw *desc) argument
489 xgene_dma_alloc_descriptor( struct xgene_dma_chan *chan) argument
518 xgene_dma_clean_completed_descriptor(struct xgene_dma_chan *chan) argument
537 xgene_dma_run_tx_complete_actions(struct xgene_dma_chan *chan, struct xgene_dma_desc_sw *desc) argument
571 xgene_dma_clean_running_descriptor(struct xgene_dma_chan *chan, struct xgene_dma_desc_sw *desc) argument
594 xgene_chan_xfer_request(struct xgene_dma_chan *chan, struct xgene_dma_desc_sw *desc_sw) argument
641 xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan) argument
687 xgene_dma_cleanup_descriptors(struct xgene_dma_chan *chan) argument
777 struct xgene_dma_chan *chan = to_dma_chan(dchan); local
803 xgene_dma_free_desc_list(struct xgene_dma_chan *chan, struct list_head *list) argument
814 struct xgene_dma_chan *chan = to_dma_chan(dchan); local
843 struct xgene_dma_chan *chan; local
891 struct xgene_dma_chan *chan; local
965 struct xgene_dma_chan *chan = to_dma_chan(dchan); local
981 struct xgene_dma_chan *chan = from_tasklet(chan, t, tasklet); local
992 struct xgene_dma_chan *chan = (struct xgene_dma_chan *)id; local
1136 xgene_dma_get_ring_size(struct xgene_dma_chan *chan, enum xgene_dma_ring_cfgsize cfgsize) argument
1178 xgene_dma_delete_chan_rings(struct xgene_dma_chan *chan) argument
1184 xgene_dma_create_ring_one(struct xgene_dma_chan *chan, struct xgene_dma_ring *ring, enum xgene_dma_ring_cfgsize cfgsize) argument
1216 xgene_dma_create_chan_rings(struct xgene_dma_chan *chan) argument
1433 struct xgene_dma_chan *chan; local
1472 struct xgene_dma_chan *chan; local
1485 xgene_dma_set_caps(struct xgene_dma_chan *chan, struct dma_device *dma_dev) argument
1533 struct xgene_dma_chan *chan = &pdma->chan[id]; local
1603 struct xgene_dma_chan *chan; local
1782 struct xgene_dma_chan *chan; local
[all...]
H A Dpch_dma.c91 struct dma_chan chan; member in struct:pch_dma_chan
143 static inline struct pch_dma_chan *to_pd_chan(struct dma_chan *chan) argument
145 return container_of(chan, struct pch_dma_chan, chan);
153 static inline struct device *chan2dev(struct dma_chan *chan) argument
155 return &chan->dev->device;
158 static inline struct device *chan2parent(struct dma_chan *chan) argument
160 return chan->dev->device.parent;
177 static void pdc_enable_irq(struct dma_chan *chan, int enable) argument
179 struct pch_dma *pd = to_pd(chan
201 pdc_set_dir(struct dma_chan *chan) argument
249 pdc_set_mode(struct dma_chan *chan, u32 mode) argument
426 pdc_alloc_desc(struct dma_chan *chan, gfp_t flags) argument
489 pd_alloc_chan_resources(struct dma_chan *chan) argument
527 pd_free_chan_resources(struct dma_chan *chan) argument
549 pd_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
555 pd_issue_pending(struct dma_chan *chan) argument
566 pd_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
652 pd_device_terminate_all(struct dma_chan *chan) argument
741 struct dma_chan *chan, *_c; local
764 struct dma_chan *chan, *_c; local
927 struct dma_chan *chan, *_c; local
[all...]
/linux-master/drivers/firewire/
H A Dnosy.h46 #define PCI_INT_DMA_HLT(chan) (1 << (chan * 2))
47 #define PCI_INT_DMA_PCL(chan) (1 << (chan * 2 + 1))
59 #define DMA_BREG(base, chan) (base + chan * 0x20)
60 #define DMA_SREG(base, chan) (base + chan * 0x10)
100 #define DMA_PREV_PCL(chan) (DMA_BREG(DMA0_PREV_PCL, chan))
[all...]
/linux-master/drivers/iio/adc/
H A Dxilinx-xadc-events.c32 const struct iio_chan_spec *chan; local
38 chan = xadc_event_to_channel(indio_dev, event);
40 if (chan->type == IIO_TEMP) {
46 IIO_UNMOD_EVENT_CODE(chan->type, chan->channel,
56 IIO_UNMOD_EVENT_CODE(chan->type, chan->channel,
70 static unsigned int xadc_get_threshold_offset(const struct iio_chan_spec *chan, argument
75 if (chan->type == IIO_TEMP) {
78 if (chan
90 xadc_get_alarm_mask(const struct iio_chan_spec *chan) argument
113 xadc_read_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir) argument
122 xadc_write_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, int state) argument
158 xadc_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) argument
183 xadc_write_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2) argument
[all...]
/linux-master/drivers/gpu/ipu-v3/
H A Dipu-image-convert.c155 struct ipu_image_convert_chan *chan; member in struct:ipu_image_convert_ctx
228 struct ipu_image_convert_chan chan[IC_NUM_TASKS]; member in struct:ipu_image_convert_priv
343 struct ipu_image_convert_chan *chan = ctx->chan; local
344 struct ipu_image_convert_priv *priv = chan->priv;
348 chan->ic_task, ctx,
461 dev_dbg(ctx->chan->priv->ipu->dev,
514 struct device *dev = ctx->chan->priv->ipu->dev;
734 struct device *dev = ctx->chan->priv->ipu->dev;
857 struct ipu_image_convert_chan *chan local
920 struct ipu_image_convert_chan *chan = ctx->chan; local
987 struct ipu_image_convert_chan *chan = ctx->chan; local
1049 struct ipu_image_convert_chan *chan = ctx->chan; local
1125 struct ipu_image_convert_chan *chan = ctx->chan; local
1269 struct ipu_image_convert_chan *chan = ctx->chan; local
1296 struct ipu_image_convert_chan *chan = ctx->chan; local
1382 struct ipu_image_convert_chan *chan = ctx->chan; local
1497 struct ipu_image_convert_chan *chan = ctx->chan; local
1515 run_next(struct ipu_image_convert_chan *chan) argument
1547 empty_done_q(struct ipu_image_convert_chan *chan) argument
1581 struct ipu_image_convert_chan *chan = dev_id; local
1636 struct ipu_image_convert_chan *chan = ctx->chan; local
1730 struct ipu_image_convert_chan *chan = data; local
1787 struct ipu_image_convert_chan *chan = ctx->chan; local
1807 release_ipu_resources(struct ipu_image_convert_chan *chan) argument
1837 get_eof_irq(struct ipu_image_convert_chan *chan, struct ipuv3_channel *channel) argument
1854 get_ipu_resources(struct ipu_image_convert_chan *chan) argument
2077 struct ipu_image_convert_chan *chan; local
2267 struct ipu_image_convert_chan *chan; local
2308 struct ipu_image_convert_chan *chan = ctx->chan; local
2369 struct ipu_image_convert_chan *chan = ctx->chan; local
2487 struct ipu_image_convert_chan *chan = &priv->chan[i]; local
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dgv100.c23 #include "chan.h"
35 gv100_chan_doorbell_handle(struct nvkm_chan *chan) argument
37 return chan->id;
41 gv100_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv) argument
43 const u64 userd = nvkm_memory_addr(chan->userd.mem) + chan->userd.base;
46 nvkm_kmap(chan->inst);
47 nvkm_wo32(chan->inst, 0x008, lower_32_bits(userd));
48 nvkm_wo32(chan->inst, 0x00c, upper_32_bits(userd));
49 nvkm_wo32(chan
92 gv100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
117 gv100_ectx_ce_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
150 struct nvkm_chan *chan; local
183 gv100_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset) argument
[all...]
/linux-master/include/linux/platform_data/
H A Ddma-mcf-edma.h22 bool mcf_edma_filter_fn(struct dma_chan *chan, void *param);
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv20.c8 #include <engine/fifo/chan.h>
19 struct nv20_gr_chan *chan = nv20_gr_chan(object); local
20 struct nv20_gr *gr = chan->gr;
21 u32 inst = nvkm_memory_addr(chan->inst);
24 nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4);
32 struct nv20_gr_chan *chan = nv20_gr_chan(object); local
33 struct nv20_gr *gr = chan->gr;
35 u32 inst = nvkm_memory_addr(chan->inst);
41 if (chan->chid == chid) {
54 nvkm_wo32(gr->ctxtab, chan
62 struct nv20_gr_chan *chan = nv20_gr_chan(object); local
79 struct nv20_gr_chan *chan; local
185 struct nvkm_chan *chan; local
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dbase.c25 #include "chan.h"
32 struct nvkm_sw_chan *chan; local
37 list_for_each_entry(chan, &sw->chan, head) {
38 if (chan->fifo->id == chid) {
39 handled = nvkm_sw_chan_mthd(chan, subc, mthd, data);
40 list_del(&chan->head);
41 list_add(&chan->head, &sw->chan);
53 struct nvkm_sw_chan *chan local
[all...]
H A Dnvsw.c25 #include "chan.h"
39 return nvkm_uevent_add(uevent, &nvkm_nvsw(object)->chan->event, 0,
61 nvkm_nvsw_new_(const struct nvkm_nvsw_func *func, struct nvkm_sw_chan *chan, argument
73 nvsw->chan = chan;
82 nvkm_nvsw_new(struct nvkm_sw_chan *chan, const struct nvkm_oclass *oclass, argument
85 return nvkm_nvsw_new_(&nvkm_nvsw, chan, oclass, data, size, pobject);
/linux-master/drivers/dma/sh/
H A Dusb-dmac.c87 #define to_usb_dmac_chan(c) container_of(c, struct usb_dmac_chan, vc.chan)
161 static u32 usb_dmac_chan_read(struct usb_dmac_chan *chan, u32 reg) argument
163 return readl(chan->iomem + reg);
166 static void usb_dmac_chan_write(struct usb_dmac_chan *chan, u32 reg, u32 data) argument
168 writel(data, chan->iomem + reg);
175 static bool usb_dmac_chan_is_busy(struct usb_dmac_chan *chan) argument
177 u32 chcr = usb_dmac_chan_read(chan, USB_DMACHCR);
193 static void usb_dmac_chan_start_sg(struct usb_dmac_chan *chan, argument
196 struct usb_dmac_desc *desc = chan->desc;
200 WARN_ON_ONCE(usb_dmac_chan_is_busy(chan));
222 usb_dmac_chan_start_desc(struct usb_dmac_chan *chan) argument
263 usb_dmac_desc_alloc(struct usb_dmac_chan *chan, unsigned int sg_len, gfp_t gfp) argument
283 usb_dmac_desc_free(struct usb_dmac_chan *chan) argument
298 usb_dmac_desc_get(struct usb_dmac_chan *chan, unsigned int sg_len, gfp_t gfp) argument
329 usb_dmac_desc_put(struct usb_dmac_chan *chan, struct usb_dmac_desc *desc) argument
345 struct dma_chan *chan = &uchan->vc.chan; local
362 usb_dmac_chan_halt(struct usb_dmac_chan *chan) argument
381 usb_dmac_alloc_chan_resources(struct dma_chan *chan) argument
399 usb_dmac_free_chan_resources(struct dma_chan *chan) argument
416 usb_dmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction dir, unsigned long dma_flags, void *context) argument
445 usb_dmac_chan_terminate_all(struct dma_chan *chan) argument
467 usb_dmac_get_current_residue(struct usb_dmac_chan *chan, struct usb_dmac_desc *desc, unsigned int sg_index) argument
487 usb_dmac_chan_get_residue_if_complete(struct usb_dmac_chan *chan, dma_cookie_t cookie) argument
503 usb_dmac_chan_get_residue(struct usb_dmac_chan *chan, dma_cookie_t cookie) argument
528 usb_dmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
554 usb_dmac_issue_pending(struct dma_chan *chan) argument
568 struct usb_dmac_chan *chan = to_usb_dmac_chan(vd->tx.chan); local
577 usb_dmac_isr_transfer_end(struct usb_dmac_chan *chan) argument
600 struct usb_dmac_chan *chan = dev; local
636 usb_dmac_chan_filter(struct dma_chan *chan, void *arg) argument
651 struct dma_chan *chan; local
[all...]
/linux-master/arch/sh/drivers/pci/
H A Dops-sh4.c25 struct pci_channel *chan = bus->sysdata; local
34 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
35 data = pci_read_reg(chan, SH4_PCIPDR);
63 struct pci_channel *chan = bus->sysdata; local
69 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
70 data = pci_read_reg(chan, SH4_PCIPDR);
91 pci_write_reg(chan, data, SH4_PCIPDR);
101 int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan) argument
H A Dpci-sh7780.c246 struct pci_channel *chan = &sh7780_pci_controller; local
255 chan->reg_base = 0xfe040000;
262 chan->reg_base + SH4_PCICR);
271 id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
277 id = __raw_readw(chan->reg_base + PCI_DEVICE_ID);
290 type, __raw_readb(chan->reg_base + PCI_REVISION_ID));
297 chan->reg_base + SH4_PCICR);
307 __raw_writel(memphys + SZ_512M, chan->reg_base + SH4_PCILAR1);
309 chan->reg_base + SH4_PCILSR1);
315 __raw_writel(0, chan
[all...]
/linux-master/include/linux/
H A Domap-mailbox.h23 void omap_mbox_enable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq);
24 void omap_mbox_disable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq);
/linux-master/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_magn.h25 const struct iio_chan_spec *chan,
29 *val2 = st->magn_raw_to_gauss[chan->address];
24 inv_mpu_magn_get_scale(const struct inv_mpu6050_state *st, const struct iio_chan_spec *chan, int *val, int *val2) argument
/linux-master/include/linux/comedi/
H A Dcomedilib.h16 unsigned int chan, unsigned int *io);
18 unsigned int chan, unsigned int io);
/linux-master/net/wireless/tests/
H A DMakefile1 cfg80211-tests-y += module.o fragmentation.o scan.o util.o chan.o
/linux-master/drivers/mailbox/
H A Dmailbox-sti.c86 static inline bool sti_mbox_channel_is_enabled(struct mbox_chan *chan) argument
88 struct sti_channel *chan_info = chan->con_priv;
119 static void sti_mbox_enable_channel(struct mbox_chan *chan) argument
121 struct sti_channel *chan_info = chan->con_priv;
134 static void sti_mbox_disable_channel(struct mbox_chan *chan) argument
136 struct sti_channel *chan_info = chan->con_priv;
149 static void sti_mbox_clear_irq(struct mbox_chan *chan) argument
151 struct sti_channel *chan_info = chan->con_priv;
164 struct mbox_chan *chan = NULL; local
179 chan
195 struct mbox_chan *chan; local
218 struct mbox_chan *chan; local
251 sti_mbox_tx_is_ready(struct mbox_chan *chan) argument
274 sti_mbox_send_data(struct mbox_chan *chan, void *data) argument
292 sti_mbox_startup_chan(struct mbox_chan *chan) argument
300 sti_mbox_shutdown_chan(struct mbox_chan *chan) argument
327 struct mbox_chan *chan = NULL; local
[all...]
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dhw-ops.h45 struct ath9k_channel *chan,
48 return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
141 struct ath9k_channel *chan)
143 return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
147 struct ath9k_channel *chan)
149 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
153 struct ath9k_channel *chan,
159 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
163 struct ath9k_channel *chan)
165 return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
44 ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan, u8 rxchainmask, bool longcal) argument
140 ath9k_hw_rf_set_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
146 ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, struct ath9k_channel *chan) argument
152 ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, u16 modesIndex) argument
162 ath9k_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
168 ath9k_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
174 ath9k_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
188 ath9k_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
199 ath9k_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
235 ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) argument
247 ath9k_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
268 ath9k_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
[all...]
/linux-master/include/linux/iio/
H A Dbackend.h44 int (*chan_enable)(struct iio_backend *back, unsigned int chan);
45 int (*chan_disable)(struct iio_backend *back, unsigned int chan);
46 int (*data_format_set)(struct iio_backend *back, unsigned int chan,
54 int iio_backend_chan_enable(struct iio_backend *back, unsigned int chan);
55 int iio_backend_chan_disable(struct iio_backend *back, unsigned int chan);
57 int iio_backend_data_format_set(struct iio_backend *back, unsigned int chan,
/linux-master/sound/soc/sprd/
H A Dsprd-mcdt.c112 struct sprd_mcdt_chan chan[MCDT_CHANNEL_NUM]; member in struct:sprd_mcdt_dev
531 struct sprd_mcdt_chan *chan = &mcdt->chan[i]; local
534 if (chan->cb)
535 chan->cb->notify(chan->cb->data);
541 struct sprd_mcdt_chan *chan = local
542 &mcdt->chan[i + MCDT_ADC_CHANNEL_NUM];
545 if (chan->cb)
546 chan
569 sprd_mcdt_chan_write(struct sprd_mcdt_chan *chan, char *tx_buf, u32 size) argument
620 sprd_mcdt_chan_read(struct sprd_mcdt_chan *chan, char *rx_buf, u32 size) argument
671 sprd_mcdt_chan_int_enable(struct sprd_mcdt_chan *chan, u32 water_mark, struct sprd_mcdt_chan_callback *cb) argument
725 sprd_mcdt_chan_int_disable(struct sprd_mcdt_chan *chan) argument
773 sprd_mcdt_chan_dma_enable(struct sprd_mcdt_chan *chan, enum sprd_mcdt_dma_chan dma_chan, u32 water_mark) argument
827 sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan *chan) argument
893 sprd_mcdt_free_chan(struct sprd_mcdt_chan *chan) argument
920 struct sprd_mcdt_chan *chan = &mcdt->chan[i]; local
978 struct sprd_mcdt_chan *chan, *temp; local
[all...]
/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Ddwxgmac2_dma.c38 struct stmmac_dma_cfg *dma_cfg, u32 chan)
40 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan));
45 writel(value, ioaddr + XGMAC_DMA_CH_CONTROL(chan));
46 writel(XGMAC_DMA_INT_DEFAULT_EN, ioaddr + XGMAC_DMA_CH_INT_EN(chan));
52 dma_addr_t phy, u32 chan)
57 value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
60 writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan));
62 writel(upper_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_HADDR(chan));
63 writel(lower_32_bits(phy), ioaddr + XGMAC_DMA_CH_RxDESC_LADDR(chan));
69 dma_addr_t phy, u32 chan)
36 dwxgmac2_dma_init_chan(struct stmmac_priv *priv, void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg, u32 chan) argument
49 dwxgmac2_dma_init_rx_chan(struct stmmac_priv *priv, void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg, dma_addr_t phy, u32 chan) argument
66 dwxgmac2_dma_init_tx_chan(struct stmmac_priv *priv, void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg, dma_addr_t phy, u32 chan) argument
255 dwxgmac2_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan, bool rx, bool tx) argument
269 dwxgmac2_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan, bool rx, bool tx) argument
283 dwxgmac2_dma_start_tx(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan) argument
297 dwxgmac2_dma_stop_tx(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan) argument
311 dwxgmac2_dma_start_rx(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan) argument
325 dwxgmac2_dma_stop_rx(struct stmmac_priv *priv, void __iomem *ioaddr, u32 chan) argument
335 dwxgmac2_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr, struct stmmac_extra_stats *x, u32 chan, u32 dir) argument
509 dwxgmac2_set_rx_ring_len(struct stmmac_priv *priv, void __iomem *ioaddr, u32 len, u32 chan) argument
515 dwxgmac2_set_tx_ring_len(struct stmmac_priv *priv, void __iomem *ioaddr, u32 len, u32 chan) argument
521 dwxgmac2_set_rx_tail_ptr(struct stmmac_priv *priv, void __iomem *ioaddr, u32 ptr, u32 chan) argument
527 dwxgmac2_set_tx_tail_ptr(struct stmmac_priv *priv, void __iomem *ioaddr, u32 ptr, u32 chan) argument
533 dwxgmac2_enable_tso(struct stmmac_priv *priv, void __iomem *ioaddr, bool en, u32 chan) argument
564 dwxgmac2_set_bfsize(struct stmmac_priv *priv, void __iomem *ioaddr, int bfsize, u32 chan) argument
575 dwxgmac2_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr, bool en, u32 chan) argument
592 dwxgmac2_enable_tbs(struct stmmac_priv *priv, void __iomem *ioaddr, bool en, u32 chan) argument
[all...]
/linux-master/sound/mips/
H A Dsnd-n64.c62 } chan; member in struct:n64audio
82 struct snd_pcm_runtime *runtime = priv->chan.substream->runtime;
86 spin_lock_irqsave(&priv->chan.lock, flags);
88 count = priv->chan.writesize;
90 memcpy(priv->ring_base + priv->chan.nextpos,
91 runtime->dma_area + priv->chan.nextpos, count);
98 n64audio_write_reg(priv, AI_ADDR_REG, priv->ring_base_dma + priv->chan.nextpos);
102 priv->chan.nextpos += count;
103 priv->chan.nextpos %= priv->chan
[all...]

Completed in 511 milliseconds

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