Searched refs:cache (Results 126 - 150 of 961) sorted by relevance

1234567891011>>

/linux-master/arch/arm/boot/compressed/
H A Dhead-sa1100.S27 @ Data cache might be active.
28 @ Be sure to flush kernel binary out of the cache,
31 @ memory to be sure we hit the same cache.
/linux-master/mm/kasan/
H A Dreport_sw_tags.c48 size_t kasan_get_alloc_size(void *object, struct kmem_cache *cache) argument
63 while (size < cache->object_size) {
71 return cache->object_size;
/linux-master/arch/sh/mm/
H A Dcache-shx3.c2 * arch/sh/mm/cache-shx3.c - SH-X3 optimized cache ops
13 #include <asm/cache.h>
25 * If we've got cache aliases, resolve them in hardware.
38 * Broadcast I-cache block invalidations by default.
/linux-master/arch/arm/mm/
H A Dl2c-l2x0-resume.S4 * the settings of their L2 cache controller before restoring the
11 #include <asm/hardware/cache-l2x0.h>
35 @ and can be written whether or not the L2 cache is enabled
43 @ Don't setup the L2 cache if it is already enabled
H A Dcache-v4wt.S3 * linux/arch/arm/mm/cache-v4wt.S
7 * ARMv4 write through cache operations support.
18 * The size of one data cache line.
23 * The number of data cache segments.
28 * The number of lines in a cache segment.
34 * clean the whole cache, rather than using the individual
35 * cache line maintenance instructions.
48 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
55 * Invalidate all cache entries in a particular address
63 * Clean and invalidate the entire cache
[all...]
/linux-master/fs/nfs/
H A Dcache_lib.h9 #include <linux/sunrpc/cache.h>
/linux-master/include/linux/
H A Dblockgroup_lock.h11 #include <linux/cache.h>
H A Dprefetch.h3 * Generic cache management functions. Everything is arch-specific,
16 #include <asm/cache.h>
21 by address "x" into the CPU L1 cache.
/linux-master/fs/orangefs/
H A DMakefile8 orangefs-objs := acl.o file.o orangefs-cache.o orangefs-utils.o xattr.o \
/linux-master/arch/csky/include/asm/
H A Dhighmem.h12 #include <asm/cache.h>
/linux-master/arch/x86/um/
H A Dsys_call_table_32.c9 #include <linux/cache.h>
/linux-master/arch/powerpc/include/asm/
H A Dpage_32.h5 #include <asm/cache.h>
37 * memory traffic (except to write out any cache lines which get
/linux-master/arch/arm/mach-mmp/
H A Dmmp-dt.c12 #include <asm/hardware/cache-tauros2.h>
/linux-master/arch/x86/include/asm/
H A Dcurrent.h10 #include <linux/cache.h>
/linux-master/arch/x86/entry/
H A Dsyscall_64.c6 #include <linux/cache.h>
/linux-master/drivers/infiniband/hw/hfi1/
H A Dqsfp.c509 * in the cache by reading byte ((128 * n) + m)
521 u8 *cache = &cp->cache[0]; local
524 memset(cache, 0, (QSFP_MAX_NUM_PAGES * 128));
534 ret = qsfp_read(ppd, target, 0, cache, QSFP_PAGESIZE);
543 if (!(cache[2] & 4)) {
545 if ((cache[195] & 0xC0) == 0xC0) {
547 ret = qsfp_read(ppd, target, 384, cache + 256, 128);
552 ret = qsfp_read(ppd, target, 640, cache + 384, 128);
557 ret = qsfp_read(ppd, target, 896, cache
750 u8 *cache = &ppd->qsfp_info.cache[0]; local
[all...]
/linux-master/tools/perf/util/
H A Ddso.c840 struct rb_root *root = &dso->data.cache;
845 struct dso_cache *cache; local
847 cache = rb_entry(next, struct dso_cache, rb_node);
848 next = rb_next(&cache->rb_node);
849 rb_erase(&cache->rb_node, root);
850 free(cache);
857 const struct rb_root *root = &dso->data.cache;
860 struct dso_cache *cache; local
866 cache = rb_entry(parent, struct dso_cache, rb_node);
867 end = cache
886 struct dso_cache *cache; local
914 dso_cache__memcpy(struct dso_cache *cache, u64 offset, u8 *data, u64 size, bool out) argument
957 struct dso_cache *cache; local
998 struct dso_cache *cache = __dso_cache__find(dso, offset); local
1006 struct dso_cache *cache; local
[all...]
/linux-master/drivers/md/bcache/
H A Dalloc.c50 * bch_bucket_alloc() allocates a single bucket from a specific cache.
53 * out of a cache set.
76 uint8_t bch_inc_gen(struct cache *ca, struct bucket *b)
88 struct cache *ca;
90 unsigned long next = c->nbuckets * c->cache->sb.bucket_size / 1024;
106 ca = c->cache;
130 bool bch_can_invalidate_bucket(struct cache *ca, struct bucket *b)
140 void __bch_invalidate_one_bucket(struct cache *ca, struct bucket *b)
153 static void bch_invalidate_one_bucket(struct cache *ca, struct bucket *b)
179 static void invalidate_buckets_lru(struct cache *c
[all...]
/linux-master/drivers/xen/
H A Dgrant-table.c906 static inline void cache_init(struct gnttab_page_cache *cache) argument
908 cache->pages = NULL;
911 static inline bool cache_empty(struct gnttab_page_cache *cache) argument
913 return !cache->pages;
916 static inline struct page *cache_deq(struct gnttab_page_cache *cache) argument
920 page = cache->pages;
921 cache->pages = page->zone_device_data;
926 static inline void cache_enq(struct gnttab_page_cache *cache, struct page *page) argument
928 page->zone_device_data = cache->pages;
929 cache
932 cache_init(struct gnttab_page_cache *cache) argument
937 cache_empty(struct gnttab_page_cache *cache) argument
942 cache_deq(struct gnttab_page_cache *cache) argument
952 cache_enq(struct gnttab_page_cache *cache, struct page *page) argument
958 gnttab_page_cache_init(struct gnttab_page_cache *cache) argument
966 gnttab_page_cache_get(struct gnttab_page_cache *cache, struct page **page) argument
986 gnttab_page_cache_put(struct gnttab_page_cache *cache, struct page **page, unsigned int num) argument
1002 gnttab_page_cache_shrink(struct gnttab_page_cache *cache, unsigned int num) argument
[all...]
/linux-master/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_vcap_impl.c18 #define STREAMSIZE (64 * 4) /* bytes in the VCAP cache area */
909 /* API callback used for erasing the vcap cache area (not the register area) */
912 memset(admin->cache.keystream, 0, STREAMSIZE);
913 memset(admin->cache.maskstream, 0, STREAMSIZE);
914 memset(admin->cache.actionstream, 0, STREAMSIZE);
915 memset(&admin->cache.counter, 0, sizeof(admin->cache.counter));
927 keystr = &admin->cache.keystream[start];
928 mskstr = &admin->cache.maskstream[start];
929 actstr = &admin->cache
[all...]
/linux-master/arch/powerpc/boot/dts/fsl/
H A Dmpc8536si-pre.dtsi63 next-level-cache = <&L2>;
H A Dmpc8544si-pre.dtsi63 next-level-cache = <&L2>;
H A Dmpc8548si-pre.dtsi64 next-level-cache = <&L2>;
H A Dmpc8568si-pre.dtsi63 next-level-cache = <&L2>;
H A Dmpc8569si-pre.dtsi62 next-level-cache = <&L2>;

Completed in 432 milliseconds

1234567891011>>