124113Skato// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 240003Skato/* 324113Skato * Copyright(c) 2015, 2016 Intel Corporation. 424113Skato */ 524113Skato 624113Skato#include <linux/delay.h> 724113Skato#include <linux/pci.h> 824113Skato#include <linux/vmalloc.h> 924113Skato 1024113Skato#include "hfi.h" 1124113Skato 1224113Skato/* for the given bus number, return the CSR for reading an i2c line */ 1324113Skatostatic inline u32 i2c_in_csr(u32 bus_num) 1424113Skato{ 1524113Skato return bus_num ? ASIC_QSFP2_IN : ASIC_QSFP1_IN; 1624113Skato} 1724113Skato 1824113Skato/* for the given bus number, return the CSR for writing an i2c line */ 1924113Skatostatic inline u32 i2c_oe_csr(u32 bus_num) 2024113Skato{ 2124113Skato return bus_num ? ASIC_QSFP2_OE : ASIC_QSFP1_OE; 2224113Skato} 2324113Skato 2424113Skatostatic void hfi1_setsda(void *data, int state) 2524113Skato{ 2624113Skato struct hfi1_i2c_bus *bus = (struct hfi1_i2c_bus *)data; 2724113Skato struct hfi1_devdata *dd = bus->controlling_dd; 2824113Skato u64 reg; 2950477Speter u32 target_oe; 3024113Skato 3124113Skato target_oe = i2c_oe_csr(bus->num); 3224113Skato reg = read_csr(dd, target_oe); 3324113Skato /* 3424113Skato * The OE bit value is inverted and connected to the pin. When 3524113Skato * OE is 0 the pin is left to be pulled up, when the OE is 1 3624113Skato * the pin is driven low. This matches the "open drain" or "open 3724113Skato * collector" convention. 3824113Skato */ 3924113Skato if (state) 4024113Skato reg &= ~QSFP_HFI0_I2CDAT; 4124113Skato else 4224113Skato reg |= QSFP_HFI0_I2CDAT; 4340003Skato write_csr(dd, target_oe, reg); 4440003Skato /* do a read to force the write into the chip */ 4540003Skato (void)read_csr(dd, target_oe); 4642112Smsmith} 4740003Skato 4840003Skatostatic void hfi1_setscl(void *data, int state) 4924113Skato{ 5024113Skato struct hfi1_i2c_bus *bus = (struct hfi1_i2c_bus *)data; 5124113Skato struct hfi1_devdata *dd = bus->controlling_dd; 5224113Skato u64 reg; 5325159Skato u32 target_oe; 5424113Skato 5524113Skato target_oe = i2c_oe_csr(bus->num); 5624113Skato reg = read_csr(dd, target_oe); 5724113Skato /* 5824113Skato * The OE bit value is inverted and connected to the pin. When 5924113Skato * OE is 0 the pin is left to be pulled up, when the OE is 1 6027654Skato * the pin is driven low. This matches the "open drain" or "open 6126298Skato * collector" convention. 6236094Skato */ 6361616Skato if (state) 6426298Skato reg &= ~QSFP_HFI0_I2CCLK; 6526298Skato else 6624113Skato reg |= QSFP_HFI0_I2CCLK; 6724113Skato write_csr(dd, target_oe, reg); 6824113Skato /* do a read to force the write into the chip */ 6924113Skato (void)read_csr(dd, target_oe); 7024113Skato} 7124113Skato 7224113Skatostatic int hfi1_getsda(void *data) 7324113Skato{ 7424113Skato struct hfi1_i2c_bus *bus = (struct hfi1_i2c_bus *)data; 7524113Skato u64 reg; 7624113Skato u32 target_in; 7724113Skato 7824113Skato hfi1_setsda(data, 1); /* clear OE so we do not pull line down */ 7924113Skato udelay(2); /* 1us pull up + 250ns hold */ 8024113Skato 8124113Skato target_in = i2c_in_csr(bus->num); 8224113Skato reg = read_csr(bus->controlling_dd, target_in); 8324113Skato return !!(reg & QSFP_HFI0_I2CDAT); 8424113Skato} 8524113Skato 8624113Skatostatic int hfi1_getscl(void *data) 8724113Skato{ 8824113Skato struct hfi1_i2c_bus *bus = (struct hfi1_i2c_bus *)data; 8924113Skato u64 reg; 9024113Skato u32 target_in; 9124113Skato 9224113Skato hfi1_setscl(data, 1); /* clear OE so we do not pull line down */ 9324113Skato udelay(2); /* 1us pull up + 250ns hold */ 9424113Skato 9524113Skato target_in = i2c_in_csr(bus->num); 9624113Skato reg = read_csr(bus->controlling_dd, target_in); 9724113Skato return !!(reg & QSFP_HFI0_I2CCLK); 9824113Skato} 9924113Skato 10024113Skato/* 10124113Skato * Allocate and initialize the given i2c bus number. 10224113Skato * Returns NULL on failure. 10324113Skato */ 10424113Skatostatic struct hfi1_i2c_bus *init_i2c_bus(struct hfi1_devdata *dd, 10525159Skato struct hfi1_asic_data *ad, int num) 10624113Skato{ 10724113Skato struct hfi1_i2c_bus *bus; 10824113Skato int ret; 10924113Skato 11024113Skato bus = kzalloc(sizeof(*bus), GFP_KERNEL); 11124113Skato if (!bus) 11224113Skato return NULL; 11324113Skato 11424113Skato bus->controlling_dd = dd; 11524113Skato bus->num = num; /* our bus number */ 11624113Skato 11724113Skato bus->algo.setsda = hfi1_setsda; 11824113Skato bus->algo.setscl = hfi1_setscl; 11924113Skato bus->algo.getsda = hfi1_getsda; 12024113Skato bus->algo.getscl = hfi1_getscl; 12124113Skato bus->algo.udelay = 5; 12224113Skato bus->algo.timeout = usecs_to_jiffies(100000); 12324113Skato bus->algo.data = bus; 12424113Skato 12524113Skato bus->adapter.owner = THIS_MODULE; 12624113Skato bus->adapter.algo_data = &bus->algo; 12724113Skato bus->adapter.dev.parent = &dd->pcidev->dev; 12824113Skato snprintf(bus->adapter.name, sizeof(bus->adapter.name), 12926985Skato "hfi1_i2c%d", num); 13026985Skato 13126985Skato ret = i2c_bit_add_bus(&bus->adapter); 13224113Skato if (ret) { 13324113Skato dd_dev_info(dd, "%s: unable to add i2c bus %d, err %d\n", 13424113Skato __func__, num, ret); 13524113Skato kfree(bus); 13624113Skato return NULL; 13724113Skato } 13824113Skato 13924113Skato return bus; 14024113Skato} 14124113Skato 14224113Skato/* 14324113Skato * Initialize i2c buses. 14424113Skato * Return 0 on success, -errno on error. 14524113Skato */ 14624113Skatoint set_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad) 14724113Skato{ 14824113Skato ad->i2c_bus0 = init_i2c_bus(dd, ad, 0); 14924113Skato ad->i2c_bus1 = init_i2c_bus(dd, ad, 1); 15024113Skato if (!ad->i2c_bus0 || !ad->i2c_bus1) 15125159Skato return -ENOMEM; 15225159Skato return 0; 15325159Skato}; 15425159Skato 15525159Skatostatic void clean_i2c_bus(struct hfi1_i2c_bus *bus) 15625159Skato{ 15725159Skato if (bus) { 15825159Skato i2c_del_adapter(&bus->adapter); 15925159Skato kfree(bus); 16025159Skato } 16125159Skato} 16225159Skato 16325159Skatovoid clean_up_i2c(struct hfi1_devdata *dd, struct hfi1_asic_data *ad) 16432199Skato{ 16532199Skato if (!ad) 16625159Skato return; 16765273Skato clean_i2c_bus(ad->i2c_bus0); 16865273Skato ad->i2c_bus0 = NULL; 16965273Skato clean_i2c_bus(ad->i2c_bus1); 17065273Skato ad->i2c_bus1 = NULL; 17165273Skato} 17265273Skato 17365273Skatostatic int i2c_bus_write(struct hfi1_devdata *dd, struct hfi1_i2c_bus *i2c, 17465273Skato u8 slave_addr, int offset, int offset_size, 17565273Skato u8 *data, u16 len) 17625159Skato{ 17725159Skato int ret; 17825159Skato int num_msgs; 17925159Skato u8 offset_bytes[2]; 18025159Skato struct i2c_msg msgs[2]; 18125159Skato 18224113Skato switch (offset_size) { 18324113Skato case 0: 18424113Skato num_msgs = 1; 18524113Skato msgs[0].addr = slave_addr; 18624113Skato msgs[0].flags = 0; 18724113Skato msgs[0].len = len; 18824113Skato msgs[0].buf = data; 18924113Skato break; 19024113Skato case 2: 19124113Skato offset_bytes[1] = (offset >> 8) & 0xff; 19224113Skato fallthrough; 19324113Skato case 1: 19424113Skato num_msgs = 2; 19524113Skato offset_bytes[0] = offset & 0xff; 19624113Skato 19724113Skato msgs[0].addr = slave_addr; 19824113Skato msgs[0].flags = 0; 19924113Skato msgs[0].len = offset_size; 20024113Skato msgs[0].buf = offset_bytes; 20124113Skato 20224113Skato msgs[1].addr = slave_addr; 20324113Skato msgs[1].flags = I2C_M_NOSTART; 20424113Skato msgs[1].len = len; 20524113Skato msgs[1].buf = data; 20624113Skato break; 20724113Skato default: 20824113Skato return -EINVAL; 20924113Skato } 21024113Skato 21124113Skato i2c->controlling_dd = dd; 21224113Skato ret = i2c_transfer(&i2c->adapter, msgs, num_msgs); 21324113Skato if (ret != num_msgs) { 21424113Skato dd_dev_err(dd, "%s: bus %d, i2c slave 0x%x, offset 0x%x, len 0x%x; write failed, ret %d\n", 21524113Skato __func__, i2c->num, slave_addr, offset, len, ret); 21624113Skato return ret < 0 ? ret : -EIO; 21724113Skato } 21824113Skato return 0; 21924113Skato} 22024113Skato 22124113Skatostatic int i2c_bus_read(struct hfi1_devdata *dd, struct hfi1_i2c_bus *bus, 22224113Skato u8 slave_addr, int offset, int offset_size, 22324113Skato u8 *data, u16 len) 22424113Skato{ 22524113Skato int ret; 22624113Skato int num_msgs; 22724113Skato u8 offset_bytes[2]; 22824113Skato struct i2c_msg msgs[2]; 22924113Skato 23024113Skato switch (offset_size) { 23124113Skato case 0: 23224113Skato num_msgs = 1; 23324113Skato msgs[0].addr = slave_addr; 23424113Skato msgs[0].flags = I2C_M_RD; 23524113Skato msgs[0].len = len; 23624113Skato msgs[0].buf = data; 23724113Skato break; 23824113Skato case 2: 23924113Skato offset_bytes[1] = (offset >> 8) & 0xff; 24024113Skato fallthrough; 24124113Skato case 1: 24224113Skato num_msgs = 2; 24324113Skato offset_bytes[0] = offset & 0xff; 24424113Skato 24524113Skato msgs[0].addr = slave_addr; 24624113Skato msgs[0].flags = 0; 24724113Skato msgs[0].len = offset_size; 24824113Skato msgs[0].buf = offset_bytes; 24924113Skato 25024113Skato msgs[1].addr = slave_addr; 25124113Skato msgs[1].flags = I2C_M_RD; 25224113Skato msgs[1].len = len; 25324113Skato msgs[1].buf = data; 25424113Skato break; 25524113Skato default: 25624113Skato return -EINVAL; 25724113Skato } 25824113Skato 25924113Skato bus->controlling_dd = dd; 26024113Skato ret = i2c_transfer(&bus->adapter, msgs, num_msgs); 26124113Skato if (ret != num_msgs) { 26224113Skato dd_dev_err(dd, "%s: bus %d, i2c slave 0x%x, offset 0x%x, len 0x%x; read failed, ret %d\n", 26324113Skato __func__, bus->num, slave_addr, offset, len, ret); 26424113Skato return ret < 0 ? ret : -EIO; 26524113Skato } 26624113Skato return 0; 26724113Skato} 26824113Skato 26924113Skato/* 27024113Skato * Raw i2c write. No set-up or lock checking. 27124113Skato * 27224113Skato * Return 0 on success, -errno on error. 27324113Skato */ 27424113Skatostatic int __i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, 27524113Skato int offset, void *bp, int len) 27624113Skato{ 27724113Skato struct hfi1_devdata *dd = ppd->dd; 27824113Skato struct hfi1_i2c_bus *bus; 27924113Skato u8 slave_addr; 28024113Skato int offset_size; 28124113Skato 28224113Skato bus = target ? dd->asic_data->i2c_bus1 : dd->asic_data->i2c_bus0; 28324113Skato slave_addr = (i2c_addr & 0xff) >> 1; /* convert to 7-bit addr */ 28424113Skato offset_size = (i2c_addr >> 8) & 0x3; 28524113Skato return i2c_bus_write(dd, bus, slave_addr, offset, offset_size, bp, len); 28624113Skato} 28724113Skato 28824113Skato/* 28924113Skato * Caller must hold the i2c chain resource. 29024113Skato * 29124113Skato * Return number of bytes written, or -errno. 29224113Skato */ 29324113Skatoint i2c_write(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, int offset, 29424113Skato void *bp, int len) 29524113Skato{ 29624113Skato int ret; 29724113Skato 29824113Skato if (!check_chip_resource(ppd->dd, i2c_target(target), __func__)) 29924200Skato return -EACCES; 30024113Skato 30124113Skato ret = __i2c_write(ppd, target, i2c_addr, offset, bp, len); 30224113Skato if (ret) 30324113Skato return ret; 30424113Skato 30524113Skato return len; 30624113Skato} 30724113Skato 30824113Skato/* 30924113Skato * Raw i2c read. No set-up or lock checking. 31024113Skato * 31124113Skato * Return 0 on success, -errno on error. 31224113Skato */ 31324113Skatostatic int __i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, 31424113Skato int offset, void *bp, int len) 31524113Skato{ 31624113Skato struct hfi1_devdata *dd = ppd->dd; 31724113Skato struct hfi1_i2c_bus *bus; 31824113Skato u8 slave_addr; 31924113Skato int offset_size; 32024113Skato 32124113Skato bus = target ? dd->asic_data->i2c_bus1 : dd->asic_data->i2c_bus0; 32224113Skato slave_addr = (i2c_addr & 0xff) >> 1; /* convert to 7-bit addr */ 32330162Skato offset_size = (i2c_addr >> 8) & 0x3; 32430162Skato return i2c_bus_read(dd, bus, slave_addr, offset, offset_size, bp, len); 32531338Sjlemon} 32630162Skato 32731338Sjlemon/* 32830162Skato * Caller must hold the i2c chain resource. 32930162Skato * 33024113Skato * Return number of bytes read, or -errno. 33124113Skato */ 33224113Skatoint i2c_read(struct hfi1_pportdata *ppd, u32 target, int i2c_addr, int offset, 33324113Skato void *bp, int len) 33424113Skato{ 33524113Skato int ret; 33624113Skato 33724113Skato if (!check_chip_resource(ppd->dd, i2c_target(target), __func__)) 33824113Skato return -EACCES; 33924113Skato 34024113Skato ret = __i2c_read(ppd, target, i2c_addr, offset, bp, len); 34124113Skato if (ret) 34224113Skato return ret; 34324113Skato 34424113Skato return len; 34524113Skato} 34624113Skato 34724113Skato/* 34824113Skato * Write page n, offset m of QSFP memory as defined by SFF 8636 34924113Skato * by writing @addr = ((256 * n) + m) 35030162Skato * 35130162Skato * Caller must hold the i2c chain resource. 35230162Skato * 35330162Skato * Return number of bytes written or -errno. 35430162Skato */ 35524113Skatoint qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 35624113Skato int len) 35724113Skato{ 35824113Skato int count = 0; 35924113Skato int offset; 36024113Skato int nwrite; 36124113Skato int ret = 0; 36224113Skato u8 page; 36324113Skato 36424113Skato if (!check_chip_resource(ppd->dd, i2c_target(target), __func__)) 36524113Skato return -EACCES; 36624113Skato 36724113Skato while (count < len) { 36824113Skato /* 36924113Skato * Set the qsfp page based on a zero-based address 37024113Skato * and a page size of QSFP_PAGESIZE bytes. 37124113Skato */ 37224113Skato page = (u8)(addr / QSFP_PAGESIZE); 37324113Skato 37424113Skato ret = __i2c_write(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE, 37524113Skato QSFP_PAGE_SELECT_BYTE_OFFS, &page, 1); 37624113Skato /* QSFPs require a 5-10msec delay after write operations */ 37724113Skato mdelay(5); 37824113Skato if (ret) { 37924113Skato hfi1_dev_porterr(ppd->dd, ppd->port, 38024113Skato "QSFP chain %d can't write QSFP_PAGE_SELECT_BYTE: %d\n", 38124113Skato target, ret); 38224113Skato break; 38327654Skato } 38426298Skato 38526298Skato offset = addr % QSFP_PAGESIZE; 38626298Skato nwrite = len - count; 38726298Skato /* truncate write to boundary if crossing boundary */ 38826298Skato if (((addr % QSFP_RW_BOUNDARY) + nwrite) > QSFP_RW_BOUNDARY) 38926298Skato nwrite = QSFP_RW_BOUNDARY - (addr % QSFP_RW_BOUNDARY); 39026298Skato 39126298Skato ret = __i2c_write(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE, 39226298Skato offset, bp + count, nwrite); 39326298Skato /* QSFPs require a 5-10msec delay after write operations */ 39426298Skato mdelay(5); 39526298Skato if (ret) /* stop on error */ 39626298Skato break; 39726298Skato 39826298Skato count += nwrite; 39926298Skato addr += nwrite; 40026298Skato } 40126298Skato 40226298Skato if (ret < 0) 40326298Skato return ret; 40430162Skato return count; 40530162Skato} 40631338Sjlemon 40730162Skato/* 40831338Sjlemon * Perform a stand-alone single QSFP write. Acquire the resource, do the 40930162Skato * write, then release the resource. 41030162Skato */ 41126298Skatoint one_qsfp_write(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 41226298Skato int len) 41326298Skato{ 41426298Skato struct hfi1_devdata *dd = ppd->dd; 41526298Skato u32 resource = qsfp_resource(dd); 41626298Skato int ret; 41726298Skato 41826298Skato ret = acquire_chip_resource(dd, resource, QSFP_WAIT); 41926298Skato if (ret) 42026298Skato return ret; 42126298Skato ret = qsfp_write(ppd, target, addr, bp, len); 42226298Skato release_chip_resource(dd, resource); 42326298Skato 42426298Skato return ret; 42526298Skato} 42626298Skato 42726298Skato/* 42826298Skato * Access page n, offset m of QSFP memory as defined by SFF 8636 42926298Skato * by reading @addr = ((256 * n) + m) 43030162Skato * 43130162Skato * Caller must hold the i2c chain resource. 43230162Skato * 43330162Skato * Return the number of bytes read or -errno. 43430162Skato */ 43526298Skatoint qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 43626298Skato int len) 43726298Skato{ 43826298Skato int count = 0; 43926298Skato int offset; 44026298Skato int nread; 44126298Skato int ret = 0; 44226298Skato u8 page; 44326298Skato 44426298Skato if (!check_chip_resource(ppd->dd, i2c_target(target), __func__)) 44526298Skato return -EACCES; 44626298Skato 44726298Skato while (count < len) { 44836094Skato /* 44936094Skato * Set the qsfp page based on a zero-based address 45036094Skato * and a page size of QSFP_PAGESIZE bytes. 45136094Skato */ 45236094Skato page = (u8)(addr / QSFP_PAGESIZE); 45340003Skato ret = __i2c_write(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE, 45436094Skato QSFP_PAGE_SELECT_BYTE_OFFS, &page, 1); 45536094Skato /* QSFPs require a 5-10msec delay after write operations */ 45636094Skato mdelay(5); 45736094Skato if (ret) { 45836094Skato hfi1_dev_porterr(ppd->dd, ppd->port, 45936094Skato "QSFP chain %d can't write QSFP_PAGE_SELECT_BYTE: %d\n", 46036094Skato target, ret); 46136094Skato break; 46236094Skato } 46361616Skato 46461616Skato offset = addr % QSFP_PAGESIZE; 46561616Skato nread = len - count; 46661616Skato /* truncate read to boundary if crossing boundary */ 46761616Skato if (((addr % QSFP_RW_BOUNDARY) + nread) > QSFP_RW_BOUNDARY) 46861616Skato nread = QSFP_RW_BOUNDARY - (addr % QSFP_RW_BOUNDARY); 46961616Skato 47061616Skato ret = __i2c_read(ppd, target, QSFP_DEV | QSFP_OFFSET_SIZE, 47161616Skato offset, bp + count, nread); 47261616Skato if (ret) /* stop on error */ 47361616Skato break; 47461616Skato 47561616Skato count += nread; 47661616Skato addr += nread; 47761616Skato } 47861616Skato 47961616Skato if (ret < 0) 48061616Skato return ret; 48161616Skato return count; 48261616Skato} 48361616Skato 48461616Skato/* 48561616Skato * Perform a stand-alone single QSFP read. Acquire the resource, do the 48661616Skato * read, then release the resource. 48761616Skato */ 48861616Skatoint one_qsfp_read(struct hfi1_pportdata *ppd, u32 target, int addr, void *bp, 48961616Skato int len) 49061616Skato{ 49161616Skato struct hfi1_devdata *dd = ppd->dd; 49261616Skato u32 resource = qsfp_resource(dd); 49361616Skato int ret; 49461616Skato 49561616Skato ret = acquire_chip_resource(dd, resource, QSFP_WAIT); 49661616Skato if (ret) 49761616Skato return ret; 49861616Skato ret = qsfp_read(ppd, target, addr, bp, len); 49961616Skato release_chip_resource(dd, resource); 50061616Skato 50161616Skato return ret; 50261616Skato} 50361616Skato 50427654Skato/* 50526298Skato * This function caches the QSFP memory range in 128 byte chunks. 50624113Skato * As an example, the next byte after address 255 is byte 128 from 50724113Skato * upper page 01H (if existing) rather than byte 0 from lower page 00H. 50824113Skato * Access page n, offset m of QSFP memory as defined by SFF 8636 50924113Skato * in the cache by reading byte ((128 * n) + m) 51024113Skato * The calls to qsfp_{read,write} in this function correctly handle the 51124113Skato * address map difference between this mapping and the mapping implemented 51224113Skato * by those functions 51324113Skato * 51424113Skato * The caller must be holding the QSFP i2c chain resource. 51524113Skato */ 51624113Skatoint refresh_qsfp_cache(struct hfi1_pportdata *ppd, struct qsfp_data *cp) 51724113Skato{ 51825159Skato u32 target = ppd->dd->hfi1_id; 51925159Skato int ret; 52025159Skato unsigned long flags; 52124113Skato u8 *cache = &cp->cache[0]; 52224113Skato 52324113Skato /* ensure sane contents on invalid reads, for cable swaps */ 52424113Skato memset(cache, 0, (QSFP_MAX_NUM_PAGES * 128)); 52524113Skato spin_lock_irqsave(&ppd->qsfp_info.qsfp_lock, flags); 52624113Skato ppd->qsfp_info.cache_valid = 0; 52724113Skato spin_unlock_irqrestore(&ppd->qsfp_info.qsfp_lock, flags); 52824113Skato 52924113Skato if (!qsfp_mod_present(ppd)) { 53024113Skato ret = -ENODEV; 53124113Skato goto bail; 53224113Skato } 53327654Skato 53426298Skato ret = qsfp_read(ppd, target, 0, cache, QSFP_PAGESIZE); 53526298Skato if (ret != QSFP_PAGESIZE) { 53626298Skato dd_dev_info(ppd->dd, 53736094Skato "%s: Page 0 read failed, expected %d, got %d\n", 53861616Skato __func__, QSFP_PAGESIZE, ret); 53961616Skato goto bail; 54061616Skato } 54161616Skato 54261616Skato /* Is paging enabled? */ 54361616Skato if (!(cache[2] & 4)) { 54461616Skato /* Paging enabled, page 03 required */ 54561616Skato if ((cache[195] & 0xC0) == 0xC0) { 54661616Skato /* all */ 54761616Skato ret = qsfp_read(ppd, target, 384, cache + 256, 128); 54836094Skato if (ret <= 0 || ret != 128) { 54926298Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 55024113Skato goto bail; 55124113Skato } 55224113Skato ret = qsfp_read(ppd, target, 640, cache + 384, 128); 55324113Skato if (ret <= 0 || ret != 128) { 55424113Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 55524113Skato goto bail; 55668490Sasmodai } 55724113Skato ret = qsfp_read(ppd, target, 896, cache + 512, 128); 55824113Skato if (ret <= 0 || ret != 128) { 55924113Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 56068490Sasmodai goto bail; 56168489Sasmodai } 56268490Sasmodai } else if ((cache[195] & 0x80) == 0x80) { 56324113Skato /* only page 2 and 3 */ 56424113Skato ret = qsfp_read(ppd, target, 640, cache + 384, 128); 56524113Skato if (ret <= 0 || ret != 128) { 56624113Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 56724113Skato goto bail; 56824113Skato } 56924113Skato ret = qsfp_read(ppd, target, 896, cache + 512, 128); 57024113Skato if (ret <= 0 || ret != 128) { 57124113Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 57224113Skato goto bail; 57365273Skato } 57465273Skato } else if ((cache[195] & 0x40) == 0x40) { 57565273Skato /* only page 1 and 3 */ 57665273Skato ret = qsfp_read(ppd, target, 384, cache + 256, 128); 57724113Skato if (ret <= 0 || ret != 128) { 57865273Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 57965273Skato goto bail; 58024113Skato } 58124113Skato ret = qsfp_read(ppd, target, 896, cache + 512, 128); 58224113Skato if (ret <= 0 || ret != 128) { 58324113Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 58424113Skato goto bail; 58524113Skato } 58624113Skato } else { 58724113Skato /* only page 3 */ 58824113Skato ret = qsfp_read(ppd, target, 896, cache + 512, 128); 58924113Skato if (ret <= 0 || ret != 128) { 59024113Skato dd_dev_info(ppd->dd, "%s failed\n", __func__); 59124113Skato goto bail; 59224113Skato } 59324113Skato } 59424113Skato } 59524113Skato 59624113Skato spin_lock_irqsave(&ppd->qsfp_info.qsfp_lock, flags); 59724113Skato ppd->qsfp_info.cache_valid = 1; 59868489Sasmodai ppd->qsfp_info.cache_refresh_required = 0; 59924113Skato spin_unlock_irqrestore(&ppd->qsfp_info.qsfp_lock, flags); 60024113Skato 60140003Skato return 0; 60240003Skato 60340003Skatobail: 60440003Skato memset(cache, 0, (QSFP_MAX_NUM_PAGES * 128)); 60540003Skato return ret; 60640003Skato} 60740003Skato 60840003Skatoconst char * const hfi1_qsfp_devtech[16] = { 60940003Skato "850nm VCSEL", "1310nm VCSEL", "1550nm VCSEL", "1310nm FP", 61074903Sjhb "1310nm DFB", "1550nm DFB", "1310nm EML", "1550nm EML", 61140003Skato "Cu Misc", "1490nm DFB", "Cu NoEq", "Cu Eq", 61240003Skato "Undef", "Cu Active BothEq", "Cu FarEq", "Cu NearEq" 61340003Skato}; 61440003Skato 61540003Skato#define QSFP_DUMP_CHUNK 16 /* Holds longest string */ 61640003Skato#define QSFP_DEFAULT_HDR_CNT 224 61774903Sjhb 61840003Skato#define QSFP_PWR(pbyte) (((pbyte) >> 6) & 3) 61940003Skato#define QSFP_HIGH_PWR(pbyte) ((pbyte) & 3) 62040003Skato/* For use with QSFP_HIGH_PWR macro */ 62140003Skato#define QSFP_HIGH_PWR_UNUSED 0 /* Bits [1:0] = 00 implies low power module */ 62240003Skato 62340003Skato/* 62440003Skato * Takes power class byte [Page 00 Byte 129] in SFF 8636 62540003Skato * Returns power class as integer (1 through 7, per SFF 8636 rev 2.4) 62640003Skato */ 62740003Skatoint get_qsfp_power_class(u8 power_byte) 62840003Skato{ 62940003Skato if (QSFP_HIGH_PWR(power_byte) == QSFP_HIGH_PWR_UNUSED) 63040003Skato /* power classes count from 1, their bit encodings from 0 */ 63140003Skato return (QSFP_PWR(power_byte) + 1); 63240003Skato /* 63340003Skato * 00 in the high power classes stands for unused, bringing 63440003Skato * balance to the off-by-1 offset above, we add 4 here to 63540003Skato * account for the difference between the low and high power 63640003Skato * groups 63740003Skato */ 63840003Skato return (QSFP_HIGH_PWR(power_byte) + 4); 63940003Skato} 64040003Skato 64140003Skatoint qsfp_mod_present(struct hfi1_pportdata *ppd) 64240003Skato{ 64340003Skato struct hfi1_devdata *dd = ppd->dd; 64440003Skato u64 reg; 64540003Skato 64640003Skato reg = read_csr(dd, dd->hfi1_id ? ASIC_QSFP2_IN : ASIC_QSFP1_IN); 64740003Skato return !(reg & QSFP_HFI0_MODPRST_N); 64840003Skato} 64974903Sjhb 65040003Skato/* 65140003Skato * This function maps QSFP memory addresses in 128 byte chunks in the following 65240003Skato * fashion per the CableInfo SMA query definition in the IBA 1.3 spec/OPA Gen 1 65340003Skato * spec 65440003Skato * For addr 000-127, lower page 00h 65540003Skato * For addr 128-255, upper page 00h 65640003Skato * For addr 256-383, upper page 01h 65740003Skato * For addr 384-511, upper page 02h 65840003Skato * For addr 512-639, upper page 03h 65940003Skato * 66040003Skato * For addresses beyond this range, it returns the invalid range of data buffer 66140003Skato * set to 0. 66240003Skato * For upper pages that are optional, if they are not valid, returns the 66340003Skato * particular range of bytes in the data buffer set to 0. 66440003Skato */ 66540003Skatoint get_cable_info(struct hfi1_devdata *dd, u32 port_num, u32 addr, u32 len, 66640003Skato u8 *data) 66740003Skato{ 66840003Skato struct hfi1_pportdata *ppd; 66940003Skato u32 excess_len = len; 67040003Skato int ret = 0, offset = 0; 67140003Skato 67240003Skato if (port_num > dd->num_pports || port_num < 1) { 67340003Skato dd_dev_info(dd, "%s: Invalid port number %d\n", 67440003Skato __func__, port_num); 67540003Skato ret = -EINVAL; 67640003Skato goto set_zeroes; 67740003Skato } 67840003Skato 67940003Skato ppd = dd->pport + (port_num - 1); 68042732Skato if (!qsfp_mod_present(ppd)) { 68140003Skato ret = -ENODEV; 68240003Skato goto set_zeroes; 68340003Skato } 68440003Skato 68542732Skato if (!ppd->qsfp_info.cache_valid) { 68642732Skato ret = -EINVAL; 68742732Skato goto set_zeroes; 68840003Skato } 68942112Smsmith 69042732Skato if (addr >= (QSFP_MAX_NUM_PAGES * 128)) { 69140003Skato ret = -ERANGE; 69240003Skato goto set_zeroes; 69340003Skato } 69440003Skato 69540003Skato if ((addr + len) > (QSFP_MAX_NUM_PAGES * 128)) { 69640003Skato excess_len = (addr + len) - (QSFP_MAX_NUM_PAGES * 128); 69740003Skato memcpy(data, &ppd->qsfp_info.cache[addr], (len - excess_len)); 69840003Skato data += (len - excess_len); 69942112Smsmith goto set_zeroes; 70040003Skato } 70140003Skato 70240003Skato memcpy(data, &ppd->qsfp_info.cache[addr], len); 70340003Skato 70440003Skato if (addr <= QSFP_MONITOR_VAL_END && 70540003Skato (addr + len) >= QSFP_MONITOR_VAL_START) { 70640003Skato /* Overlap with the dynamic channel monitor range */ 70742112Smsmith if (addr < QSFP_MONITOR_VAL_START) { 70840003Skato if (addr + len <= QSFP_MONITOR_VAL_END) 70940003Skato len = addr + len - QSFP_MONITOR_VAL_START; 71040003Skato else 71140003Skato len = QSFP_MONITOR_RANGE; 71240003Skato offset = QSFP_MONITOR_VAL_START - addr; 71342112Smsmith addr = QSFP_MONITOR_VAL_START; 71442112Smsmith } else if (addr == QSFP_MONITOR_VAL_START) { 71542112Smsmith offset = 0; 71642112Smsmith if (addr + len > QSFP_MONITOR_VAL_END) 71742112Smsmith len = QSFP_MONITOR_RANGE; 71842112Smsmith } else { 71942112Smsmith offset = 0; 72042112Smsmith if (addr + len > QSFP_MONITOR_VAL_END) 72142112Smsmith len = QSFP_MONITOR_VAL_END - addr + 1; 72242112Smsmith } 72342112Smsmith /* Refresh the values of the dynamic monitors from the cable */ 72442112Smsmith ret = one_qsfp_read(ppd, dd->hfi1_id, addr, data + offset, len); 72542112Smsmith if (ret != len) { 72642112Smsmith ret = -EAGAIN; 72742112Smsmith goto set_zeroes; 72842112Smsmith } 72942112Smsmith } 73042112Smsmith 73142112Smsmith return 0; 73242112Smsmith 73342112Smsmithset_zeroes: 73442112Smsmith memset(data, 0, excess_len); 73542112Smsmith return ret; 73642112Smsmith} 73742112Smsmith 73842112Smsmithstatic const char *pwr_codes[8] = {"N/AW", 73942112Smsmith "1.5W", 74042112Smsmith "2.0W", 74142112Smsmith "2.5W", 74242112Smsmith "3.5W", 74342112Smsmith "4.0W", 74442112Smsmith "4.5W", 74542112Smsmith "5.0W" 74642732Skato }; 74742732Skato 74842112Smsmithint qsfp_dump(struct hfi1_pportdata *ppd, char *buf, int len) 74942112Smsmith{ 75042112Smsmith u8 *cache = &ppd->qsfp_info.cache[0]; 75142112Smsmith u8 bin_buff[QSFP_DUMP_CHUNK]; 75242112Smsmith char lenstr[6]; 75342112Smsmith int sofar; 75442112Smsmith int bidx = 0; 75542112Smsmith u8 *atten = &cache[QSFP_ATTEN_OFFS]; 75642112Smsmith u8 *vendor_oui = &cache[QSFP_VOUI_OFFS]; 75742112Smsmith u8 power_byte = 0; 75842112Smsmith 75942112Smsmith sofar = 0; 76042112Smsmith lenstr[0] = ' '; 76142112Smsmith lenstr[1] = '\0'; 76242112Smsmith 76342112Smsmith if (ppd->qsfp_info.cache_valid) { 76442112Smsmith if (QSFP_IS_CU(cache[QSFP_MOD_TECH_OFFS])) 76542112Smsmith snprintf(lenstr, sizeof(lenstr), "%dM ", 76642112Smsmith cache[QSFP_MOD_LEN_OFFS]); 76742112Smsmith 76842112Smsmith power_byte = cache[QSFP_MOD_PWR_OFFS]; 76942112Smsmith sofar += scnprintf(buf + sofar, len - sofar, "PWR:%.3sW\n", 77042112Smsmith pwr_codes[get_qsfp_power_class(power_byte)]); 77142112Smsmith 77242112Smsmith sofar += scnprintf(buf + sofar, len - sofar, "TECH:%s%s\n", 77342112Smsmith lenstr, 77440003Skato hfi1_qsfp_devtech[(cache[QSFP_MOD_TECH_OFFS]) >> 4]); 77540003Skato 77624113Skato sofar += scnprintf(buf + sofar, len - sofar, "Vendor:%.*s\n", 77724113Skato QSFP_VEND_LEN, &cache[QSFP_VEND_OFFS]); 77824113Skato 77924113Skato sofar += scnprintf(buf + sofar, len - sofar, "OUI:%06X\n", 78024113Skato QSFP_OUI(vendor_oui)); 78124113Skato 78224113Skato sofar += scnprintf(buf + sofar, len - sofar, "Part#:%.*s\n", 78324113Skato QSFP_PN_LEN, &cache[QSFP_PN_OFFS]); 78441770Sdillon 78541770Sdillon sofar += scnprintf(buf + sofar, len - sofar, "Rev:%.*s\n", 78624113Skato QSFP_REV_LEN, &cache[QSFP_REV_OFFS]); 78724113Skato 78824113Skato if (QSFP_IS_CU(cache[QSFP_MOD_TECH_OFFS])) 78924113Skato sofar += scnprintf(buf + sofar, len - sofar, 79024113Skato "Atten:%d, %d\n", 79124113Skato QSFP_ATTEN_SDR(atten), 79224113Skato QSFP_ATTEN_DDR(atten)); 79325159Skato 79424113Skato sofar += scnprintf(buf + sofar, len - sofar, "Serial:%.*s\n", 79524113Skato QSFP_SN_LEN, &cache[QSFP_SN_OFFS]); 79624113Skato 79724113Skato sofar += scnprintf(buf + sofar, len - sofar, "Date:%.*s\n", 79824113Skato QSFP_DATE_LEN, &cache[QSFP_DATE_OFFS]); 79930162Skato 80024113Skato sofar += scnprintf(buf + sofar, len - sofar, "Lot:%.*s\n", 80124113Skato QSFP_LOT_LEN, &cache[QSFP_LOT_OFFS]); 80230162Skato 80324113Skato while (bidx < QSFP_DEFAULT_HDR_CNT) { 80424113Skato int iidx; 80524113Skato 80624113Skato memcpy(bin_buff, &cache[bidx], QSFP_DUMP_CHUNK); 80724113Skato for (iidx = 0; iidx < QSFP_DUMP_CHUNK; ++iidx) { 80824113Skato sofar += scnprintf(buf + sofar, len - sofar, 80924113Skato " %02X", bin_buff[iidx]); 81025159Skato } 81124113Skato sofar += scnprintf(buf + sofar, len - sofar, "\n"); 81224113Skato bidx += QSFP_DUMP_CHUNK; 81324113Skato } 81424113Skato } 81530162Skato return sofar; 81624113Skato} 81730162Skato