Searched refs:uc (Results 126 - 150 of 359) sorted by path

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/linux-master/drivers/gpu/drm/xe/
H A Dxe_gt_sriov_pf_policy.c42 struct xe_guc *guc = &gt->uc.guc;
H A Dxe_gt_tlb_invalidation.c96 struct xe_guc *guc = &gt->uc.guc;
104 mutex_lock(&gt->uc.guc.ct.lock);
125 mutex_unlock(&gt->uc.guc.ct.lock);
222 return send_tlb_invalidation(&gt->uc.guc, NULL, action,
239 if (xe_guc_ct_enabled(&gt->uc.guc.ct) &&
240 gt->uc.guc.submission_state.enabled) {
349 return send_tlb_invalidation(&gt->uc.guc, fence, action, len);
364 struct xe_guc *guc = &gt->uc.guc;
H A Dxe_gt_types.h283 /** @uc: micro controllers on the GT */
284 struct xe_uc uc; member in struct:xe_gt
H A Dxe_guc.c248 xe_uc_fini_hw(&guc_to_gt(guc)->uc);
H A Dxe_guc.h65 return container_of(guc, struct xe_gt, uc.guc);
H A Dxe_guc_ads.c38 return container_of(ads, struct xe_gt, uc.guc.ads);
H A Dxe_guc_ct.c72 return container_of(ct, struct xe_gt, uc.guc.ct);
H A Dxe_guc_log.c18 return container_of(log, struct xe_gt, uc.guc.log);
H A Dxe_guc_pc.c79 struct xe_gt *gt = container_of(guc, struct xe_gt, uc.guc);
87 return container_of(pc, struct xe_gt, uc.guc.pc);
H A Dxe_guc_submit.c46 return &q->gt->uc.guc;
H A Dxe_huc.c27 return container_of(huc, struct xe_gt, uc.huc);
178 err = xe_gsc_pkt_submit_kernel(&gt->uc.gsc, ggtt_offset, wr_offset,
H A Dxe_huc_debugfs.c20 return container_of(huc, struct xe_gt, uc.huc);
H A Dxe_hw_engine.c717 if (!xe_uc_fw_is_available(&gt->uc.gsc.fw)) {
H A Dxe_irq.c245 return xe_guc_irq_handler(&gt->uc.guc, iir);
247 return xe_guc_irq_handler(&gt->uc.guc, iir);
249 return xe_gsc_proxy_irq_handler(&gt->uc.gsc, iir);
H A Dxe_memirq.c421 memirq_dispatch_guc(memirq, &map, &tile->primary_gt->uc.guc);
429 memirq_dispatch_guc(memirq, &map, &tile->media_gt->uc.guc);
H A Dxe_pm.c407 xe->d3cold.power_lost = xe_guc_in_reset(&gt->uc.guc);
H A Dxe_query.c428 size_t size = xe_guc_hwconfig_size(&gt->uc.guc);
443 xe_guc_hwconfig_copy(&gt->uc.guc, hwconfig);
547 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
573 huc = &media_gt->uc.huc;
H A Dxe_uc.c21 uc_to_gt(struct xe_uc *uc) argument
23 return container_of(uc, struct xe_gt, uc);
27 uc_to_xe(struct xe_uc *uc) argument
29 return gt_to_xe(uc_to_gt(uc));
33 int xe_uc_init(struct xe_uc *uc) argument
41 ret = xe_guc_init(&uc->guc);
45 ret = xe_huc_init(&uc->huc);
49 ret = xe_gsc_init(&uc->gsc);
53 if (!xe_device_uc_enabled(uc_to_xe(uc)))
76 xe_uc_init_post_hwconfig(struct xe_uc *uc) argument
99 uc_reset(struct xe_uc *uc) argument
113 xe_uc_sanitize(struct xe_uc *uc) argument
119 xe_uc_sanitize_reset(struct xe_uc *uc) argument
132 xe_uc_init_hwconfig(struct xe_uc *uc) argument
151 xe_uc_init_hw(struct xe_uc *uc) argument
193 xe_uc_fini_hw(struct xe_uc *uc) argument
198 xe_uc_reset_prepare(struct xe_uc *uc) argument
207 xe_uc_gucrc_disable(struct xe_uc *uc) argument
212 xe_uc_stop_prepare(struct xe_uc *uc) argument
218 xe_uc_stop(struct xe_uc *uc) argument
227 xe_uc_start(struct xe_uc *uc) argument
236 uc_reset_wait(struct xe_uc *uc) argument
248 xe_uc_suspend(struct xe_uc *uc) argument
273 xe_uc_remove(struct xe_uc *uc) argument
[all...]
H A Dxe_uc.h11 int xe_uc_init(struct xe_uc *uc);
12 int xe_uc_init_hwconfig(struct xe_uc *uc);
13 int xe_uc_init_post_hwconfig(struct xe_uc *uc);
14 int xe_uc_init_hw(struct xe_uc *uc);
15 int xe_uc_fini_hw(struct xe_uc *uc);
16 void xe_uc_gucrc_disable(struct xe_uc *uc);
17 int xe_uc_reset_prepare(struct xe_uc *uc);
18 void xe_uc_stop_prepare(struct xe_uc *uc);
19 int xe_uc_stop(struct xe_uc *uc);
20 int xe_uc_start(struct xe_uc *uc);
[all...]
H A Dxe_uc_debugfs.c16 void xe_uc_debugfs_register(struct xe_uc *uc, struct dentry *parent) argument
20 root = debugfs_create_dir("uc", parent);
26 xe_guc_debugfs_register(&uc->guc, root);
27 xe_huc_debugfs_register(&uc->huc, root);
H A Dxe_uc_debugfs.h12 void xe_uc_debugfs_register(struct xe_uc *uc, struct dentry *parent);
H A Dxe_uc_fw.c172 return container_of(uc_fw, struct xe_gt, uc.guc.fw);
174 return container_of(uc_fw, struct xe_gt, uc.huc.fw);
176 return container_of(uc_fw, struct xe_gt, uc.gsc.fw);
647 * before we're looked at the HW caps to see if we have uc support
839 /* make sure the status was cleared the last time we reset the uc */
H A Dxe_wopcm.c74 return container_of(wopcm, struct xe_gt, uc.wopcm);
143 u32 huc_agent = xe_uc_fw_is_available(&gt->uc.huc.fw) ? HUC_LOADING_AGENT_GUC : 0;
201 u32 guc_fw_size = xe_uc_fw_get_upload_size(&gt->uc.guc.fw);
202 u32 huc_fw_size = xe_uc_fw_get_upload_size(&gt->uc.huc.fw);
/linux-master/drivers/infiniband/hw/hfi1/
H A DMakefile46 uc.o \
/linux-master/drivers/infiniband/sw/rxe/
H A Drxe.h44 #define rxe_dbg_uc(uc, fmt, ...) ibdev_dbg((uc)->ibuc.device, \
45 "uc#%d %s: " fmt, (uc)->elem.index, __func__, ##__VA_ARGS__)
65 #define rxe_err_uc(uc, fmt, ...) ibdev_err_ratelimited((uc)->ibuc.device, \
66 "uc#%d %s: " fmt, (uc)->elem.index, __func__, ##__VA_ARGS__)
86 #define rxe_info_uc(uc, fmt, ...) ibdev_info_ratelimited((uc)
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