/linux-master/arch/arm/include/asm/ |
H A D | proc-fns.h | 156 #define cpu_get_ttbr(nr) \ 159 __asm__("mrrc p15, " #nr ", %Q0, %R0, c2" \
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H A D | sync_bitops.h | 21 #define sync_set_bit(nr, p) _set_bit(nr, p) 22 #define sync_clear_bit(nr, p) _clear_bit(nr, p) 23 #define sync_change_bit(nr, p) _change_bit(nr, p) 24 #define sync_test_bit(nr, addr) test_bit(nr, addr) 30 int _sync_test_and_set_bit(int nr, volatile unsigned long * p); 31 #define sync_test_and_set_bit(nr, [all...] |
H A D | tlbflush.h | 626 unsigned long addr, pte_t *ptep, unsigned int nr); 630 unsigned int nr) 628 update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma, unsigned long addr, pte_t *ptep, unsigned int nr) argument
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/linux-master/arch/arm/include/asm/vdso/ |
H A D | gettimeofday.h | 27 register long nr asm("r7") = __NR_gettimeofday; 32 : "r" (tv), "r" (tz), "r" (nr) 45 register long nr asm("r7") = __NR_clock_gettime64; 50 : "r" (clkid), "r" (ts), "r" (nr) 63 register long nr asm("r7") = __NR_clock_gettime; 68 : "r" (clkid), "r" (ts), "r" (nr) 81 register long nr asm("r7") = __NR_clock_getres_time64; 86 : "r" (clkid), "r" (ts), "r" (nr) 99 register long nr asm("r7") = __NR_clock_getres; 104 : "r" (clkid), "r" (ts), "r" (nr) [all...] |
/linux-master/arch/arm/kernel/ |
H A D | asm-offsets.c | 119 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
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H A D | atags_parse.c | 189 if (machine_nr == p->nr) {
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H A D | bios32.c | 431 int nr, busnr; local 433 for (nr = busnr = 0; nr < hw->nr_controllers; nr++) { 448 sys->private_data = hw->private_data[nr]; 450 ret = hw->setup(nr, sys); 454 ret = pcibios_init_resource(nr, sys); 464 ret = hw->scan(nr, bridge);
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H A D | devtree.c | 235 __machine_arch_type = mdesc->nr;
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H A D | entry-common.S | 324 .macro syscall, nr, func 325 .ifgt __sys_nr - \nr 328 .rept \nr - __sys_nr 332 .equ __sys_nr, \nr + 1 345 #define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native) 346 #define __SYSCALL(nr, func) syscall nr, func 456 #define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, compa [all...] |
H A D | entry-header.S | 392 .macro invoke_syscall, table, nr, tmp, ret, reload=0 394 mov \tmp, \nr 406 cmp \nr, #NR_syscalls @ check upper syscall limit 413 ldrcc pc, [\table, \nr, lsl #2] @ call sys_* routine
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H A D | perf_callchain.c | 74 while ((entry->nr < entry->max_stack) &&
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H A D | setup.c | 752 early_print("%08x\t%s\n", p->nr, p->name);
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/linux-master/arch/arm/mach-davinci/ |
H A D | sleep.S | 7 #define BIT(nr) (1 << (nr))
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/linux-master/arch/arm/mach-dove/ |
H A D | pcie.c | 35 static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) argument 40 if (nr >= num_pcie_ports) 43 pp = &pcie_port[nr]; 159 dove_pcie_scan_bus(int nr, struct pci_host_bridge *bridge) argument 163 if (nr >= num_pcie_ports) {
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/linux-master/arch/arm/mach-footbridge/ |
H A D | dc21285.c | 261 int __init dc21285_setup(int nr, struct pci_sys_data *sys) argument
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/linux-master/arch/arm/mach-mv78xx0/ |
H A D | pcie.c | 98 static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys) argument 103 if (nr >= num_pcie_ports) 106 pp = &pcie_port[nr]; 116 realio.start = nr * SZ_64K; 118 pci_remap_iospace(&realio, MV78XX0_PCIE_IO_PHYS_BASE(nr)); 202 static int __init mv78xx0_pcie_scan_bus(int nr, struct pci_host_bridge *bridge) argument 206 if (nr >= num_pcie_ports) {
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/linux-master/arch/arm/mach-mxs/ |
H A D | mach-mxs.c | 47 #define MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr))
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/linux-master/arch/arm/mach-omap1/ |
H A D | mtd-xip.h | 30 static inline unsigned long xip_omap_mpu_timer_read(int nr) argument 32 volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr);
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H A D | time.c | 74 static inline unsigned long notrace omap_mpu_timer_read(int nr) argument 76 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); 80 static inline void omap_mpu_set_autoreset(int nr) argument 82 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); 87 static inline void omap_mpu_remove_autoreset(int nr) argument 89 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); 94 static inline void omap_mpu_timer_start(int nr, unsigned long load_val, argument 97 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); 110 static inline void omap_mpu_timer_stop(int nr) argument 112 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr); [all...] |
/linux-master/arch/arm/mach-omap2/ |
H A D | sleep33xx.S | 24 #define BIT(nr) (1 << (nr))
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H A D | sleep43xx.S | 26 #define BIT(nr) (1 << (nr))
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/linux-master/arch/arm/mach-orion5x/ |
H A D | common.h | 63 int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys); 64 int orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge);
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H A D | pci.c | 369 static void __init orion5x_pci_set_bus_nr(int nr) argument 382 pcix_status |= (nr << PCIX_STAT_BUS_OFFS); 389 p2p |= (nr << PCI_P2P_BUS_OFFS); 550 int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys) argument 554 if (nr == 0) { 559 if (nr == 1 && !orion5x_pci_disabled) { 567 int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge) argument 576 if (nr == 0) { 581 if (nr == 1 && !orion5x_pci_disabled) {
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/linux-master/arch/arm/mach-pxa/ |
H A D | generic.c | 68 void pxa_smemc_set_pcmcia_socket(int nr) argument 70 switch (nr) {
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H A D | spitz.c | 238 static void spitz_pcmcia_pwr(struct device *scoop, uint16_t cpr, int nr) argument 241 if (nr == 0)
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