/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
H A D | irq_service_dcn10.c | 220 .funcs = &hpd_irq_info_funcs\ 229 .funcs = &hpd_rx_irq_info_funcs\ 236 .funcs = &pflip_irq_info_funcs\ 247 .funcs = &vupdate_no_lock_irq_info_funcs\ 255 .funcs = &vblank_irq_info_funcs\ 263 .funcs = &vline0_irq_info_funcs\ 268 .funcs = &dummy_irq_info_funcs\ 393 irq_service->funcs = &irq_service_funcs_dcn10;
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/linux-master/include/drm/ |
H A D | drm_plane.h | 690 /** @funcs: plane control functions */ 691 const struct drm_plane_funcs *funcs; member in struct:drm_plane 790 const struct drm_plane_funcs *funcs, 802 const struct drm_plane_funcs *funcs, 815 * @funcs: callbacks for the new plane 835 #define drmm_universal_plane_alloc(dev, type, member, possible_crtcs, funcs, formats, \ 839 possible_crtcs, funcs, formats, \ 847 const struct drm_plane_funcs *funcs, 860 * @funcs: callbacks for the new plane 879 #define drm_universal_plane_alloc(dev, type, member, possible_crtcs, funcs, format [all...] |
/linux-master/drivers/pinctrl/ |
H A D | pinctrl-equilibrium.c | 569 static bool is_func_exist(struct eqbr_pmx_func *funcs, const char *name, argument 574 if (!funcs) 578 if (funcs[i].name && !strcmp(funcs[i].name, name)) { 587 static int funcs_utils(struct device *dev, struct eqbr_pmx_func *funcs, argument 612 if (!is_func_exist(funcs, fn_name, *nr_funcs, &fid)) 617 if (!is_func_exist(funcs, fn_name, *nr_funcs, &fid)) 618 funcs[i].name = fn_name; 622 if (is_func_exist(funcs, fn_name, *nr_funcs, &fid)) 623 funcs[fi 648 struct eqbr_pmx_func *funcs = NULL; local [all...] |
H A D | pinctrl-tps6594.c | 176 const struct tps6594_pinctrl_function *funcs; member in struct:tps6594_pinctrl 212 return pinctrl->funcs[selector].pinfunction.name; 222 *groups = pinctrl->funcs[selector].pinfunction.groups; 223 *num_groups = pinctrl->funcs[selector].pinfunction.ngroups; 242 u8 muxval = pinctrl->funcs[function].muxval; 263 u8 muxval = pinctrl->funcs[TPS6594_PINCTRL_GPIO_FUNCTION].muxval; 332 pinctrl->funcs = pinctrl_functions;
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/linux-master/drivers/pinctrl/qcom/ |
H A D | pinctrl-lpass-lpi.h | 50 .funcs = (int[]){ \ 70 unsigned int *funcs; member in struct:lpi_pingroup
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
H A D | irq_service_dcn20.c | 225 .funcs = &hpd_irq_info_funcs\ 234 .funcs = &hpd_rx_irq_info_funcs\ 241 .funcs = &pflip_irq_info_funcs\ 252 .funcs = &vupdate_no_lock_irq_info_funcs\ 260 .funcs = &vblank_irq_info_funcs\ 268 .funcs = &vline0_irq_info_funcs\ 273 .funcs = &dummy_irq_info_funcs\ 398 irq_service->funcs = &irq_service_funcs_dcn20;
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/linux-master/drivers/pinctrl/aspeed/ |
H A D | pinctrl-aspeed.c | 165 const struct aspeed_sig_expr ***prios, **funcs, *expr; local 169 while ((funcs = *prios)) { 170 while ((expr = *funcs)) { 188 funcs++; 237 const struct aspeed_sig_expr **funcs; local 251 while ((funcs = *prios)) { 252 expr = aspeed_find_expr_by_name(funcs, pfunc->name); 257 ret = aspeed_disable_sig(&pdata->pinmux, funcs); 384 const struct aspeed_sig_expr ***prios, **funcs, *expr; local 397 while ((funcs [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | soc15.c | 320 return adev->nbio.funcs->get_memsize(adev); 489 adev->nbio.funcs->enable_doorbell_interrupt(adev, false); 497 adev->nbio.funcs->enable_doorbell_interrupt(adev, true); 672 if (adev->nbio.funcs->program_aspm) 673 adev->nbio.funcs->program_aspm(adev); 682 .funcs = &soc15_common_ip_funcs, 1216 adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true); 1228 if (adev->df.funcs && 1229 adev->df.funcs->sw_init) 1230 adev->df.funcs [all...] |
H A D | gmc_v10_0.c | 197 adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs; 201 adev->gmc.ecc_irq.funcs = &gmc_v10_0_ecc_funcs; 267 adev->hdp.funcs->flush_hdp(adev, NULL); 605 adev->mmhub.funcs = &mmhub_v2_3_funcs; 608 adev->mmhub.funcs = &mmhub_v2_0_funcs; 624 adev->gfxhub.funcs = &gfxhub_v2_1_funcs; 627 adev->gfxhub.funcs = &gfxhub_v2_0_funcs; 675 base = adev->gfxhub.funcs->get_fb_location(adev); 687 adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev); 709 adev->nbio.funcs [all...] |
H A D | smu_v13_0_10.c | 83 r = adev->ip_blocks[i].version->funcs->suspend(adev); 88 adev->ip_blocks[i].version->funcs->name, r); 189 r = adev->ip_blocks[i].version->funcs->resume(adev); 193 adev->ip_blocks[i].version->funcs->name, r); 209 if (adev->ip_blocks[i].version->funcs->late_init) { 210 r = adev->ip_blocks[i].version->funcs->late_init( 215 adev->ip_blocks[i].version->funcs->name,
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/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_edp_panel_control.c | 576 if (psr != NULL && link->psr_settings.psr_feature_enabled && psr->funcs->psr_set_power_opt) 577 psr->funcs->psr_set_power_opt(psr, link->psr_settings.psr_power_opt, panel_inst); 581 force_static && psr->funcs->psr_force_static) 582 psr->funcs->psr_force_static(psr, panel_inst); 592 psr->funcs->psr_enable(psr, link->psr_settings.psr_allow_active, wait, panel_inst); 593 } else if ((dmcu != NULL && dmcu->funcs->is_dmcu_initialized(dmcu)) && 595 dmcu->funcs->set_psr_enable(dmcu, link->psr_settings.psr_allow_active, wait); 613 psr->funcs->psr_get_state(psr, state, panel_inst); 615 dmcu->funcs->get_psr_state(dmcu, state); 834 link->psr_settings.psr_feature_enabled = psr->funcs [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dce120/ |
H A D | irq_service_dce120.c | 123 .funcs = &hpd_irq_info_funcs\ 132 .funcs = &hpd_rx_irq_info_funcs\ 140 .funcs = &pflip_irq_info_funcs\ 148 .funcs = &vupdate_irq_info_funcs\ 156 .funcs = &vblank_irq_info_funcs,\ 162 .funcs = &dummy_irq_info_funcs\ 281 irq_service->funcs = &irq_service_funcs_dce120;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dce60/ |
H A D | irq_service_dce60.c | 113 .funcs = &hpd_irq_info_funcs\ 127 .funcs = &hpd_rx_irq_info_funcs\ 142 .funcs = &pflip_irq_info_funcs\ 158 .funcs = &vblank_irq_info_funcs\ 174 .funcs = &vblank_irq_info_funcs_dce60\ 179 .funcs = &dummy_irq_info_funcs\ 379 irq_service->funcs = &irq_service_funcs_dce60;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dce80/ |
H A D | irq_service_dce80.c | 104 .funcs = &hpd_irq_info_funcs\ 118 .funcs = &hpd_rx_irq_info_funcs\ 133 .funcs = &pflip_irq_info_funcs\ 149 .funcs = &vupdate_irq_info_funcs\ 165 .funcs = &vblank_irq_info_funcs,\ 171 .funcs = &dummy_irq_info_funcs\ 291 irq_service->funcs = &irq_service_funcs_dce80;
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
H A D | rv1_clk_mgr.c | 159 clk_mgr->funcs->set_dispclk(clk_mgr, dispclk_to_dpp_threshold); 160 clk_mgr->funcs->set_dprefclk(clk_mgr); 170 pipe_ctx->plane_res.dpp->funcs->dpp_dppclk_control( 178 clk_mgr->funcs->set_dispclk(clk_mgr, new_clocks->dispclk_khz); 179 clk_mgr->funcs->set_dprefclk(clk_mgr); 324 clk_mgr->base.funcs = &rv1_clk_funcs; 325 clk_mgr->funcs = &rv1_clk_internal_funcs;
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/linux-master/drivers/gpu/drm/ |
H A D | drm_debugfs_crc.c | 87 if (crtc->funcs->get_crc_sources) { 89 const char *const *sources = crtc->funcs->get_crc_sources(crtc, 98 if (!crtc->funcs->verify_crc_source(crtc, sources[i], 146 ret = crtc->funcs->verify_crc_source(crtc, source, &values_cnt); 216 ret = crtc->funcs->verify_crc_source(crtc, crc->source, &values_cnt); 245 ret = crtc->funcs->set_crc_source(crtc, crc->source); 268 crtc->funcs->set_crc_source(crtc, NULL); 372 if (!crtc->funcs->set_crc_source || !crtc->funcs->verify_crc_source)
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn32/ |
H A D | irq_service_dcn32.c | 243 .funcs = &hpd_irq_info_funcs\ 252 .funcs = &hpd_rx_irq_info_funcs\ 259 .funcs = &pflip_irq_info_funcs\ 270 .funcs = &vupdate_no_lock_irq_info_funcs\ 278 .funcs = &vblank_irq_info_funcs\ 286 .funcs = &vline0_irq_info_funcs\ 293 .funcs = &outbox_irq_info_funcs\ 298 .funcs = &dummy_irq_info_funcs\ 418 irq_service->funcs = &irq_service_funcs_dcn32;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn35/ |
H A D | irq_service_dcn35.c | 239 REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\ 247 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\ 253 REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\ 262 REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\ 268 REG_STRUCT[DC_IRQ_SOURCE_VBLANK1 + reg_num].funcs = &vblank_irq_info_funcs\ 274 REG_STRUCT[DC_IRQ_SOURCE_DC1_VLINE0 + reg_num].funcs = &vline0_irq_info_funcs\ 280 REG_STRUCT[DC_IRQ_SOURCE_DMCUB_OUTBOX].funcs = &outbox_irq_info_funcs 283 REG_STRUCT[irqno].funcs = &dummy_irq_info_funcs\ 413 irq_service->funcs = &irq_service_funcs_dcn35;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn315/ |
H A D | irq_service_dcn315.c | 249 .funcs = &hpd_irq_info_funcs\ 258 .funcs = &hpd_rx_irq_info_funcs\ 265 .funcs = &pflip_irq_info_funcs\ 276 .funcs = &vupdate_no_lock_irq_info_funcs\ 284 .funcs = &vblank_irq_info_funcs\ 292 .funcs = &vline0_irq_info_funcs\ 299 .funcs = &outbox_irq_info_funcs\ 304 .funcs = &dummy_irq_info_funcs\ 424 irq_service->funcs = &irq_service_funcs_dcn315;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
H A D | irq_service_dcn302.c | 210 .funcs = &dmub_trace_irq_info_funcs\ 233 .funcs = &hpd_irq_info_funcs\ 242 .funcs = &hpd_rx_irq_info_funcs\ 249 .funcs = &pflip_irq_info_funcs\ 260 .funcs = &vupdate_no_lock_irq_info_funcs\ 268 .funcs = &vblank_irq_info_funcs\ 276 .funcs = &vline0_irq_info_funcs\ 279 #define dummy_irq_entry() { .funcs = &dummy_irq_info_funcs } 392 irq_service->funcs = &irq_service_funcs_dcn302;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
H A D | irq_service_dcn30.c | 254 .funcs = &hpd_irq_info_funcs\ 263 .funcs = &hpd_rx_irq_info_funcs\ 270 .funcs = &pflip_irq_info_funcs\ 281 .funcs = &vupdate_no_lock_irq_info_funcs\ 289 .funcs = &vblank_irq_info_funcs\ 296 .funcs = &dmub_trace_irq_info_funcs\ 304 .funcs = &vline0_irq_info_funcs\ 309 .funcs = &dummy_irq_info_funcs\ 435 irq_service->funcs = &irq_service_funcs_dcn30;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn31/ |
H A D | irq_service_dcn31.c | 242 .funcs = &hpd_irq_info_funcs\ 251 .funcs = &hpd_rx_irq_info_funcs\ 258 .funcs = &pflip_irq_info_funcs\ 269 .funcs = &vupdate_no_lock_irq_info_funcs\ 277 .funcs = &vblank_irq_info_funcs\ 285 .funcs = &vline0_irq_info_funcs\ 292 .funcs = &outbox_irq_info_funcs\ 297 .funcs = &dummy_irq_info_funcs\ 417 irq_service->funcs = &irq_service_funcs_dcn31;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn314/ |
H A D | irq_service_dcn314.c | 244 .funcs = &hpd_irq_info_funcs\ 253 .funcs = &hpd_rx_irq_info_funcs\ 260 .funcs = &pflip_irq_info_funcs\ 271 .funcs = &vupdate_no_lock_irq_info_funcs\ 279 .funcs = &vblank_irq_info_funcs\ 287 .funcs = &vline0_irq_info_funcs\ 294 .funcs = &outbox_irq_info_funcs\ 299 .funcs = &dummy_irq_info_funcs\ 419 irq_service->funcs = &irq_service_funcs_dcn314;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
H A D | irq_service_dcn21.c | 247 .funcs = &hpd_irq_info_funcs\ 256 .funcs = &hpd_rx_irq_info_funcs\ 263 .funcs = &pflip_irq_info_funcs\ 274 .funcs = &vupdate_no_lock_irq_info_funcs\ 282 .funcs = &vblank_irq_info_funcs\ 290 .funcs = &vline0_irq_info_funcs\ 297 .funcs = &dmub_outbox_irq_info_funcs\ 302 .funcs = &dummy_irq_info_funcs\ 426 irq_service->funcs = &irq_service_funcs_dcn21;
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn351/ |
H A D | irq_service_dcn351.c | 218 REG_STRUCT[DC_IRQ_SOURCE_HPD1 + reg_num].funcs = &hpd_irq_info_funcs;\ 226 REG_STRUCT[DC_IRQ_SOURCE_HPD1RX + reg_num].funcs = &hpd_rx_irq_info_funcs;\ 232 REG_STRUCT[DC_IRQ_SOURCE_PFLIP1 + reg_num].funcs = &pflip_irq_info_funcs\ 241 REG_STRUCT[DC_IRQ_SOURCE_VUPDATE1 + reg_num].funcs = &vupdate_no_lock_irq_info_funcs\ 247 REG_STRUCT[DC_IRQ_SOURCE_VBLANK1 + reg_num].funcs = &vblank_irq_info_funcs\ 253 REG_STRUCT[DC_IRQ_SOURCE_DC1_VLINE0 + reg_num].funcs = &vline0_irq_info_funcs\ 259 REG_STRUCT[DC_IRQ_SOURCE_DMCUB_OUTBOX].funcs = &outbox_irq_info_funcs 262 REG_STRUCT[irqno].funcs = &dummy_irq_info_funcs\ 395 irq_service->funcs = &irq_service_funcs_dcn351;
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