Searched refs:bpp (Results 101 - 125 of 462) sorted by relevance

1234567891011>>

/linux-master/sound/usb/caiaq/
H A Ddevice.c238 int rate, int depth, int bpp)
259 tmp[2] = bpp & 0xff;
260 tmp[3] = bpp >> 8;
263 dev_dbg(dev, "setting audio params: %d Hz, %d bits, %d bpp\n",
264 rate, depth, bpp);
280 cdev->bpp = bpp;
237 snd_usb_caiaq_set_audio_params(struct snd_usb_caiaqdev *cdev, int rate, int depth, int bpp) argument
/linux-master/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_lcdc_encoder.c52 int bpp, nchan, swap; local
57 bpp = 3 * connector->display_info.bpc;
59 if (!bpp)
60 bpp = 18;
66 switch (bpp) {
165 DRM_DEV_ERROR(dev->dev, "unknown bpp: %d\n", bpp);
310 /* TODO: hard-coded for 18bpp: */
/linux-master/drivers/gpu/drm/tilcdc/
H A Dtilcdc_drv.c201 u32 bpp = 0; local
265 bpp = 16;
275 bpp = 32; /* Choose bpp with RGB support for fbdef */
281 bpp = 16; /* Choose bpp with RGB support for fbdef */
288 bpp = 16; /* This is just a guess */
377 drm_fbdev_dma_setup(ddev, bpp);
H A Dtilcdc_external.c22 .bpp = 16,
35 .bpp = 16,
H A Dtilcdc_drv.h133 uint32_t bpp; member in struct:tilcdc_panel_info
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_formats.c27 * DPU supported format packing, bpp, and other format
46 .bpp = bp, \
65 .bpp = bp, \
85 .bpp = bp, \
103 .bpp = 2, \
122 .bpp = 2, \
140 .bpp = 2, \
159 .bpp = 2, \
179 .bpp = bp, \
729 layout->plane_size[0] = width * height * layout->format->bpp;
734 uint32_t bpp = 1; local
[all...]
/linux-master/drivers/gpu/drm/i915/display/
H A Dvlv_dsi.c53 static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count, argument
56 return DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio,
61 static u16 pixels_from_txbyteclkhs(u16 clk_hs, int bpp, int lane_count, argument
65 (bpp * burst_mode_ratio));
1021 unsigned int bpp, fmt; local
1041 bpp = mipi_dsi_pixel_format_to_bpp(
1072 hfp = pixels_from_txbyteclkhs(hfp, bpp, lane_count,
1074 hsync = pixels_from_txbyteclkhs(hsync, bpp, lane_count,
1076 hbp = pixels_from_txbyteclkhs(hbp, bpp, lane_count,
1125 hfp_sw = txbyteclkhs(hfp_sw, bpp, lane_coun
1220 unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
1312 unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
[all...]
H A Dintel_dp.h30 /* Uncompressed DSC input or link output bpp in 1 bpp units */
34 /* Compressed or uncompressed link output bpp in 1/16 bpp units */
117 int intel_dp_link_required(int pixel_clock, int bpp);
169 u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp);
187 int intel_dp_output_bpp(enum intel_output_format output_format, int bpp);
/linux-master/drivers/video/fbdev/geode/
H A Ddisplay_gx.c51 int gx_line_delta(int xres, int bpp) argument
54 return (xres * (bpp >> 3) + 7) & ~0x7;
/linux-master/drivers/staging/sm750fb/
H A Dsm750.h63 u32 base, u32 pitch, u32 bpp,
71 u32 bpp, u32 dx, u32 dy,
/linux-master/drivers/video/fbdev/aty/
H A Dmach64_ct.c19 static int aty_dsp_gt (const struct fb_info *info, u32 bpp, struct pll_ct *pll);
20 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll);
118 static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll) argument
131 if (bpp>=8)
132 divider = divider * (bpp >> 2);
136 if (bpp == 0)
174 /* if (bpp == 0)
249 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
256 if (M64_HAS(GTB_DSP) && (err = aty_dsp_gt(info, bpp, &pll->ct)))
H A Dmach64_gx.c81 const union aty_pll *pll, u32 bpp, u32 accel)
92 0, 0x41, 0x03, 0x71, 0x45}, /* 8 bpp */
100 switch (bpp) {
124 u32 bpp, union aty_pll *pll)
206 const union aty_pll *pll, u32 bpp,
215 switch (bpp) {
289 const union aty_pll *pll, u32 bpp,
299 switch (bpp) {
342 u32 bpp, union aty_pll *pll)
496 u32 bpp, unio
80 aty_set_dac_514(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
123 aty_var_to_pll_514(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
205 aty_set_dac_ATI68860_B(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
288 aty_set_dac_ATT21C498(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
341 aty_var_to_pll_18818(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
495 aty_var_to_pll_1703(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
611 aty_var_to_pll_8398(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
734 aty_var_to_pll_408(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
881 aty_set_dac_unsupported(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
[all...]
/linux-master/drivers/staging/media/tegra-video/
H A Dvi.h61 void (*vi_fmt_align)(struct v4l2_pix_format *pix, unsigned int bpp);
286 * @bpp: bytes per pixel (when stored in memory)
294 unsigned int bpp; member in struct:tegra_video_format
/linux-master/drivers/gpu/ipu-v3/
H A Dipu-image-convert.c131 int bpp; /* total bpp */ member in struct:ipu_image_pixfmt
254 .bpp = 16,
257 .bpp = 24,
260 .bpp = 24,
263 .bpp = 32,
266 .bpp = 32,
269 .bpp = 32,
272 .bpp = 32,
275 .bpp
1053 u32 bpp, stride, offset; local
[all...]
H A Dipu-cpmem.c370 int bpp = 0, npb = 0, ro, go, bo, to; local
396 bpp = 0;
400 bpp = 1;
404 bpp = 3;
408 bpp = 5;
414 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, bpp);
424 int bpp = 0, npb = 0; local
428 bpp = 0;
432 bpp = 1;
436 bpp
[all...]
/linux-master/drivers/gpu/drm/xen/
H A Dxen_drm_front.c123 u32 bpp, u64 fb_cookie)
144 req->op.set_config.bpp = bpp;
159 u32 bpp, u64 size, u32 offset,
201 req->op.dbuf_create.bpp = bpp;
417 args->pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
428 args->width, args->height, args->bpp,
121 xen_drm_front_mode_set(struct xen_drm_front_drm_pipeline *pipeline, u32 x, u32 y, u32 width, u32 height, u32 bpp, u64 fb_cookie) argument
157 xen_drm_front_dbuf_create(struct xen_drm_front_info *front_info, u64 dbuf_cookie, u32 width, u32 height, u32 bpp, u64 size, u32 offset, struct page **pages) argument
/linux-master/drivers/gpu/drm/tiny/
H A Dbochs.c87 u32 bpp; member in struct:bochs_device
329 bochs->bpp = 32;
330 bochs->stride = mode->hdisplay * (bochs->bpp / 8);
333 DRM_DEBUG_DRIVER("%dx%d @ %d bpp, vy %d\n",
334 bochs->xres, bochs->yres, bochs->bpp,
340 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP, bochs->bpp);
397 x * (bochs->bpp / 8);
399 vx = (offset % bochs->stride) * 8 / bochs->bpp;
400 vwidth = stride * 8 / bochs->bpp;
/linux-master/drivers/gpu/drm/vboxvideo/
H A Dvboxvideo_guest.h55 u16 bpp, u16 flags);
/linux-master/arch/arm/mach-sa1100/
H A Dh3600.c69 .pixclock = 174757, .bpp = 16,
/linux-master/drivers/media/platform/renesas/vsp1/
H A Dvsp1_pipe.h29 * @bpp: bits per pixel
42 unsigned int bpp[3]; member in struct:vsp1_format_info
/linux-master/drivers/media/platform/renesas/
H A Drenesas-ceu.c126 * @bpp: number of bits per pixels unit
134 u8 bpp; member in struct:ceu_mbus_fmt
219 * @bpp: number of bits for each pixel stored in memory
223 u32 bpp; member in struct:ceu_fmt
236 .bpp = 16,
240 .bpp = 16,
244 .bpp = 12,
248 .bpp = 12,
252 .bpp = 16,
256 .bpp
[all...]
/linux-master/drivers/gpu/drm/msm/dp/
H A Ddp_link.h87 * mdss_dp_test_bit_depth_to_bpp() - convert test bit depth to bpp
90 * Returns the bits per pixel (bpp) to be used corresponding to the
116 u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp);
/linux-master/arch/arm/mach-pxa/
H A Dam200epd.c49 .bpp = 16,
63 .bpp = 16,
77 .bpp = 16,
249 /* we divide since we told the LCD controller we're 16bpp */
/linux-master/arch/x86/boot/
H A Dvideo-vesa.c93 mi->depth = vminfo.bpp;
217 boot_params.screen_info.lfb_depth = vminfo.bpp;
226 if (vminfo.bpp <= 8)
/linux-master/drivers/gpu/drm/
H A Ddrm_gem_framebuffer_helper.c527 /* remove bpp when all users properly encode cpp in drm_format_info */
528 __u32 bpp; local
563 bpp = drm_gem_afbc_get_bpp(dev, mode_cmd);
564 if (!bpp) {
565 drm_dbg_kms(dev, "Invalid AFBC bpp value: %d\n", bpp);
572 afbc_fb->afbc_size += n_blocks * ALIGN(bpp * AFBC_SUPERBLOCK_PIXELS / 8,

Completed in 264 milliseconds

1234567891011>>