/linux-master/drivers/char/tpm/ |
H A D | tpm_infineon.c | 414 dev->name, dev_id->id); 440 dev->name, dev_id->id); 532 "vendor id 0x%x%x (Infineon), " 533 "product id 0x%02x%02x"
|
/linux-master/drivers/clk/actions/ |
H A D | owl-reset.c | 15 unsigned long id) 18 const struct owl_reset_map *map = &reset->reset_map[id]; 24 unsigned long id) 27 const struct owl_reset_map *map = &reset->reset_map[id]; 33 unsigned long id) 35 owl_reset_assert(rcdev, id); 37 owl_reset_deassert(rcdev, id); 43 unsigned long id) 46 const struct owl_reset_map *map = &reset->reset_map[id]; 14 owl_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) argument 23 owl_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) argument 32 owl_reset_reset(struct reset_controller_dev *rcdev, unsigned long id) argument 42 owl_reset_status(struct reset_controller_dev *rcdev, unsigned long id) argument
|
/linux-master/drivers/clk/ |
H A D | clk-max77686.c | 165 const struct platform_device_id *id = platform_get_device_id(pdev); local 181 drv_data->chip = id->driver_data;
|
/linux-master/drivers/clk/davinci/ |
H A D | psc-da830.c | 47 { .id = "pll0_sysclk2" }, 48 { .id = "pll0_sysclk3" }, 49 { .id = "pll0_sysclk4" }, 50 { .id = "pll0_sysclk6" }, 109 { .id = "pll0_sysclk2" }, 110 { .id = "pll0_sysclk4" }, 111 { .id = "pll0_sysclk5" },
|
H A D | psc-da850.c | 86 { .id = "pll0_sysclk1" }, 87 { .id = "pll0_sysclk2" }, 88 { .id = "pll0_sysclk4" }, 89 { .id = "pll0_sysclk6" }, 90 { .id = "async1" }, 140 { .id = "pll0_sysclk2" }, 141 { .id = "pll0_sysclk4" }, 142 { .id = "async3" },
|
/linux-master/drivers/clk/hisilicon/ |
H A D | clk-hi3660-stub.c | 29 .id = (_id), \ 47 unsigned int id; member in struct:hi3660_stub_clk 66 stub_clk->rate = readl(freq_reg + (stub_clk->id << 2)) * MHZ;
|
H A D | clk-hix5hd2.c | 135 u32 id; member in struct:hix5hd2_complex_clock 147 u32 id; member in struct:hix5hd2_clk_complex 295 data->clk_data.clks[clks[i].id] = clk;
|
/linux-master/drivers/clk/mmp/ |
H A D | reset.c | 35 unsigned long id) 42 cell = &unit->cells[id]; 57 unsigned long id) 64 cell = &unit->cells[id]; 34 mmp_clk_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) argument 56 mmp_clk_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) argument
|
/linux-master/drivers/clk/mvebu/ |
H A D | armada-370.c | 35 { .id = A370_CPU_TO_NBCLK, .name = "nbclk" }, 36 { .id = A370_CPU_TO_HCLK, .name = "hclk" }, 37 { .id = A370_CPU_TO_DRAMCLK, .name = "dramclk" }, 114 void __iomem *sar, int id, int *mult, int *div) 119 switch (id) { 113 a370_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
|
H A D | armada-375.c | 88 { .id = A375_CPU_TO_L2, .name = "l2clk" }, 89 { .id = A375_CPU_TO_DDR, .name = "ddrclk" }, 115 void __iomem *sar, int id, int *mult, int *div) 120 switch (id) { 114 armada_375_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
|
H A D | armada-38x.c | 72 { .id = A380_CPU_TO_L2, .name = "l2clk" }, 73 { .id = A380_CPU_TO_DDR, .name = "ddrclk" }, 99 void __iomem *sar, int id, int *mult, int *div) 104 switch (id) { 98 armada_38x_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
|
H A D | armada-39x.c | 86 { .id = A390_CPU_TO_NBCLK, .name = "nbclk" }, 87 { .id = A390_CPU_TO_HCLK, .name = "hclk" }, 88 { .id = A390_CPU_TO_DCLK, .name = "dclk" }, 92 void __iomem *sar, int id, int *mult, int *div) 94 switch (id) { 91 armada_39x_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
|
H A D | common.c | 162 desc->get_clk_ratio(base, desc->ratios[n].id, &mult, &div);
|
H A D | common.h | 23 int id; member in struct:coreclk_ratio 30 void (*get_clk_ratio)(void __iomem *sar, int id, int *mult, int *div);
|
H A D | dove.c | 77 { .id = DOVE_CPU_TO_L2, .name = "l2clk", }, 78 { .id = DOVE_CPU_TO_DDR, .name = "ddrclk", } 126 void __iomem *sar, int id, int *mult, int *div) 128 switch (id) { 125 dove_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
|
H A D | mv98dx3236.c | 93 { .id = MV98DX3236_CPU_TO_DDR, .name = "ddrclk" }, 94 { .id = MV98DX3236_CPU_TO_MPLL, .name = "mpll" }, 118 void __iomem *sar, int id, int *mult, int *div) 123 switch (id) { 117 mv98dx3236_get_clk_ratio( void __iomem *sar, int id, int *mult, int *div) argument
|
H A D | orion.c | 18 { .id = 0, .name = "ddrclk", } 59 static void __init mv88f5181_get_clk_ratio(void __iomem *sar, int id, argument 127 static void __init mv88f5182_get_clk_ratio(void __iomem *sar, int id, argument 184 static void __init mv88f5281_get_clk_ratio(void __iomem *sar, int id, argument 250 static void __init mv88f6183_get_clk_ratio(void __iomem *sar, int id, argument
|
/linux-master/drivers/clk/nxp/ |
H A D | clk-lpc32xx.c | 1382 static struct clk * __init lpc32xx_clk_register(u32 id) argument 1384 const struct clk_proto_t *lpc32xx_clk = &clk_proto[id]; 1385 struct clk_hw_proto *clk_hw = &clk_hw_proto[id];
|
/linux-master/drivers/clk/pistachio/ |
H A D | clk-pll.c | 508 p->clk_data.clks[pll[i].id] = clk;
|
H A D | clk.c | 69 p->clk_data.clks[gate[i].id] = clk; 87 p->clk_data.clks[mux[i].id] = clk; 103 p->clk_data.clks[div[i].id] = clk; 117 p->clk_data.clks[ff[i].id] = clk;
|
/linux-master/drivers/clk/sunxi/ |
H A D | clk-sun4i-display.c | 47 unsigned long id) 56 writel(reg & ~BIT(data->offset + id), data->reg); 64 unsigned long id) 73 writel(reg | BIT(data->offset + id), data->reg); 81 unsigned long id) 85 return !(readl(data->reg) & BIT(data->offset + id)); 46 sun4i_a10_display_assert(struct reset_controller_dev *rcdev, unsigned long id) argument 63 sun4i_a10_display_deassert(struct reset_controller_dev *rcdev, unsigned long id) argument 80 sun4i_a10_display_status(struct reset_controller_dev *rcdev, unsigned long id) argument
|
/linux-master/drivers/crypto/cavium/cpt/ |
H A D | cptpf.h | 38 u8 id; member in struct:cpt_vf_info
|
/linux-master/drivers/crypto/ccp/ |
H A D | ccp-debugfs.c | 308 snprintf(name, MAX_NAME_LEN - 1, "q%d", cmd_q->id);
|
/linux-master/drivers/dio/ |
H A D | dio-sysfs.c | 25 return sprintf(buf, "0x%02x\n", (d->id & 0xff)); 27 static DEVICE_ATTR(id, S_IRUGO, dio_show_id, NULL); 43 return sprintf(buf, "0x%02x\n", ((d->id >> 8)& 0xff));
|
/linux-master/drivers/edac/ |
H A D | ppc4xx_edac.h | 86 #define SDRAM_WMIRQ_ENCODE(id) PPC_REG_VAL((id % \
|