/u-boot/arch/x86/cpu/tangier/ |
H A D | sdram.c | 109 unsigned long long start, end, size; local 118 start = mentry->phys_start; 120 end = start + size; 122 if (start > end) 139 entries[total].addr = start; 164 gd->bd->bi_dram[bank].start = mentry->phys_start; 220 unsigned long long start, end; local 225 start = mentry->phys_start; 226 end = start + (mentry->pages << 12); 232 if (end - start < total_siz [all...] |
/u-boot/common/ |
H A D | flash.c | 39 b_end = info->start[0] + info->size - 1; /* bank end address */ 50 to < info->start[0] || from > b_end) { 57 end = (i == s_end) ? b_end : info->start[i + 1] - 1; 62 if (from <= end && to >= info->start[i]) { 94 addr >= info->start[0] && 97 * info->start[0] + info->size wraps back to 0. 100 addr <= info->start[0] + info->size - 1) { 142 ulong b_end = info->start[0] + info->size; /* bank end addr */ 145 ulong e_addr = (i == s_end) ? b_end : info->start[i + 1]; 147 if ((end >= info->start[ [all...] |
H A D | memsize.c | 34 uintptr_t start, stop; local 35 start = ALIGN_DOWN((uintptr_t)p, MEMSIZE_CACHELINE_SIZE); 36 stop = start + MEMSIZE_CACHELINE_SIZE; 37 flush_dcache_range(start, stop); 38 invalidate_dcache_range(start, stop);
|
/u-boot/board/nuvoton/arbel_evb/ |
H A D | arbel_evb.c | 64 gd->bd->bi_dram[0].start = 0; 74 gd->bd->bi_dram[1].start = 0; 79 gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; 85 gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; 90 gd->bd->bi_dram[1].start = 0;
|
/u-boot/arch/arm/lib/ |
H A D | cache-cp15.c | 52 __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) argument 57 void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, argument 68 /* div by 2 before start + size to avoid phys_addr_t overflow */ 69 end = ALIGN((start / 2) + (size / 2), MMU_SECTION_SIZE / 2) 71 start = start >> MMU_SECTION_SHIFT; 74 debug("%s: start=%pa, size=%zu, option=%llx\n", __func__, &start, size, 77 debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, siz 309 mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, enum dcache_option option) argument 330 mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, enum dcache_option option) argument [all...] |
/u-boot/fs/cbfs/ |
H A D | cbfs.c | 12 /* Offset of master header from the start of a coreboot ROM */ 22 * @start: Start position of CBFS in memory, typically memory-mapped SPI flash 29 void *start; member in struct:cbfs_priv 86 * @start: Pointer to the start of the CBFS file in memory 90 static int fill_node(struct cbfs_cachenode *node, void *start, argument 102 node->data = start + header->offset; 105 node->name = start + sizeof(struct cbfs_fileheader); 115 attr = start + offset; 121 comp = start 148 file_cbfs_next_file(struct cbfs_priv *priv, void *start, int size, int align, struct cbfs_cachenode *node, int *used) argument 191 void *start; local 434 find_uncached(struct cbfs_priv *priv, const char *name, void *start, struct cbfs_cachenode *node) argument 465 void *start; local [all...] |
/u-boot/arch/x86/cpu/intel_common/ |
H A D | mrc.c | 43 if (area->start >= 1ULL << 32) 54 dest_addr = largest->start + largest->size; 68 if (area->start >= 1ULL << 32) 70 gd->bd->bi_dram[num_banks].start = area->start; 76 int mrc_add_memory_area(struct memory_info *info, uint64_t start, argument 85 ptr->start = start; 86 ptr->size = end - start; 88 if (ptr->start < ( 207 ulong start; local [all...] |
/u-boot/drivers/video/ |
H A D | console_rotate.c | 23 void *start, *dst, *line; local 27 start = vid_priv->fb + vid_priv->line_length - 29 line = start; 36 ret = vidconsole_sync_copy(dev, start, line); 80 void *start, *line; local 89 start = vid_priv->fb + linenum * vid_priv->line_length - x * pbytes; 90 line = start; 96 /* We draw backwards from 'start, so account for the first line */ 97 ret = vidconsole_sync_copy(dev, start - vid_priv->line_length, line); 110 void *start, *lin local 159 void *start, *line; local 189 void *start, *dst, *line; local 242 void *start, *line; local [all...] |
/u-boot/common/spl/ |
H A D | spl_legacy.c | 20 static void spl_parse_legacy_validate(uintptr_t start, uintptr_t size) argument 24 uintptr_t end = start + size; 26 if ((start >= spl_start && start < spl_end) || 28 (start < spl_start && end >= spl_end) || 29 (start > end && end > spl_start))
|
/u-boot/drivers/dfu/ |
H A D | dfu_nand.c | 25 loff_t start, lim; local 36 start = dfu->data.nand.start + offset + dfu->bad_skip; 37 lim = dfu->data.nand.start + dfu->data.nand.size - start; 50 ret = nand_read_skip_bad(mtd, start, &count, &actual, 57 opts.offset = start; 71 ret = nand_write_skip_bad(mtd, start, &count, &actual, 78 start); 173 opts.offset = dfu->data.nand.start [all...] |
/u-boot/tools/patman/ |
H A D | control.py | 25 def prepare_patches(col, branch, count, start, end, ignore_binary, signoff, 37 start (int): Start partch to use (0=first / top of branch) 52 count = (gitutil.count_commits_to_branch(branch) - start) 61 series = patchstream.get_metadata(branch, start, to_do) 63 branch, start, to_do, ignore_binary, series, signoff) 173 col, args.branch, args.count, args.start, args.end, 188 def patchwork_status(branch, count, start, end, dest_branch, force, 200 start (int): Start partch to use (0=first / top of branch) 216 count = (gitutil.count_commits_to_branch(branch) - start) 218 series = patchstream.get_metadata(branch, start, coun [all...] |
/u-boot/arch/arm/mach-mvebu/armada8k/ |
H A D | dram.c | 41 gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; 49 gd->bd->bi_dram[1].start = SZ_4G;
|
/u-boot/arch/arm/mach-omap2/omap3/ |
H A D | am35x_musb.c | 28 unsigned long start = get_timer(0); local 42 if (get_timer(start) > CONFIG_SYS_HZ / 10) {
|
/u-boot/arch/arm/mach-orion5x/ |
H A D | dram.c | 51 gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); 53 (long *) (gd->bd->bi_dram[i].start),
|
/u-boot/board/ti/ks2_evm/ |
H A D | board.c | 104 u64 start[2]; local 118 start[0] = bd->bi_dram[0].start; 121 /* adjust memory start address for LPAE */ 123 start[0] -= CFG_SYS_SDRAM_BASE; 124 start[0] += CFG_SYS_LPAE_SDRAM_BASE; 129 start[1] = 0x880000000; 133 /* reserve memory at start of bank */ 136 start[0] += ustrtoul(env, &endp, 0); 144 fdt_fixup_memory_banks(blob, start, siz [all...] |
/u-boot/drivers/clk/ti/ |
H A D | clk-ctrl.c | 15 fdt_addr_t start; member in struct:clk_ti_ctrl_offs 30 if (offs >= priv->offs[i].start && offs <= priv->offs[i].end) 44 offs = priv->offs[0].start + clk->id; 64 offs = priv->offs[0].start + clk->id; 120 priv->offs[i].start = 122 if (priv->offs[i].start == FDT_ADDR_T_NONE) { 127 priv->offs[i].end = priv->offs[i].start + fdt_size; 128 dev_dbg(dev, "start=0x%016llx, end=0x%016llx\n", 129 (fdt64_t)priv->offs[i].start,
|
/u-boot/arch/arm/mach-at91/ |
H A D | phy.c | 25 unsigned long start = get_timer(0); local 49 if (get_timer(start) >= timeout) {
|
/u-boot/board/armltd/total_compute/ |
H A D | total_compute.c | 59 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 62 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
|
/u-boot/cmd/ |
H A D | sleep.c | 15 ulong start = get_timer(0); local 41 while (get_timer(start) < delay) {
|
/u-boot/test/dm/ |
H A D | fdtdec.c | 29 resv.start = 0x1000; 34 resv.start = 0x10000; 39 resv.start = 0x100000; 79 resv.start = 0x1000; 93 ut_assert(addr == resv.start); 94 ut_assert(size == resv.end - resv.start + 1); 100 resv.start = 0x2000; 117 resv.start = 0x1000;
|
H A D | part.c | 37 .start = 48, /* GPT data takes up the first 34 blocks or so */ 42 .start = 49, 127 ut_asserteq(reference->start, p.start); 140 .start = 48, /* GPT data takes up the first 34 blocks or so */ 146 .start = 49, 154 .start = 1, 160 .start = 48,
|
/u-boot/include/ |
H A D | keyboard.h | 28 * start() - enable the keyboard ready for use 33 int (*start)(struct udevice *dev); member in struct:keyboard_ops
|
/u-boot/arch/x86/cpu/ |
H A D | start64.S | 11 .section .text.start
|
/u-boot/arch/arm/mach-mediatek/mt8365/ |
H A D | init.c | 23 gd->bd->bi_dram[0].start = gd->ram_base;
|
/u-boot/board/ti/am62x/ |
H A D | evm.c | 101 u64 start[CONFIG_NR_DRAM_BANKS]; local 110 start[bank] = gd->bd->bi_dram[bank].start; 115 ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size,
|