1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Board specific initialization for AM62x platforms 4 * 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 6 * Suman Anna <s-anna@ti.com> 7 * 8 */ 9 10#include <env.h> 11#include <spl.h> 12#include <init.h> 13#include <video.h> 14#include <splash.h> 15#include <cpu_func.h> 16#include <k3-ddrss.h> 17#include <fdt_support.h> 18#include <asm/io.h> 19#include <asm/arch/hardware.h> 20#include <dm/uclass.h> 21 22#include "../common/fdt_ops.h" 23 24DECLARE_GLOBAL_DATA_PTR; 25 26#if CONFIG_IS_ENABLED(SPLASH_SCREEN) 27static struct splash_location default_splash_locations[] = { 28 { 29 .name = "sf", 30 .storage = SPLASH_STORAGE_SF, 31 .flags = SPLASH_STORAGE_RAW, 32 .offset = 0x700000, 33 }, 34 { 35 .name = "mmc", 36 .storage = SPLASH_STORAGE_MMC, 37 .flags = SPLASH_STORAGE_FS, 38 .devpart = "1:1", 39 }, 40}; 41 42int splash_screen_prepare(void) 43{ 44 return splash_source_load(default_splash_locations, 45 ARRAY_SIZE(default_splash_locations)); 46} 47#endif 48 49int board_init(void) 50{ 51 return 0; 52} 53 54int dram_init(void) 55{ 56 return fdtdec_setup_mem_size_base(); 57} 58 59#ifdef CONFIG_BOARD_LATE_INIT 60int board_late_init(void) 61{ 62 ti_set_fdt_env(NULL, NULL); 63 return 0; 64} 65#endif 66 67int dram_init_banksize(void) 68{ 69 return fdtdec_setup_memory_banksize(); 70} 71 72#if defined(CONFIG_SPL_BUILD) 73 74void spl_board_init(void) 75{ 76 enable_caches(); 77 if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_BMP)) 78 splash_display(); 79 80} 81 82#if defined(CONFIG_K3_AM64_DDRSS) 83static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image) 84{ 85 struct udevice *dev; 86 int ret; 87 88 dram_init_banksize(); 89 90 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 91 if (ret) 92 panic("Cannot get RAM device for ddr size fixup: %d\n", ret); 93 94 ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd); 95 if (ret) 96 printf("Error fixing up ddr node for ECC use! %d\n", ret); 97} 98#else 99static void fixup_memory_node(struct spl_image_info *spl_image) 100{ 101 u64 start[CONFIG_NR_DRAM_BANKS]; 102 u64 size[CONFIG_NR_DRAM_BANKS]; 103 int bank; 104 int ret; 105 106 dram_init(); 107 dram_init_banksize(); 108 109 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 110 start[bank] = gd->bd->bi_dram[bank].start; 111 size[bank] = gd->bd->bi_dram[bank].size; 112 } 113 114 /* dram_init functions use SPL fdt, and we must fixup u-boot fdt */ 115 ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, 116 CONFIG_NR_DRAM_BANKS); 117 if (ret) 118 printf("Error fixing up memory node! %d\n", ret); 119} 120#endif 121 122void spl_perform_fixups(struct spl_image_info *spl_image) 123{ 124#if defined(CONFIG_K3_AM64_DDRSS) 125 fixup_ddr_driver_for_ecc(spl_image); 126#else 127 fixup_memory_node(spl_image); 128#endif 129} 130#endif 131