Searched refs:offset (Results 276 - 300 of 1155) sorted by relevance

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/u-boot/drivers/gpio/
H A Dsh_pfc.c73 unsigned long offset,
81 dr->reg + offset, pos, dr->reg_width);
83 return (gpio_read_raw_reg(dr->mapped_reg + offset,
446 static int sh_gpio_request(unsigned offset) argument
456 if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
461 if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
467 if (pinmux_config_gpio(gpioc, offset,
472 if (pinmux_config_gpio(gpioc, offset,
478 gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
479 gpioc->gpios[offset]
72 gpio_read_bit(struct pinmux_data_reg *dr, unsigned long offset, unsigned long in_pos) argument
486 sh_gpio_free(unsigned offset) argument
541 sh_gpio_direction_input(unsigned offset) argument
558 sh_gpio_direction_output(unsigned offset, int value) argument
567 int bit = 0, offset = 0; local
579 sh_gpio_get(unsigned offset) argument
584 sh_gpio_set(unsigned offset, int value) argument
[all...]
H A Dpca953x_gpio.c108 int offset)
112 int off = offset / BANK_SZ;
125 int offset)
129 int off = offset / BANK_SZ;
192 static int pca953x_is_output(struct udevice *dev, int offset) argument
196 int bank = offset / BANK_SZ;
197 int off = offset % BANK_SZ;
203 static int pca953x_get_value(struct udevice *dev, uint offset) argument
209 int off = offset % BANK_SZ;
211 ret = pca953x_read_single(dev, info->regs->input, &val, offset);
107 pca953x_write_single(struct udevice *dev, int reg, u8 val, int offset) argument
124 pca953x_read_single(struct udevice *dev, int reg, u8 *val, int offset) argument
218 pca953x_set_value(struct udevice *dev, uint offset, int value) argument
240 pca953x_set_direction(struct udevice *dev, uint offset, int dir) argument
262 pca953x_direction_input(struct udevice *dev, uint offset) argument
267 pca953x_direction_output(struct udevice *dev, uint offset, int value) argument
278 pca953x_get_function(struct udevice *dev, uint offset) argument
[all...]
H A Dgpio-rza1.c39 static int r7s72100_gpio_get_value(struct udevice *dev, unsigned offset) argument
43 return !!(readw(priv->regs + PPR(priv->bank)) & BIT(offset));
70 static int r7s72100_gpio_direction_input(struct udevice *dev, unsigned offset) argument
72 r7s72100_gpio_set_direction(dev, offset, false);
76 static int r7s72100_gpio_direction_output(struct udevice *dev, unsigned offset, argument
80 r7s72100_gpio_set_value(dev, offset, value);
81 r7s72100_gpio_set_direction(dev, offset, true);
86 static int r7s72100_gpio_get_function(struct udevice *dev, unsigned offset) argument
90 if (readw(priv->regs + PM(priv->bank)) & BIT(offset))
/u-boot/drivers/dfu/
H A Ddfu_nand.c23 u64 offset, void *buf, long *len)
36 start = dfu->data.nand.start + offset + dfu->bad_skip;
57 opts.offset = start;
94 u64 offset, void *buf, long *len)
96 return nand_block_op(DFU_OP_WRITE, dfu, offset, buf, len);
100 u64 offset, void *buf, long *len)
102 return nand_block_op(DFU_OP_READ, dfu, offset, buf, len);
106 u64 offset, void *buf, long *len)
112 ret = nand_block_write(dfu, offset, buf, len);
129 static int dfu_read_medium_nand(struct dfu_entity *dfu, u64 offset, voi argument
22 nand_block_op(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
93 nand_block_write(struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
99 nand_block_read(struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
105 dfu_write_medium_nand(struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
[all...]
H A Ddfu_mmc.c27 u64 offset, void *buf, long *len)
46 (u32)lldiv(offset, dfu->data.mmc.lba_blk_size);
99 u64 offset, void *buf, u64 *len)
132 ret = fs_read(dfu->name, (size_t)buf, offset, *len, &size);
140 ret = fs_write(dfu->name, (size_t)buf, offset, *len, &size);
161 static int mmc_file_buf_write(struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
165 if (offset == 0) {
199 u64 offset, void *buf, long *len)
205 ret = mmc_block_op(DFU_OP_WRITE, dfu, offset, buf, len);
209 ret = mmc_file_buf_write(dfu, offset, bu
26 mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
98 mmc_file_op(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void *buf, u64 *len) argument
198 dfu_write_medium_mmc(struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
274 mmc_file_buf_read(struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
299 dfu_read_medium_mmc(struct dfu_entity *dfu, u64 offset, void *buf, long *len) argument
417 int offset = 0; local
[all...]
/u-boot/drivers/iommu/
H A Dqcom-hyp-smmu.c112 #define smmu_readl(priv, page, offset) readl(page_addr(priv, page) + offset)
113 #define gr0_readl(priv, offset) smmu_readl(priv, ARM_SMMU_GR0, offset)
114 #define gr1_readl(priv, offset) smmu_readl(priv, ARM_SMMU_GR1, offset)
115 #define cbx_readl(priv, cbx, offset) \
116 smmu_readl(priv, (priv->cb_pg_offset) + cbx, offset)
118 #define smmu_writel(priv, page, offset, value) \
119 writel((value), page_addr(priv, page) + offset)
[all...]
/u-boot/arch/mips/mach-octeon/include/mach/
H A Dcvmx-sso-defs.h13 #define CVMX_SSO_ACTIVE_CYCLESX(offset) (0x0001670000001100ull + ((offset) & 3) * 8)
39 #define CVMX_SSO_GRPX_AQ_CNT(offset) (0x0001670020000700ull + ((offset) & 255) * 0x10000ull)
40 #define CVMX_SSO_GRPX_AQ_THR(offset) (0x0001670020000800ull + ((offset) & 255) * 0x10000ull)
41 #define CVMX_SSO_GRPX_DS_PC(offset) (0x0001670020001400ull + ((offset) & 255) * 0x10000ull)
42 #define CVMX_SSO_GRPX_EXT_PC(offset) (0x0001670020001100ull + ((offset)
[all...]
/u-boot/drivers/pinctrl/
H A Dpinctrl-single.c22 * @offset: index of last configuration register
29 int offset; member in struct:single_pdata
52 * @offset: offset base of pins
58 u32 offset; member in struct:single_gpiofunc_range
89 * @reg: configuration register offset
152 * single_get_pin_by_offset() - get a pin based on the register offset
154 * @offset: register offset from the base
156 static int single_get_pin_by_offset(struct udevice *dev, unsigned int offset) argument
222 int offset, pin_shift = 0; local
329 u32 offset, val, mux; local
387 u32 offset, val, mask, bit_pos, val_pos, mask_pos, submask; local
[all...]
/u-boot/drivers/mmc/
H A Dfsl_esdhc_spl.c76 u32 offset, code_len; local
100 offset = CFG_SYS_MMC_U_BOOT_OFFS;
151 offset = 0;
154 offset = (offset << 8) + val;
157 offset += (ulong)&mmc_u_boot_offs - CONFIG_SPL_TEXT_BASE;
159 offset += CFG_SYS_MMC_U_BOOT_OFFS;
166 blk_start = offset / mmc->read_bl_len;
167 blk_off = offset % mmc->read_bl_len;
/u-boot/arch/x86/lib/
H A Dpinctrl_ich6.c33 static int ich6_pinctrl_set_value(uint16_t base, unsigned offset, int value) argument
36 setio_32(base, 1UL << offset);
38 clrio_32(base, 1UL << offset);
43 static int ich6_pinctrl_set_function(uint16_t base, unsigned offset, int func) argument
46 setio_32(base, 1UL << offset);
48 clrio_32(base, 1UL << offset);
53 static int ich6_pinctrl_set_direction(uint16_t base, unsigned offset, int dir) argument
56 setio_32(base, 1UL << offset);
58 clrio_32(base, 1UL << offset);
75 ret = fdtdec_get_int_array(gd->fdt_blob, pin_node, "gpio-offset",
[all...]
H A Dmrccache.c56 base_addr = entry->base + entry->offset;
106 base_addr = entry->base + entry->offset;
142 ulong offset; local
152 base_addr = entry->base + entry->offset;
171 entry->length, entry->offset);
173 ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
182 offset = (ulong)cache - base_addr + entry->offset;
183 debug("Write MRC cache update to flash at %lx\n", offset);
184 ret = spi_flash_write_dm(sf, offset, cu
238 uint offset; local
[all...]
/u-boot/cmd/
H A Dcramfs.c102 ulong offset = image_load_addr; local
119 /* fake the address offset */
120 part.offset = (u64)(uintptr_t) map_sysmem(addr - OFFSET_ADJUSTMENT, 0);
131 offset = simple_strtoul(argv[1], NULL, 0);
132 image_load_addr = offset;
136 offset_virt = map_sysmem(offset, 0);
143 size, offset);
150 unmap_sysmem((void *)(uintptr_t)part.offset);
184 /* fake the address offset */
185 part.offset
[all...]
H A Dclone.c81 unsigned long offset = 0; local
84 ret = blk_dread(srcdesc, srcblk, toread, buf + offset);
93 offset += ret * srcbz;
96 offset = 0;
98 ret = blk_dwrite(destdesc, destblk, towrite, buf + offset);
107 offset += ret * destbz;
H A Dseama.c64 u32 *offset; local
95 offset = 0;
142 offset = (u32 *)tmp;
147 (u32)offset, (u32)end, (u32)start);
148 for (; start < end; start++, offset++)
149 *start = be32_to_cpu(*offset);
/u-boot/cmd/meson/
H A Dsm.c85 ulong address, offset, size; local
91 offset = simple_strtoul(argv[1], NULL, 0);
96 ret = meson_sm_read_efuse(offset, (void *)address, size);
106 ulong address, offset, size; local
112 offset = simple_strtoul(argv[1], NULL, 0);
117 ret = meson_sm_write_efuse(offset, (void *)address, size);
127 ulong offset, size; local
134 offset = simple_strtoul(argv[1], NULL, 0);
142 ret = meson_sm_read_efuse(offset, (void *)buffer, size);
188 "sm efuseread <offset> <siz
[all...]
/u-boot/common/
H A Diotrace.c24 * @offset: Current write offset into iotrace buffer
34 ulong offset; member in struct:iotrace
60 if (iotrace.offset + sizeof(*rec) < iotrace.size) {
62 iotrace.start + iotrace.offset,
80 iotrace.offset += sizeof(struct iotrace_record);
173 iotrace.offset = 0;
177 void iotrace_get_buffer(ulong *start, ulong *size, ulong *needed_size, ulong *offset, ulong *count) argument
182 *offset = iotrace.offset;
[all...]
/u-boot/arch/microblaze/include/asm/
H A Dbitops.h215 static inline int find_next_zero_bit(void *addr, int size, int offset) argument
217 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
218 unsigned long result = offset & ~31UL;
221 if (offset >= size)
224 offset &= 31UL;
225 if (offset) {
227 tmp |= ~0UL >> (32-offset);
305 unsigned long size, unsigned long offset)
307 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
308 unsigned long result = offset
304 ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) argument
[all...]
/u-boot/arch/powerpc/include/asm/
H A Dbitops.h238 unsigned long size, unsigned long offset)
240 unsigned int * p = ((unsigned int *) addr) + (offset >> 5);
241 unsigned int result = offset & ~31UL;
244 if (offset >= size)
247 offset &= 31UL;
248 if (offset) {
250 tmp |= ~0UL >> (32-offset);
328 unsigned long size, unsigned long offset)
330 unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
331 unsigned int result = offset
237 find_next_zero_bit(void * addr, unsigned long size, unsigned long offset) argument
327 ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) argument
[all...]
/u-boot/drivers/pci/
H A Dpci_mpc85xx.c19 uint offset, ulong *value,
25 if (offset > 0xff) {
32 (offset & ~3) >= PCI_BASE_ADDRESS_0 && (offset & ~3) <= PCI_BASE_ADDRESS_5) {
37 addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset);
43 *value = in_8(priv->cfg_data + (offset & 3));
46 *value = in_le16(priv->cfg_data + (offset & 2));
57 uint offset, ulong value,
63 if (offset > 0xff)
68 (offset
18 mpc85xx_pci_dm_read_config(const struct udevice *dev, pci_dev_t bdf, uint offset, ulong *value, enum pci_size_t size) argument
56 mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument
[all...]
H A Dpci-rcar-gen2.c92 static int rcar_gen2_pci_addr_valid(pci_dev_t d, uint offset) argument
105 if (slot == 0x0 && offset >= 0x40)
111 static u32 get_bus_address(const struct udevice *dev, pci_dev_t bdf, u32 offset) argument
115 return priv->cfg_base + (PCI_DEV(bdf) >> 1) * 0x100 + (offset & ~3);
118 static u32 setup_bus_address(struct udevice *dev, pci_dev_t bdf, u32 offset) argument
127 return get_bus_address(dev, bdf, offset);
131 uint offset, ulong *value,
137 ret = rcar_gen2_pci_addr_valid(bdf, offset);
143 addr = get_bus_address(dev, bdf, offset);
145 *value = pci_conv_32_to_size(reg, offset, siz
130 rcar_gen2_pci_read_config(const struct udevice *dev, pci_dev_t bdf, uint offset, ulong *value, enum pci_size_t size) argument
150 rcar_gen2_pci_write_config(struct udevice *dev, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument
[all...]
H A Dpcie_xilinx.c49 * @offset: The offset into the device's configuration space
62 uint offset, void **paddress)
81 addr += PCIE_ECAM_OFFSET(bus, dev, func, offset);
91 * @offset: The offset into the device's configuration space
95 * Read a value of size @size from offset @offset within the configuration
102 uint offset, ulong *valuep,
106 bdf, offset, value
61 pcie_xilinx_config_address(const struct udevice *udev, pci_dev_t bdf, uint offset, void **paddress) argument
101 pcie_xilinx_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument
123 pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument
[all...]
H A Dpcie_phytium.c68 * @offset: The offset into the device's configuration space
79 uint offset, void **paddress)
101 addr += offset;
111 * @offset: The offset into the device's configuration space
115 * Read a value of size @size from offset @offset within the configuration
120 uint offset, ulong *valuep,
124 bdf, offset, value
78 pci_phytium_conf_address(const struct udevice *bus, pci_dev_t bdf, uint offset, void **paddress) argument
119 pci_phytium_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size) argument
139 pci_phytium_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size) argument
[all...]
/u-boot/drivers/clk/at91/
H A Dclk-peripheral.c53 int offset = AT91_PMC_PCER; local
59 offset = AT91_PMC_PCER1;
60 pmc_write(periph->base, offset, PERIPHERAL_MASK(id));
68 int offset = AT91_PMC_PCDR; local
75 offset = AT91_PMC_PCDR1;
76 pmc_write(periph->base, offset, PERIPHERAL_MASK(id));
130 pmc_write(periph->base, periph->layout->offset,
132 pmc_update_bits(periph->base, periph->layout->offset,
146 pmc_write(periph->base, periph->layout->offset,
148 pmc_update_bits(periph->base, periph->layout->offset,
[all...]
/u-boot/drivers/virtio/
H A Dvirtio_pci_modern.c111 static int virtio_pci_get_config(struct udevice *udev, unsigned int offset, argument
122 if (offset + len > priv->device_len)
127 b = ioread8(priv->device + offset);
131 w = cpu_to_le16(ioread16(priv->device + offset));
135 l = cpu_to_le32(ioread32(priv->device + offset));
139 l = cpu_to_le32(ioread32(priv->device + offset));
141 l = cpu_to_le32(ioread32(priv->device + offset + sizeof(l)));
151 static int virtio_pci_set_config(struct udevice *udev, unsigned int offset, argument
162 if (offset + len > priv->device_len)
168 iowrite8(b, priv->device + offset);
410 int offset; local
496 int offset; local
[all...]
/u-boot/fs/squashfs/
H A Dsqfs_inode.c114 unsigned int offset = 0, k; local
123 base = inode_table + offset;
125 return inode_table + offset;
131 offset += sz;
139 int sqfs_read_metablock(unsigned char *file_mapping, int offset, argument
147 data = file_mapping + offset;

Completed in 195 milliseconds

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