1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
4 */
5
6#include <common.h>
7#include <clk.h>
8#include <dm.h>
9#include <errno.h>
10#include <asm/global_data.h>
11#include <asm/gpio.h>
12#include <asm/io.h>
13#include <linux/bitops.h>
14
15#define P(bank)			(0x0000 + (bank) * 4)
16#define PSR(bank)		(0x0100 + (bank) * 4)
17#define PPR(bank)		(0x0200 + (bank) * 4)
18#define PM(bank)		(0x0300 + (bank) * 4)
19#define PMC(bank)		(0x0400 + (bank) * 4)
20#define PFC(bank)		(0x0500 + (bank) * 4)
21#define PFCE(bank)		(0x0600 + (bank) * 4)
22#define PNOT(bank)		(0x0700 + (bank) * 4)
23#define PMSR(bank)		(0x0800 + (bank) * 4)
24#define PMCSR(bank)		(0x0900 + (bank) * 4)
25#define PFCAE(bank)		(0x0A00 + (bank) * 4)
26#define PIBC(bank)		(0x4000 + (bank) * 4)
27#define PBDC(bank)		(0x4100 + (bank) * 4)
28#define PIPC(bank)		(0x4200 + (bank) * 4)
29
30#define RZA1_MAX_GPIO_PER_BANK	16
31
32DECLARE_GLOBAL_DATA_PTR;
33
34struct r7s72100_gpio_priv {
35	void __iomem		*regs;
36	int			bank;
37};
38
39static int r7s72100_gpio_get_value(struct udevice *dev, unsigned offset)
40{
41	struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
42
43	return !!(readw(priv->regs + PPR(priv->bank)) & BIT(offset));
44}
45
46static int r7s72100_gpio_set_value(struct udevice *dev, unsigned line,
47			       int value)
48{
49	struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
50
51	writel(BIT(line + 16) | (value ? BIT(line) : 0),
52	       priv->regs + PSR(priv->bank));
53
54	return 0;
55}
56
57static void r7s72100_gpio_set_direction(struct udevice *dev, unsigned line,
58					bool output)
59{
60	struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
61
62	writel(BIT(line + 16), priv->regs + PMCSR(priv->bank));
63	writel(BIT(line + 16) | (output ? 0 : BIT(line)),
64	       priv->regs + PMSR(priv->bank));
65
66	clrsetbits_le16(priv->regs + PIBC(priv->bank), BIT(line),
67			output ? 0 : BIT(line));
68}
69
70static int r7s72100_gpio_direction_input(struct udevice *dev, unsigned offset)
71{
72	r7s72100_gpio_set_direction(dev, offset, false);
73	return 0;
74}
75
76static int r7s72100_gpio_direction_output(struct udevice *dev, unsigned offset,
77				      int value)
78{
79	/* write GPIO value to output before selecting output mode of pin */
80	r7s72100_gpio_set_value(dev, offset, value);
81	r7s72100_gpio_set_direction(dev, offset, true);
82
83	return 0;
84}
85
86static int r7s72100_gpio_get_function(struct udevice *dev, unsigned offset)
87{
88	struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
89
90	if (readw(priv->regs + PM(priv->bank)) & BIT(offset))
91		return GPIOF_INPUT;
92	else
93		return GPIOF_OUTPUT;
94}
95
96static const struct dm_gpio_ops r7s72100_gpio_ops = {
97	.direction_input	= r7s72100_gpio_direction_input,
98	.direction_output	= r7s72100_gpio_direction_output,
99	.get_value		= r7s72100_gpio_get_value,
100	.set_value		= r7s72100_gpio_set_value,
101	.get_function		= r7s72100_gpio_get_function,
102};
103
104static int r7s72100_gpio_probe(struct udevice *dev)
105{
106	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
107	struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
108	struct fdtdec_phandle_args args;
109	int node = dev_of_offset(dev);
110	int ret;
111
112	fdt_addr_t addr_base;
113
114	uc_priv->bank_name = dev->name;
115	dev = dev_get_parent(dev);
116	addr_base = dev_read_addr(dev);
117	if (addr_base == FDT_ADDR_T_NONE)
118		return -EINVAL;
119
120	priv->regs = (void __iomem *)addr_base;
121
122	ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",
123					     NULL, 3, 0, &args);
124	priv->bank = ret == 0 ? (args.args[1] / RZA1_MAX_GPIO_PER_BANK) : -1;
125	uc_priv->gpio_count = ret == 0 ? args.args[2] : RZA1_MAX_GPIO_PER_BANK;
126
127	return 0;
128}
129
130U_BOOT_DRIVER(r7s72100_gpio) = {
131	.name	= "r7s72100-gpio",
132	.id	= UCLASS_GPIO,
133	.ops	= &r7s72100_gpio_ops,
134	.priv_auto	= sizeof(struct r7s72100_gpio_priv),
135	.probe	= r7s72100_gpio_probe,
136};
137