| /u-boot/include/dt-bindings/reset/ |
| H A D | sun20i-d1-ccu.h | 39 #define RST_BUS_SPI1 29 macro
|
| H A D | sun50i-h6-ccu.h | 41 #define RST_BUS_SPI1 32 macro
|
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/dts/upstream/include/dt-bindings/reset/ |
| H A D | sun20i-d1-ccu.h | 39 #define RST_BUS_SPI1 29 macro
|
| H A D | sun50i-a100-ccu.h | 37 #define RST_BUS_SPI1 28 macro
|
| H A D | sun50i-h6-ccu.h | 41 #define RST_BUS_SPI1 32 macro
|
| H A D | sun50i-h616-ccu.h | 38 #define RST_BUS_SPI1 29 macro
|
| H A D | sun8i-h3-ccu.h | 64 #define RST_BUS_SPI1 16 macro
|
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/reset/ |
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/reset/ |
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/reset/ |
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/reset/ |
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/arch/mips/dts/include/dt-bindings/reset/ |
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/arch/nios2/dts/include/dt-bindings/reset/ |
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/reset/ |
| H A D | sun8i-r40-ccu.h | 66 #define RST_BUS_SPI1 18 macro
|
| /u-boot/drivers/clk/sunxi/ |
| H A D | clk_f1c100s.c | 38 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
|
| H A D | clk_a83t.c | 77 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
|
| H A D | clk_a80.c | 53 [RST_BUS_SPI1] = RESET(0x5a0, BIT(21)),
|
| H A D | clk_a23.c | 58 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
|
| H A D | clk_d1.c | 64 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
|
| H A D | clk_r40.c | 97 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
|
| H A D | clk_h616.c | 107 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
|
| H A D | clk_a64.c | 81 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
|
| H A D | clk_h6.c | 94 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
|