1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@siol.net>
4 */
5
6#include <clk-uclass.h>
7#include <dm.h>
8#include <errno.h>
9#include <clk/sunxi.h>
10#include <dt-bindings/clock/sun50i-h616-ccu.h>
11#include <dt-bindings/reset/sun50i-h616-ccu.h>
12#include <linux/bitops.h>
13
14static struct ccu_clk_gate h616_gates[] = {
15	[CLK_PLL_PERIPH0]	= GATE(0x020, BIT(31) | BIT(27)),
16
17	[CLK_APB1]		= GATE_DUMMY,
18
19	[CLK_DE]		= GATE(0x600, BIT(31)),
20	[CLK_BUS_DE]		= GATE(0x60c, BIT(0)),
21
22	[CLK_NAND0]		= GATE(0x810, BIT(31)),
23	[CLK_NAND1]		= GATE(0x814, BIT(31)),
24	[CLK_BUS_NAND]		= GATE(0x82c, BIT(0)),
25
26	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
27	[CLK_BUS_MMC1]		= GATE(0x84c, BIT(1)),
28	[CLK_BUS_MMC2]		= GATE(0x84c, BIT(2)),
29
30	[CLK_BUS_UART0]		= GATE(0x90c, BIT(0)),
31	[CLK_BUS_UART1]		= GATE(0x90c, BIT(1)),
32	[CLK_BUS_UART2]		= GATE(0x90c, BIT(2)),
33	[CLK_BUS_UART3]		= GATE(0x90c, BIT(3)),
34	[CLK_BUS_UART4]		= GATE(0x90c, BIT(4)),
35	[CLK_BUS_UART5]		= GATE(0x90c, BIT(5)),
36
37	[CLK_BUS_I2C0]		= GATE(0x91c, BIT(0)),
38	[CLK_BUS_I2C1]		= GATE(0x91c, BIT(1)),
39	[CLK_BUS_I2C2]		= GATE(0x91c, BIT(2)),
40	[CLK_BUS_I2C3]		= GATE(0x91c, BIT(3)),
41	[CLK_BUS_I2C4]		= GATE(0x91c, BIT(4)),
42
43	[CLK_SPI0]		= GATE(0x940, BIT(31)),
44	[CLK_SPI1]		= GATE(0x944, BIT(31)),
45
46	[CLK_BUS_SPI0]		= GATE(0x96c, BIT(0)),
47	[CLK_BUS_SPI1]		= GATE(0x96c, BIT(1)),
48
49	[CLK_BUS_EMAC0]		= GATE(0x97c, BIT(0)),
50	[CLK_BUS_EMAC1]		= GATE(0x97c, BIT(1)),
51
52	[CLK_USB_PHY0]		= GATE(0xa70, BIT(29)),
53	[CLK_USB_OHCI0]		= GATE(0xa70, BIT(31)),
54
55	[CLK_USB_PHY1]		= GATE(0xa74, BIT(29)),
56	[CLK_USB_OHCI1]		= GATE(0xa74, BIT(31)),
57
58	[CLK_USB_PHY2]		= GATE(0xa78, BIT(29)),
59	[CLK_USB_OHCI2]		= GATE(0xa78, BIT(31)),
60
61	[CLK_USB_PHY3]		= GATE(0xa7c, BIT(29)),
62	[CLK_USB_OHCI3]		= GATE(0xa7c, BIT(31)),
63
64	[CLK_BUS_OHCI0]		= GATE(0xa8c, BIT(0)),
65	[CLK_BUS_OHCI1]		= GATE(0xa8c, BIT(1)),
66	[CLK_BUS_OHCI2]		= GATE(0xa8c, BIT(2)),
67	[CLK_BUS_OHCI3]		= GATE(0xa8c, BIT(3)),
68	[CLK_BUS_EHCI0]		= GATE(0xa8c, BIT(4)),
69	[CLK_BUS_EHCI1]		= GATE(0xa8c, BIT(5)),
70	[CLK_BUS_EHCI2]		= GATE(0xa8c, BIT(6)),
71	[CLK_BUS_EHCI3]		= GATE(0xa8c, BIT(7)),
72	[CLK_BUS_OTG]		= GATE(0xa8c, BIT(8)),
73
74	[CLK_HDMI]		= GATE(0xb00, BIT(31)),
75	[CLK_HDMI_SLOW]		= GATE(0xb04, BIT(31)),
76	[CLK_HDMI_CEC]		= GATE(0xb10, BIT(31)),
77	[CLK_BUS_HDMI]		= GATE(0xb1c, BIT(0)),
78	[CLK_BUS_TCON_TOP]	= GATE(0xb5c, BIT(0)),
79	[CLK_TCON_TV0]		= GATE(0xb80, BIT(31)),
80	[CLK_TCON_TV1]		= GATE(0xb84, BIT(31)),
81	[CLK_BUS_TCON_TV0]	= GATE(0xb9c, BIT(0)),
82	[CLK_BUS_TCON_TV1]	= GATE(0xb9c, BIT(1)),
83};
84
85static struct ccu_reset h616_resets[] = {
86	[RST_BUS_DE]		= RESET(0x60c, BIT(16)),
87	[RST_BUS_NAND]		= RESET(0x82c, BIT(16)),
88
89	[RST_BUS_MMC0]		= RESET(0x84c, BIT(16)),
90	[RST_BUS_MMC1]		= RESET(0x84c, BIT(17)),
91	[RST_BUS_MMC2]		= RESET(0x84c, BIT(18)),
92
93	[RST_BUS_UART0]		= RESET(0x90c, BIT(16)),
94	[RST_BUS_UART1]		= RESET(0x90c, BIT(17)),
95	[RST_BUS_UART2]		= RESET(0x90c, BIT(18)),
96	[RST_BUS_UART3]		= RESET(0x90c, BIT(19)),
97	[RST_BUS_UART4]		= RESET(0x90c, BIT(20)),
98	[RST_BUS_UART5]		= RESET(0x90c, BIT(21)),
99
100	[RST_BUS_I2C0]		= RESET(0x91c, BIT(16)),
101	[RST_BUS_I2C1]		= RESET(0x91c, BIT(17)),
102	[RST_BUS_I2C2]		= RESET(0x91c, BIT(18)),
103	[RST_BUS_I2C3]		= RESET(0x91c, BIT(19)),
104	[RST_BUS_I2C4]		= RESET(0x91c, BIT(20)),
105
106	[RST_BUS_SPI0]		= RESET(0x96c, BIT(16)),
107	[RST_BUS_SPI1]		= RESET(0x96c, BIT(17)),
108
109	[RST_BUS_EMAC0]		= RESET(0x97c, BIT(16)),
110	[RST_BUS_EMAC1]		= RESET(0x97c, BIT(17)),
111
112	[RST_USB_PHY0]		= RESET(0xa70, BIT(30)),
113
114	[RST_USB_PHY1]		= RESET(0xa74, BIT(30)),
115
116	[RST_USB_PHY2]		= RESET(0xa78, BIT(30)),
117
118	[RST_USB_PHY3]		= RESET(0xa7c, BIT(30)),
119
120	[RST_BUS_OHCI0]		= RESET(0xa8c, BIT(16)),
121	[RST_BUS_OHCI1]		= RESET(0xa8c, BIT(17)),
122	[RST_BUS_OHCI2]		= RESET(0xa8c, BIT(18)),
123	[RST_BUS_OHCI3]		= RESET(0xa8c, BIT(19)),
124	[RST_BUS_EHCI0]		= RESET(0xa8c, BIT(20)),
125	[RST_BUS_EHCI1]		= RESET(0xa8c, BIT(21)),
126	[RST_BUS_EHCI2]		= RESET(0xa8c, BIT(22)),
127	[RST_BUS_EHCI3]		= RESET(0xa8c, BIT(23)),
128	[RST_BUS_OTG]		= RESET(0xa8c, BIT(24)),
129
130	[RST_BUS_HDMI]		= RESET(0xb1c, BIT(16)),
131	[RST_BUS_HDMI_SUB]	= RESET(0xb1c, BIT(17)),
132	[RST_BUS_TCON_TOP]	= RESET(0xb5c, BIT(16)),
133	[RST_BUS_TCON_TV0]	= RESET(0xb9c, BIT(16)),
134	[RST_BUS_TCON_TV1]	= RESET(0xb9c, BIT(17)),
135};
136
137const struct ccu_desc h616_ccu_desc = {
138	.gates = h616_gates,
139	.resets = h616_resets,
140	.num_gates = ARRAY_SIZE(h616_gates),
141	.num_resets = ARRAY_SIZE(h616_resets),
142};
143