| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
|
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
|
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
|
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt8518-clk.h | 16 #define CLK_APMIXED_APLL2 5 macro
|
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt8183-clk.h | 21 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt8365-clk.h | 240 #define CLK_APMIXED_APLL2 7 macro
|
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 151 #define CLK_APMIXED_APLL2 10 macro
|
| H A D | mediatek,mt7988-clk.h | 16 #define CLK_APMIXED_APLL2 3 macro
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| H A D | mt6797-clk.h | 117 #define CLK_APMIXED_APLL2 10 macro
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| H A D | mt8173-clk.h | 167 #define CLK_APMIXED_APLL2 12 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8183.c | 66 PLL(CLK_APMIXED_APLL2, 0x02b4, 0x02c4, 0x00000001,
151 FACTOR(CLK_TOP_APLL2_CK, CLK_APMIXED_APLL2, 1, 1, CLK_PARENT_APMIXED),
152 FACTOR(CLK_TOP_APLL2_D2, CLK_APMIXED_APLL2, 1, 2, CLK_PARENT_APMIXED),
153 FACTOR(CLK_TOP_APLL2_D4, CLK_APMIXED_APLL2, 1, 4, CLK_PARENT_APMIXED),
154 FACTOR(CLK_TOP_APLL2_D8, CLK_APMIXED_APLL2, 1, 8, CLK_PARENT_APMIXED),
|