Searched refs:o1 (Results 101 - 125 of 225) sorted by relevance

123456789

/opensolaris-onvv-gate/usr/src/psm/stand/boot/sparc/common/
H A Dsparcv9_subr.s227 rdpr %pil, %o1 ! get current pil
230 mov %o1, %o0
263 rdpr %pil, %o1 ! get current pil
264 cmp %o0, %o1
269 mov %o1, %o0 ! return the old pil
/opensolaris-onvv-gate/usr/src/uts/common/io/nxge/
H A Dnxge_hcall.s285 stx %o1, [%g1]
310 stx %o1, [%g1]
324 stw %o1, [%g1]
342 mov %o1, %g1
346 stx %o1, [%g1]
355 mov %o1, %g1
359 stx %o1, [%g1]
366 mov %o1, %g1
370 stx %o1, [%g1]
382 stx %o1, [
[all...]
/opensolaris-onvv-gate/usr/src/uts/common/gssapi/
H A Dgssapi_ext.h46 #define g_OID_equal(o1, o2) \
47 (((o1)->length == (o2)->length) && \
48 (memcmp((o1)->elements, (o2)->elements, (int)(o1)->length) == 0))
53 * o2 is copied to o1
55 #define g_OID_copy(o1, o2) \
56 bcopy((o2)->elements, (o1)->elements, (o2)->length);\
57 (o1)->length = (o2)->length;
/opensolaris-onvv-gate/usr/src/uts/sun4v/cpu/
H A Dniagara_asm.s62 mov %o1, %o4 ! save datap
66 stx %o1, [%o4]
135 subcc %o1, 0x100, %o1
163 mov %o1, %o4 ! save prev_buf
167 stx %o1, [%o4]
178 stx %o1, [%o4]
H A Dcommon_asm.s155 sethi %hi(tick_write_delta_panic), %o1
157 mov %i0, %o1
177 RD_TICKCMPR(%g1,%o0,%o1,__LINE__)
247 RD_TICK(%o0,%o1,%o2,__LINE__)
267 * Returns 64-bit nanosecond timestamp in %o0 and %o1.
330 GET_HRTIME(%g1,%o0,%o1,%o2,%o3,%o4,%o5,%g2,__LINE__)
353 NATIVE_TIME_TO_NSEC(%g1, %o0, %o1)
365 ldx [%o0], %o1
366 NATIVE_TIME_TO_NSEC(%o1, %o2, %o3)
368 stx %o1, [
[all...]
/opensolaris-onvv-gate/usr/src/uts/sun4u/starfire/ml/
H A Didn_asm.s96 stxa %o1, [IDDR_1]%asi ! dmv_word1
169 ldxa [%g0]ASI_INTR_DISPATCH_STATUS, %o1
170 brz,pn %o1, .dispatch_complete
191 ld [%o0 + %lo(_idn_send_mondo_failure)], %o1
192 inc %o1
193 st %o1, [%o0 + %lo(_idn_send_mondo_failure)]
200 mov %o0, %o1 ! save target
212 btst IDSR_BUSY, %o1 ! was it BUSY?
247 clr %o1 ! o1 i
[all...]
/opensolaris-onvv-gate/usr/src/common/bignum/sun4u/
H A Dmont_mulf_v9.s142 /* 0x0024 57 */ sra %o1,0,%o3
144 /* 0x002c */ sra %o2,0,%o1
153 /* 0x0038 63 */ sll %o1,1,%o1
155 /* 0x0040 63 */ cmp %g2,%o1
162 /* 0x0050 57 */ sub %o1,1,%o3
176 /* 0x0060 65 */ sra %o2,0,%o1
179 /* 0x006c 65 */ sllx %o1,3,%o1
181 /* 0x0074 65 */ ldd [%o4+%o1],
[all...]
/opensolaris-onvv-gate/usr/src/lib/libc/sparcv9/threads/
H A Dsparcv9.il46 or %o1, %o0, %o0
56 cas [%o0], %o1, %o2
63 mov %o1, %o3
94 and %o2, %o1, %o3
104 or %o2, %o1, %o3
/opensolaris-onvv-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_asm.s54 ! %o1 is address to read
82 ldxa [%o1]%asi, %g1
89 lduwa [%o1]%asi, %g1
96 lduha [%o1]%asi, %g1
101 lduba [%o1]%asi, %g1 ! 8-bit!
120 ! %o1 is address to write to
141 stxa %g1, [%o1]%asi
148 stuwa %g1, [%o1]%asi
155 stuha %g1, [%o1]%asi
159 stuba %g1, [%o1]
[all...]
/opensolaris-onvv-gate/usr/src/uts/sun4u/io/px/
H A Dpx_asm_4u.s56 ! %o1 is address to read
86 ldxa [%o1]%asi, %g1
93 lduwa [%o1]%asi, %g1
100 lduha [%o1]%asi, %g1
105 lduba [%o1]%asi, %g1 ! 8-bit!
124 ! %o1 is address to write to
144 stxa %g1, [%o1]%asi
151 stuwa %g1, [%o1]%asi
158 stuha %g1, [%o1]%asi
162 stuba %g1, [%o1]
[all...]
/opensolaris-onvv-gate/usr/src/uts/sun4u/ml/
H A Dmach_subr_asm.s83 CPU_INDEX(%o0, %o1)
147 ldxa [%g0]ASI_AFSR, %o1 ! afsr reg
149 stx %o1, [%o0]
180 ldxa [%g0]ASI_AFAR, %o1 ! afar reg
182 stx %o1, [%o0]
205 mulx %o1, CPU_NODE_SIZE, %o2 ! %o2 = byte offset into cpunodes
229 set ASI_CMP_ERROR_STEERING, %o1 ! %o1 = ERROR_STEERING_REG
230 stxa %o0, [%o1]ASI_CMP_SHARED ! this core now hadles
320 * r[9] %o1
[all...]
H A Dmach_copy.s184 cmp %o1, 15 ! check for small counts
188 cmp %o1, 192 ! check for large counts
229 sub %o1, 1, %o1
242 sub %o1, 4, %o1
250 sub %o1, 8, %o1
287 sub %o1, %o3, %o1
[all...]
/opensolaris-onvv-gate/usr/src/uts/sun4u/starcat/ml/
H A Ddrmach_asm.s239 ! %o1 = ecache flush address (ignored if cheetah+ processor)
265 stx %o1, [%g6 + 24] ! save E$ flush PA
406 ! %o1 address for setting error code if rename did not
413 ! [%o1] = 1 if failed to idle memory controller, otherwise unmodified.
470 mov %o1, %o4 ! save error code address
473 BUS_SYNC(%o0, %o1) ! run section 1
475 SET_NULL_LPA(%o1, %o2) ! prep for cachable transactions
479 ldx [%o0], %o1 ! run section 2
480 brz,a,pn %o1, 4f
482 CHECK_MCU_IDLE(%o1, ASI_SAFARI_CONFI
[all...]
/opensolaris-onvv-gate/usr/src/common/crypto/sha1/sparc/sun4u/
H A Dsha1_asm.s107 brz,pt %o1, 2f
122 ld [%o0 + FPU_FPRS], %o1
123 andcc %o1, FPRS_FEF, %g0
127 wr %o1, 0, %fprs
135 wr %o1, 0, %fprs
146 ld [%i2 + 4], %o1
159 and %o1, %o2, %l1
163 andn %o3, %o1, %l4
166 sll %o1, 30, %l5
170 srl %o1,
[all...]
/opensolaris-onvv-gate/usr/src/lib/libc/sparc/threads/
H A Dasm_subr.s107 mov %o1, %o2
108 mov %o0, %o1
116 mov %o0, %o1
124 mov %o1, %o2
125 mov %o0, %o1
142 mov %i1, %o1
/opensolaris-onvv-gate/usr/src/uts/sun4u/cpu/
H A Dus3_common_asm.s192 * %o1 = sfmmup
211 cmp %o3, %o1
227 * %o1 = sfmmup
230 SFMMU_CPU_CNUM(%o1, %g1, %g2) ! %g1 = sfmmu cnum on this CPU
232 ldub [%o1 + SFMMU_CEXT], %o4 ! %o4 = sfmmup->sfmmu_cext
240 srlx %o2, CTXREG_NEXT_SHIFT, %o1 ! need to preserve nucleus pgsz
241 sllx %o1, CTXREG_NEXT_SHIFT, %o1 ! %o1 = nucleus pgsz
242 or %g1, %o1,
[all...]
/opensolaris-onvv-gate/usr/src/psm/stand/cpr/sparcv9/sun4u/
H A Dcb_srt0.s87 sub %g2, %o0, %o1 ! bss size = (_end - _edata)
102 mov 1, %o1 ! first=true
116 mov 0, %o1 ! first=false
130 * %o1 struct sun4u_machdep *mdp
151 ld [%o1 + CPR_MD_KSB], %l4 ! mdp->ksb
157 lduh [%o1 + CPR_MD_KPSTATE], %l4 ! l4 = mdp->kpstate
159 lduh [%o1 + CPR_MD_KWSTATE], %l4 ! l4 = mdp->kwstate
163 ! jump to kernel with %o0 and %o1 unchanged
165 ldx [%o1 + CPR_MD_FUNC], %l3 ! l3 = mdp->func
191 mov %o1,
[all...]
/opensolaris-onvv-gate/usr/src/lib/libc/capabilities/sun4u/common/
H A Dmemset.s69 stb %o1, [%o5 + -1] ! we've already incremented the address
77 and %o1, 0xff, %o1 ! o1 is (char)c
82 1: stb %o1, [%o5] ! there is at least 1 byte to set
90 sll %o1, 8, %o3
91 or %o1, %o3, %o1 ! now o1 has 2 bytes of c
93 sll %o1, 1
[all...]
/opensolaris-onvv-gate/usr/src/lib/libc/capabilities/sun4u-us3/common/
H A Dmemset.s70 stb %o1, [%o5 + -1] ! we've already incremented the address
78 and %o1, 0xff, %o1 ! o1 is (char)c
83 1: stb %o1, [%o5] ! there is at least 1 byte to set
91 sll %o1, 8, %o3
92 or %o1, %o3, %o1 ! now o1 has 2 bytes of c
94 sll %o1, 1
[all...]
/opensolaris-onvv-gate/usr/src/uts/sun4v/io/fpc/
H A Dfpc-asm-4v.s64 stx %o1, [%o2]
/opensolaris-onvv-gate/usr/src/uts/sun4v/io/iospc/
H A Drfios_asm.s55 stx %o1, [%o2]
/opensolaris-onvv-gate/usr/src/uts/sun4v/io/n2piupc/
H A Dn2piupc_asm.s57 stx %o1, [%o2]
/opensolaris-onvv-gate/usr/src/uts/sun4v/ml/
H A Dmach_subr_asm.s65 RD_TICK(%o0,%o1,%o2,__LINE__)
124 mov %o1, %g4
128 ldx [%g2 + MCPU_CPU_Q_BASE], %o1
133 ldx [%g2 + MCPU_DEV_Q_BASE], %o1
138 ldx [%g2 + MCPU_RQ_BASE], %o1
143 ldx [%g2 + MCPU_NRQ_BASE], %o1
157 mov %g4, %o1
189 CPU_INDEX(%o0, %o1)
314 * r[9] %o1
330 * %o1 a
[all...]
/opensolaris-onvv-gate/usr/src/uts/sun4/ml/
H A Dsubr_asm.s55 set trap_table, %o1
57 wrpr %o1, %tba
139 stxa %o1, [%o0]ASI_MEM
156 stxa %o1, [%o0]ASI_IO
199 sta %o1, [%o0]ASI_MEM
229 stwa %o1, [%o0]ASI_IO /* store value via bypass ASI */
243 stha %o1, [%o0]ASI_IO /* store value via bypass ASI */
257 stba %o1, [%o0]ASI_IO /* store byte via bypass ASI */
427 stx %o0, [%o1 + FPU_GSR]
511 BSTORE_FPREGS(%o0, %o1) ! stor
[all...]
/opensolaris-onvv-gate/usr/src/uts/sparc/v9/ml/
H A Dsparcv9_subr.s76 rdpr %pil, %o1; /* get current PIL */ \
77 cmp %o1, level; /* is PIL high enough? */ \
88 mov %o1, %o0 /* return old PIL */
97 rdpr %pil, %o1; /* get current PIL */ \
98 cmp %o1, level; /* is PIL high enough? */ \
104 mov %o1, %o0 /* return old PIL */
114 rdpr %pil, %o1; /* get current PIL */ \
122 mov %o1, %o0 /* return old PIL */
132 rdpr %pil, %o1; /* get current PIL */ \
135 mov %o1,
[all...]

Completed in 374 milliseconds

123456789