Lines Matching refs:o1
65 RD_TICK(%o0,%o1,%o2,__LINE__)
124 mov %o1, %g4
128 ldx [%g2 + MCPU_CPU_Q_BASE], %o1
133 ldx [%g2 + MCPU_DEV_Q_BASE], %o1
138 ldx [%g2 + MCPU_RQ_BASE], %o1
143 ldx [%g2 + MCPU_NRQ_BASE], %o1
157 mov %g4, %o1
189 CPU_INDEX(%o0, %o1)
314 * r[9] %o1
330 * %o1 as rd for the SETHI, so rd of the ADDCCC must be %l6.
331 * We'll use %o1 as rs1 and %l6 as rs2 of the ADDCCC, which then
355 #define CBR1 %o1