Searched refs:psr (Results 26 - 50 of 95) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-sparc/
H A Duser.h13 unsigned long psr, pc, npc, y; member in struct:sunos_regs
H A Dsystem.h11 #include <asm/psr.h>
81 (prv)->thread.kregs->psr &= ~PSR_EF; \
91 (nxt)->thread.kregs->psr&=~PSR_EF; \
123 "rd %%psr, %%g4\n\t" \
126 "wr %%g4, 0x20, %%psr\n\t" \
134 "wr %%g4, 0x20, %%psr\n\t" \
142 "wr %%g4, 0x0, %%psr\n\t" \
181 __asm__ __volatile__("rd %%psr, %0" : "=r" (retval));
H A Dide.h16 #include <asm/psr.h>
H A Delf.h109 dest[32] = src->psr; \
H A Dspinlock.h13 #include <asm/psr.h>
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-sparc64/
H A Duser.h13 unsigned int psr, pc, npc, y; member in struct:sunos_regs
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sparc/kernel/
H A Drtrap.S9 #include <asm/psr.h>
56 wr %t_psr, 0x0, %psr
84 wr %t_psr, 0x0, %psr
92 wr %t_psr, PSR_ET, %psr
150 wr %t_psr, 0x0, %psr
163 wr %t_psr, PSR_ET, %psr
204 wr %t_psr, 0x0, %psr
213 wr %t_psr, PSR_ET, %psr
H A Dwuf.S10 #include <asm/psr.h>
37 * rd %psr, %l0
118 /* Now preserve the condition codes in %psr, pause, and
121 wr %t_psr, 0x0, %psr
166 rd %psr, %g3 /* Read %psr in live user window */
190 wr %t_psr, PSR_ET, %psr ! enable traps
216 wr %t_psr, 0x0, %psr
347 wr %t_psr, 0x0, %psr
H A Dentry.S20 #include <asm/psr.h>
177 wr %l0, 0x0, %psr
199 wr %l4, 0x0, %psr
201 wr %l4, PSR_ET, %psr
218 wr %l0, PSR_ET, %psr
248 wr %g2, 0x0, %psr
250 wr %g2, PSR_ET, %psr
257 wr %g2, PSR_ET, %psr ! keep ET up
267 wr %g2, 0x0, %psr
269 wr %g2, PSR_ET, %psr
[all...]
H A Dptrace.c38 regs->psr |= PSR_C;
46 regs->psr &= ~PSR_C;
59 regs->psr &= ~PSR_C;
149 if(cregs->psr & PSR_C)
363 __put_user(cregs->psr, (&pregs->psr));
379 unsigned long psr, pc, npc, y; local
383 * bits in the psr.
389 __get_user(psr, (&pregs->psr));
[all...]
H A Dprocess.c40 #include <asm/psr.h>
241 r->psr, r->pc, r->npc, r->y, print_tainted());
438 if (regs->psr & PSR_PS)
456 if(regs->psr & PSR_PS) {
497 childregs->psr &= ~PSR_EF;
522 dump->regs.psr = regs->psr;
561 regs->psr &= ~(PSR_EF);
571 regs->psr &= ~(PSR_EF);
H A Detrap.S12 #include <asm/psr.h>
47 * rd %psr, %l0
70 * %l0 contains trap time %psr, %l1 and %l2 contain the
82 andcc %t_psr, PSR_PS, %g0 ! fromsupv_p = (psr & PSR_PS)
84 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
141 sll %t_twinmask, %t_psr, %t_twinmask ! t_twinmask = (1 << psr)
H A Dsparc-stub.c585 unsigned long *newsp, psr; local
587 psr = registers[PSR];
609 if (psr != registers[PSR])
610 registers[PSR] = (psr & 0x1f) | (registers[PSR] & ~0x1f);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sparc64/kernel/
H A Dsignal32.c81 /* Only valid if (info.si_regs.psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS */
147 /* Only valid if (regs.psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS */
248 unsigned int psr; local
277 err |= __get_user(psr, &sf->info.si_regs.psr);
281 if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) {
296 regs->tstate |= psr_to_tstate_icc(psr);
326 unsigned int pc, npc, psr; local
382 err |= __get_user(psr, &scptr->sigc_psr);
386 regs->tstate |= psr_to_tstate_icc(psr);
396 unsigned int psr, pc, npc, fpu_save, u_ss_sp; local
519 unsigned int psr; local
672 u32 psr; local
813 unsigned int psr; local
928 u32 psr; local
989 u32 pc, npc, psr, u_ss_sp; local
1075 u32 psr; local
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/frv/kernel/
H A Dsetup.c279 unsigned long psr = __get_PSR(); local
282 __set_PSR(psr | PSR_EM | PSR_EF | PSR_CM | PSR_NEM);
284 __set_PSR(psr);
302 switch (PSR_IMPLE(psr)) {
308 switch (PSR_VERSION(psr)) {
339 switch (PSR_VERSION(psr)) {
369 switch (PSR_VERSION(psr)) {
386 switch (PSR_VERSION(psr)) {
399 switch (PSR_VERSION(psr)) {
436 unsigned long clkc, psr, quo local
[all...]
H A Dsleep.S62 # save hsr0, psr, isr, and lr for resume code
67 movsg psr,gr5
101 movsg psr,gr8
104 movgs gr8,psr
128 # gr8 holds desired psr sleep value
171 movgs gr8,psr
214 # restore hsr0, psr, isr, and leave saved lr in gr7
255 lddi @(gr11,#0),gr4 ; hsr0, psr
267 movgs gr5,psr
311 movsg psr,gr
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-frv/
H A Dregisters.h77 unsigned long psr; /* Processor Status Register */ member in struct:pt_regs
168 unsigned long psr; /* Processor Status Register */ member in struct:user_int_regs
H A Dptrace.h74 #define user_mode(regs) (!((regs)->psr & PSR_S))
H A Dprocessor.h103 __frame->psr &= ~PSR_S; \
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sparc/mm/
H A Dswift.S7 #include <asm/psr.h>
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/pcmcia/
H A Dhd64465_ss.c284 u_int psr; local
305 psr = inw(HD64465_REG_PCCPSR);
309 psr &= 0x0f;
310 psr |= hs_tps2206_avcc[vcci];
311 psr |= (Vpp == 0 ? 0x00 : 0x02);
314 psr &= 0xf0;
315 psr |= hs_tps2206_bvcc[vcci];
316 psr |= (Vpp == 0 ? 0x00 : 0x20);
319 outw(psr, HD64465_REG_PCCPSR);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/platforms/powermac/
H A Dcpufreq_64.c175 unsigned long psr = scom970_read(SCOM_PSR); local
177 if ((psr & PSR_CMD_RECEIVED) == 0 &&
178 (((psr >> PSR_CUR_SPEED_SHIFT) ^
182 if (psr & PSR_CMD_COMPLETED)
201 unsigned long psr = scom970_read(SCOM_PSR); local
205 if ((((psr >> PSR_CUR_SPEED_SHIFT) ^
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ia64/kernel/
H A Divt.S55 # define PSR_DEFAULT_BITS psr.ac
99 rsm psr.dt // use physical addressing for data
338 extr.u r23=r21,IA64_PSR_CPL0_BIT,2 // extract psr.cpl
343 cmp.ne p8,p0=r0,r23 // psr.cpl != 0?
387 extr.u r23=r21,IA64_PSR_CPL0_BIT,2 // extract psr.cpl
433 * Clobbered: b0, r18, r19, r21, r22, psr.dt (cleared)
435 rsm psr.dt // switch to using physical data addressing
499 // call do_page_fault (predicates are in r31, psr.dt may be off, r16 is faulting address)
501 ssm psr.dt
511 ssm psr
[all...]
H A Defi_stub.S19 * psr.dfl and psr.dfh MUST be cleared, despite what this manual says.
21 * (the br.ia instruction fails unless psr.dfl and psr.dfh are
58 mov loc3=psr // save processor status word
64 andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared
H A Desi_stub.S22 * psr.dfl and psr.dfh MUST be cleared, despite what this manual says.
24 * (the br.ia instruction fails unless psr.dfl and psr.dfh are
75 mov loc3=psr // save processor status word
81 andcm r16=loc3,r16 // get psr with IT, DT, and RT bits cleared
87 mov r16=loc3 // save virtual mode psr

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