1/* $Id: swift.S,v 1.1.1.1 2007-08-03 18:52:18 $ 2 * swift.S: MicroSparc-II mmu/cache operations. 3 * 4 * Copyright (C) 1999 David S. Miller (davem@redhat.com) 5 */ 6 7#include <asm/psr.h> 8#include <asm/asi.h> 9#include <asm/page.h> 10#include <asm/pgtsrmmu.h> 11#include <asm/asm-offsets.h> 12 13 .text 14 .align 4 15 16 .globl swift_flush_cache_all, swift_flush_cache_mm 17 .globl swift_flush_cache_range, swift_flush_cache_page 18 .globl swift_flush_page_for_dma 19 .globl swift_flush_page_to_ram 20 21swift_flush_cache_all: 22swift_flush_cache_mm: 23swift_flush_cache_range: 24swift_flush_cache_page: 25swift_flush_page_for_dma: 26swift_flush_page_to_ram: 27 sethi %hi(0x2000), %o0 281: subcc %o0, 0x10, %o0 29 add %o0, %o0, %o1 30 sta %g0, [%o0] ASI_M_DATAC_TAG 31 bne 1b 32 sta %g0, [%o1] ASI_M_TXTC_TAG 33 retl 34 nop 35 36 .globl swift_flush_sig_insns 37swift_flush_sig_insns: 38 flush %o1 39 retl 40 flush %o1 + 4 41 42 .globl swift_flush_tlb_mm 43 .globl swift_flush_tlb_range 44 .globl swift_flush_tlb_all 45swift_flush_tlb_range: 46 ld [%o0 + 0x00], %o0 47swift_flush_tlb_mm: 48 ld [%o0 + AOFF_mm_context], %g2 49 cmp %g2, -1 50 be swift_flush_tlb_all_out 51swift_flush_tlb_all: 52 mov 0x400, %o1 53 sta %g0, [%o1] ASI_M_FLUSH_PROBE 54swift_flush_tlb_all_out: 55 retl 56 nop 57 58 .globl swift_flush_tlb_page 59swift_flush_tlb_page: 60 ld [%o0 + 0x00], %o0 61 mov SRMMU_CTX_REG, %g1 62 ld [%o0 + AOFF_mm_context], %o3 63 andn %o1, (PAGE_SIZE - 1), %o1 64 cmp %o3, -1 65 be swift_flush_tlb_page_out 66 nop 67 mov 0x400, %o1 68 sta %g0, [%o1] ASI_M_FLUSH_PROBE 69swift_flush_tlb_page_out: 70 retl 71 nop 72