/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstructionCombining.cpp | 1095 if (cast<Instruction>(InVal)->getParent() == NonConstBB) 1101 if (isPotentiallyReachable(I.getParent(), NonConstBB, nullptr, &DT, LI)) 1132 BasicBlock *PhiTransBB = PN->getParent(); 2025 GEP.getParent()->getInstList().insert( 2026 GEP.getParent()->getFirstInsertionPt(), NewGEP); 2041 if (Loop *L = LI->getLoopFor(GEP.getParent())) { 2447 BCI->getParent()->getInstList().insert(BCI->getIterator(), I); 2672 None, "", II->getParent()); 2724 BasicBlock *FreeInstrBB = FI.getParent(); 2888 BasicBlock::iterator FirstInstr = BBI->getParent() [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
H A D | SimplifyLibCalls.cpp | 1189 B.SetInsertPoint(Malloc->getParent(), ++Malloc->getIterator()); 2051 Module *M = Callee->getParent(); 2111 Triple T(OrigCallee->getParent()->getTargetTriple()); 2126 Module *M = OrigCallee->getParent(); 2133 B.SetInsertPoint(ArgInst->getParent(), ++ArgInst->getIterator()); 2137 BasicBlock &EntryBB = B.GetInsertBlock()->getParent()->getEntryBlock(); 2239 Function *F = Intrinsic::getDeclaration(CI->getCalledFunction()->getParent(), 2253 Function *F = Intrinsic::getDeclaration(CI->getCalledFunction()->getParent(), 2434 Module *M = B.GetInsertBlock()->getParent()->getParent(); [all...] |
H A D | LoopUnroll.cpp | 121 Loop *DefLoop = LI->getLoopFor(Def->getParent()); 409 dbgs() << " Exiting Block = " << ExitingBI->getParent()->getName() 553 ExitingBlocks.push_back(ExitingBI->getParent()); 579 if (Header->getParent()->isDebugInfoForProfiling() && !EnableFSDiscriminator) 606 Header->getParent()->getBasicBlockList().push_back(New);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
H A D | RewriteStatepointsForGC.cpp | 1252 DT->dominates(cast<Instruction>(base)->getParent(), 1253 cast<Instruction>(ptr)->getParent())) && 1504 auto *RI = cast<ReturnInst>(OldI->getParent()->getTerminator()); 1599 CallTarget = F->getParent() 1696 F->getParent() 1922 const DataLayout &DL = F.getParent()->getDataLayout(); 2208 OrigRootPhi.getParent() != AlternateRootPhi.getParent()) 2408 normalizeForInvokeSafepoint(II->getNormalDest(), II->getParent(), DT); 2409 normalizeForInvokeSafepoint(II->getUnwindDest(), II->getParent(), D [all...] |
H A D | InferAddressSpaces.cpp | 341 Module *M = II->getParent()->getParent()->getParent(); 733 if (NewI->getParent() == nullptr) { 762 DL = &F.getParent()->getDataLayout();
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H A D | StraightLineStrengthReduce.cpp | 280 DT->dominates(Basis.Ins->getParent(), C.Ins->getParent()) && 639 assert(Basis.Ins->getParent() != nullptr && "the basis is unlinked"); 645 if (!C.Ins->getParent()) 763 const DataLayout *DL = &F.getParent()->getDataLayout();
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/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 245 setMF(*MBB.getParent()); 250 MachineIRBuilder(*MI.getParent(), MI.getIterator()) { 281 return getMF().getFunction().getParent()->getDataLayout(); 315 assert(MBB.getParent() == &getMF() && 335 assert(&getMF() == MBB.getParent() && 342 assert(MI.getParent() && "Instruction is not part of a basic block"); 343 setMBB(*MI.getParent());
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | MachineOperand.cpp | 44 if (const MachineInstr *MI = MO.getParent()) 45 if (const MachineBasicBlock *MBB = MI->getParent()) 46 if (const MachineFunction *MF = MBB->getParent()) 125 const MachineInstr *MI = getParent(); 459 if (const Function *F = BB.getParent()) { 462 } else if (const Module *M = F->getParent()) { 805 Formatter->printImm(OS, *getParent(), OpIdx, getImm());
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H A D | PeepholeOptimizer.cpp | 494 ReachedBBs.insert(UI.getParent()); 504 MachineInstr *UseMI = UseMO.getParent(); 537 MachineBasicBlock *UseMBB = UseMI->getParent(); 572 PHIBBs.insert(UI.getParent()); 577 MachineInstr *UseMI = UseMO->getParent(); 578 MachineBasicBlock *UseMBB = UseMI->getParent(); 771 MachineBasicBlock *MBB = OrigPHI.getParent(); 1241 BuildMI(*CopyLike.getParent(), &CopyLike, CopyLike.getDebugLoc(), 2101 Def = DI->getParent();
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H A D | ExpandMemCmp.cpp | 267 EndBlock->getParent(), EndBlock); 274 EndBlock->getParent(), EndBlock); 625 BasicBlock *StartBlock = CI->getParent(); 763 llvm::shouldOptimizeForSize(CI->getParent(), PSI, BFI); 881 const DataLayout& DL = F.getParent()->getDataLayout();
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUTargetTransformInfo.cpp | 97 : BaseT(TM, F.getParent()->getDataLayout()), 104 const Function &F = *L->getHeader()->getParent(); 285 : BaseT(TM, F.getParent()->getDataLayout()), 1079 Module *M = II->getParent()->getParent()->getParent(); 1249 : BaseT(TM, F.getParent()->getDataLayout()),
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H A D | AMDGPUSubtarget.cpp | 508 Function *Kernel = I->getParent()->getParent(); 580 const DataLayout &DL = F.getParent()->getDataLayout(); 826 MachineBasicBlock::const_instr_iterator E(DefI->getParent()->instr_end()); 839 MachineBasicBlock::const_instr_iterator E(UseI->getParent()->instr_end());
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H A D | AMDGPURegisterBankInfo.cpp | 462 const MachineFunction &MF = *MI.getParent()->getParent(); 1860 B.setInsertPt(*IdxUseInstr.getParent(), IdxUseInstr.getIterator()); 2090 MachineIRBuilder B(*MI.getParent()->getParent()); 2113 MachineFunction *MF = MI.getParent()->getParent(); 2155 MachineBasicBlock *MBB = MI.getParent(); 2257 MachineFunction *MF = MI.getParent()->getParent(); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 127 if (CxtI && CxtI->getParent()) 132 if (CxtI && CxtI->getParent()) 141 if (CxtI && CxtI->getParent()) 146 if (CxtI && CxtI->getParent()) 150 if (CxtI && CxtI->getParent()) 531 if (Inv->getParent() == CxtI->getParent()) { 561 } else if (Inv->getParent() == CxtI->getParent()->getSinglePredecessor()) { 654 assert(I->getParent() [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/ |
H A D | LoopVectorize.cpp | 1098 CodeRegion = I->getParent(); 1158 OS << L->getHeader()->getParent()->getParent()->getModuleIdentifier(); 1529 if (!blockNeedsPredication(I->getParent())) 2118 Function *Fn = OuterLp->getHeader()->getParent(); 2244 DT->dominates(Instr->getParent(), LoopVectorPreHeader)); 3274 assert(!(SCEVCheckBlock->getParent()->hasOptSize() || 3306 if (MemCheckBlock->getParent()->hasOptSize() || OptForSizeBasedOnProfile) { 3384 BasicBlock *InsertBB = B.GetInsertPoint()->getParent(); 4235 InsertPt = PreviousInst->getParent() [all...] |
/netbsd-current/external/apache2/llvm/dist/clang/lib/Sema/ |
H A D | SemaDeclCXX.cpp | 529 if (MD && MD->getParent()->getDescribedClassTemplate()) { 1671 const CXXRecordDecl *RD = DD->getParent(); 1748 const CXXRecordDecl *RD = MD->getParent(); 1801 if (!Dtor->getParent()->defaultedDestructorIsConstexpr()) { 2235 const CXXRecordDecl *RD = Constructor->getParent(); 3042 (MD->getParent()->hasAnyDependentBases() || 3522 !FD->getParent()->isDependentContext() && 3882 const CXXRecordDecl *RD = Constructor->getParent(); 4185 CXXRecordDecl *ClassDecl = Constructor->getParent(); 4819 if (!Field->getParent() [all...] |
H A D | SemaAccess.cpp | 134 DC = DC->getParent(); 244 namingClass = cast<CXXRecordDecl>(namingClass->getParent()); 1140 while (DC->getParent() != DeclaringClass) 1141 DC = DC->getParent(); 1616 CXXRecordDecl *NamingClass = Dtor->getParent(); 1680 CXXRecordDecl *NamingClass = Constructor->getParent(); 1692 !Entity.getParent()) { 1693 ObjectClass = cast<CXXConstructorDecl>(CurContext)->getParent(); 1698 ObjectClass = Shadow->getParent();
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H A D | SemaCUDA.cpp | 327 bool InClass = MemberDecl->getLexicalParent() == MemberDecl->getParent(); 479 if (CD->getParent()->isDynamicClass()) 483 if (CD->getParent()->isUnion()) 519 const CXXRecordDecl *ClassDecl = DD->getParent(); 527 if (DD->getParent()->isUnion())
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86SpeculativeLoadHardening.cpp | 230 MachineFunction &MF = *MBB.getParent(); 1576 MachineBasicBlock &MBB = *MI.getParent(); 1832 if (!X86InstrInfo::isDataInvariant(UseMI) || UseMI.getParent() != MI.getParent() || 1962 MachineBasicBlock &MBB = *MI.getParent(); 2013 MachineBasicBlock &MBB = *MI.getParent(); 2060 MachineBasicBlock &MBB = *MI.getParent(); 2061 MachineFunction &MF = *MBB.getParent(); 2264 OldTargetReg, *MI.getParent(), MI.getIterator(), MI.getDebugLoc());
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
H A D | SampleProfile.cpp | 844 annotateValueSite(*Inst.getParent()->getParent()->getParent(), Inst, 949 I->getDebugLoc(), I->getParent()) 1125 I->getDebugLoc(), I->getParent()) 1170 BasicBlock *BB = CB.getParent(); 1186 emitInlinedInto(*ORE, DLoc, BB, *CalledFunction, *BB->getParent(), Cost, 1238 ErrorOr<uint64_t> Weight = getBlockWeight(CB->getParent()); 1956 AM->getResult<FunctionAnalysisManagerModuleProxy>(*F.getParent())
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 189 MBB.getParent()->getSubtarget().getRegisterInfo(); 205 MachineFunction &MF = *MBB.getParent(); 265 MachineFunction &MF = *MBB.getParent(); 392 unsigned CFIIndex = MBB.getParent()->addFrameInst( 403 MachineFunction &MF = *MBB.getParent();
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 74 MachineFunction &MF = *MBB.getParent(); 85 MachineFunction &MF = *MBB.getParent(); 178 MachineFunction *MF = MBB.getParent(); 421 MachineFunction *MF = MBB.getParent(); 451 MachineFunction *MF = MBB.getParent();
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVFrameLowering.cpp | 257 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 978 MachineFunction *MF = MBB.getParent(); 1014 MachineFunction *MF = MBB.getParent(); 1051 const MachineFunction *MF = MBB.getParent(); 1067 const MachineFunction *MF = MBB.getParent();
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 826 BuildMI(*MI->getParent(), InsertPoint, MI->getDebugLoc(), 940 BuildMI(*MI->getParent(), InsertPoint, MI->getDebugLoc(), 948 BuildMI(*MI->getParent(), InsertPoint, MI->getDebugLoc(), 974 MachineBasicBlock *MBB = MI->getParent(); 1001 dbgs() << format(" %bb.%3d", MI->getParent()->getNumber());
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64InstrInfo.cpp | 78 const MachineBasicBlock &MBB = *MI.getParent(); 79 const MachineFunction *MF = MBB.getParent(); 152 MachineBasicBlock::const_instr_iterator E = MI.getParent()->instr_end(); 618 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 665 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); 1183 MachineBasicBlock *MBB = Instr.getParent(); 1185 MachineFunction *MF = MBB->getParent(); 1279 if (To == To->getParent()->begin()) 1284 if (To->getParent() != From->getParent()) [all...] |