Searched refs:SMAX (Results 26 - 50 of 78) sorted by relevance

1234

/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/aarch64/
H A Dsve.s27214 SMAX Z0.B, Z0.B, #0
27216 SMAX Z1.B, Z1.B, #0
27218 SMAX Z31.B, Z31.B, #0
27220 SMAX Z2.B, Z2.B, #0
27222 SMAX Z0.B, Z0.B, #127
27224 SMAX Z0.B, Z0.B, #-128
27226 SMAX Z0.B, Z0.B, #-127
27228 SMAX Z0.B, Z0.B, #-1
27230 SMAX Z0.H, Z0.H, #0
27232 SMAX Z
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp83 case ISD::SMAX: Res = PromoteIntRes_SExtIntBinOp(N); break;
843 Result = DAG.getNode(ISD::SMAX, dl, PromotedType, Result, SatMin);
907 V = DAG.getNode(ISD::SMAX, dl, VT, V,
2150 case ISD::SMAX:
2507 case ISD::SMAX:
H A DLegalizeVectorTypes.cpp124 case ISD::SMAX:
1035 case ISD::SMAX:
3023 case ISD::SMAX:
H A DLegalizeDAG.cpp3130 case ISD::SMAX:
3137 case ISD::SMAX: Pred = ISD::SETGT; break;
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp750 setOperationAction(ISD::SMAX, VT, Expand);
/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/rs6000/
H A Drs6000-p8swap.c615 if (code != PLUS && code != SMIN && code != SMAX)
/netbsd-current/external/gpl3/gcc/dist/gcc/config/rs6000/
H A Drs6000-p8swap.cc637 if (code != PLUS && code != SMIN && code != SMAX)
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1544 {ISD::ABS, ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) {
1714 setOperationAction(ISD::SMAX, VT, Legal);
/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/ia64/
H A Dia64.c2043 if (mode == V4HImode && (code == SMIN || code == SMAX))
2074 case SMAX:
6762 case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX:
/netbsd-current/external/gpl3/gcc/dist/gcc/
H A Dsimplify-rtx.cc2265 SMIN, SMAX, UMIN or UMAX. Return zero if no simplification or
4190 case SMAX:
5060 case SMAX:
7849 ASSERT_RTX_EQ (op0, simplify_gen_binary (SMAX, mode, op0, op0));
/netbsd-current/external/gpl3/gcc/dist/gcc/config/ia64/
H A Dia64.cc2043 if (mode == V4HImode && (code == SMIN || code == SMAX))
2074 case SMAX:
6762 case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX:
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1146 setOperationAction(ISD::SMAX, VT, Custom);
1303 setOperationAction(ISD::SMAX, MVT::v1i64, Custom);
1304 setOperationAction(ISD::SMAX, MVT::v2i64, Custom);
1413 for (unsigned Opcode : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX})
1501 setOperationAction(ISD::SMAX, VT, Custom);
3804 return DAG.getNode(ISD::SMAX, dl, Op.getValueType(),
4577 case ISD::SMAX:
16722 ReplaceReductionResults(N, Results, DAG, ISD::SMAX, AArch64ISD::SMAXV);
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp406 setOperationAction(ISD::SMAX, MVT::i32, Legal);
2673 SDValue B = DAG.getNode(ISD::SMAX, DL, MVT::i32, OneSubExp, Zero);
/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/sh/
H A Dsh.c3426 case SMAX:
3430 && (GET_CODE (XEXP (x, 0)) == SMAX || GET_CODE (XEXP (x, 0)) == SMIN)
/netbsd-current/external/gpl3/gcc.old/dist/gcc/
H A Dsimplify-rtx.c2094 SMIN, SMAX, UMIN or UMAX. Return zero if no simplification or
3827 case SMAX:
4621 case SMAX:
H A Dcombine.c5966 || code == SMAX || code == SMIN || code == UMAX || code == UMIN)
6696 return simplify_gen_binary (SMAX, mode, true_rtx, false_rtx);
9652 else if (code == SMAX || code == SMIN
9659 the value of 'SMAX (x, y)' when x is not equal to y,
9661 if ((code == SMAX || code == UMAX)
H A Difcvt.c2525 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2560 op = SMAX;
/netbsd-current/external/gpl3/gcc/dist/gcc/config/sh/
H A Dsh.cc3426 case SMAX:
3430 && (GET_CODE (XEXP (x, 0)) == SMAX || GET_CODE (XEXP (x, 0)) == SMIN)
/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2421 case ISD::SMAX:
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp953 setOperationAction(ISD::SMAX, VT, VT == MVT::v8i16 ? Legal : Custom);
1137 setOperationAction(ISD::SMAX, MVT::v16i8, Legal);
1138 setOperationAction(ISD::SMAX, MVT::v4i32, Legal);
1352 setOperationAction(ISD::SMAX, MVT::v4i64, Custom);
1372 setOperationAction(ISD::SMAX, VT, HasInt256 ? Legal : Custom);
1664 setOperationAction(ISD::SMAX, VT, Legal);
1680 setOperationAction(ISD::SMAX, VT, HasBWI ? Legal : Custom);
1806 setOperationAction(ISD::SMAX, VT, Legal);
[all...]
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp2481 case ISD::SMAX:
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp205 for (auto Op : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX})
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp269 setOperationAction(ISD::SMAX, XLenVT, Legal);
468 setOperationAction(ISD::SMAX, VT, Legal);
695 setOperationAction(ISD::SMAX, VT, Custom);
2390 case ISD::SMAX:
/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/gcn/
H A Dgcn.c4196 : unspec == UNSPEC_SMAX_DPP_SHR ? SMAX
/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/xtensa/
H A Dxtensa.c3884 case SMAX:

Completed in 1299 milliseconds

1234