/netbsd-current/external/gpl3/gdb.old/dist/gas/testsuite/gas/aarch64/ |
H A D | sve.s | 27214 SMAX Z0.B, Z0.B, #0 27216 SMAX Z1.B, Z1.B, #0 27218 SMAX Z31.B, Z31.B, #0 27220 SMAX Z2.B, Z2.B, #0 27222 SMAX Z0.B, Z0.B, #127 27224 SMAX Z0.B, Z0.B, #-128 27226 SMAX Z0.B, Z0.B, #-127 27228 SMAX Z0.B, Z0.B, #-1 27230 SMAX Z0.H, Z0.H, #0 27232 SMAX Z [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 83 case ISD::SMAX: Res = PromoteIntRes_SExtIntBinOp(N); break; 843 Result = DAG.getNode(ISD::SMAX, dl, PromotedType, Result, SatMin); 907 V = DAG.getNode(ISD::SMAX, dl, VT, V, 2150 case ISD::SMAX: 2507 case ISD::SMAX:
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H A D | LegalizeVectorTypes.cpp | 124 case ISD::SMAX: 1035 case ISD::SMAX: 3023 case ISD::SMAX:
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H A D | LegalizeDAG.cpp | 3130 case ISD::SMAX: 3137 case ISD::SMAX: Pred = ISD::SETGT; break;
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 750 setOperationAction(ISD::SMAX, VT, Expand);
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/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/rs6000/ |
H A D | rs6000-p8swap.c | 615 if (code != PLUS && code != SMIN && code != SMAX)
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/netbsd-current/external/gpl3/gcc/dist/gcc/config/rs6000/ |
H A D | rs6000-p8swap.cc | 637 if (code != PLUS && code != SMIN && code != SMAX)
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1544 {ISD::ABS, ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) { 1714 setOperationAction(ISD::SMAX, VT, Legal);
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/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/ia64/ |
H A D | ia64.c | 2043 if (mode == V4HImode && (code == SMIN || code == SMAX)) 2074 case SMAX: 6762 case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX:
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/netbsd-current/external/gpl3/gcc/dist/gcc/ |
H A D | simplify-rtx.cc | 2265 SMIN, SMAX, UMIN or UMAX. Return zero if no simplification or 4190 case SMAX: 5060 case SMAX: 7849 ASSERT_RTX_EQ (op0, simplify_gen_binary (SMAX, mode, op0, op0));
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/netbsd-current/external/gpl3/gcc/dist/gcc/config/ia64/ |
H A D | ia64.cc | 2043 if (mode == V4HImode && (code == SMIN || code == SMAX)) 2074 case SMAX: 6762 case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX:
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1146 setOperationAction(ISD::SMAX, VT, Custom); 1303 setOperationAction(ISD::SMAX, MVT::v1i64, Custom); 1304 setOperationAction(ISD::SMAX, MVT::v2i64, Custom); 1413 for (unsigned Opcode : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) 1501 setOperationAction(ISD::SMAX, VT, Custom); 3804 return DAG.getNode(ISD::SMAX, dl, Op.getValueType(), 4577 case ISD::SMAX: 16722 ReplaceReductionResults(N, Results, DAG, ISD::SMAX, AArch64ISD::SMAXV);
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 406 setOperationAction(ISD::SMAX, MVT::i32, Legal); 2673 SDValue B = DAG.getNode(ISD::SMAX, DL, MVT::i32, OneSubExp, Zero);
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/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/sh/ |
H A D | sh.c | 3426 case SMAX: 3430 && (GET_CODE (XEXP (x, 0)) == SMAX || GET_CODE (XEXP (x, 0)) == SMIN)
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/netbsd-current/external/gpl3/gcc.old/dist/gcc/ |
H A D | simplify-rtx.c | 2094 SMIN, SMAX, UMIN or UMAX. Return zero if no simplification or 3827 case SMAX: 4621 case SMAX:
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H A D | combine.c | 5966 || code == SMAX || code == SMIN || code == UMAX || code == UMIN) 6696 return simplify_gen_binary (SMAX, mode, true_rtx, false_rtx); 9652 else if (code == SMAX || code == SMIN 9659 the value of 'SMAX (x, y)' when x is not equal to y, 9661 if ((code == SMAX || code == UMAX)
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H A D | ifcvt.c | 2525 they will be resolved with an SMIN/SMAX. It wouldn't be too hard 2560 op = SMAX;
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/netbsd-current/external/gpl3/gcc/dist/gcc/config/sh/ |
H A D | sh.cc | 3426 case SMAX: 3430 && (GET_CODE (XEXP (x, 0)) == SMAX || GET_CODE (XEXP (x, 0)) == SMIN)
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/netbsd-current/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 2421 case ISD::SMAX:
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 953 setOperationAction(ISD::SMAX, VT, VT == MVT::v8i16 ? Legal : Custom); 1137 setOperationAction(ISD::SMAX, MVT::v16i8, Legal); 1138 setOperationAction(ISD::SMAX, MVT::v4i32, Legal); 1352 setOperationAction(ISD::SMAX, MVT::v4i64, Custom); 1372 setOperationAction(ISD::SMAX, VT, HasInt256 ? Legal : Custom); 1664 setOperationAction(ISD::SMAX, VT, Legal); 1680 setOperationAction(ISD::SMAX, VT, HasBWI ? Legal : Custom); 1806 setOperationAction(ISD::SMAX, VT, Legal); [all...] |
/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 2481 case ISD::SMAX:
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 205 for (auto Op : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX})
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/netbsd-current/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 269 setOperationAction(ISD::SMAX, XLenVT, Legal); 468 setOperationAction(ISD::SMAX, VT, Legal); 695 setOperationAction(ISD::SMAX, VT, Custom); 2390 case ISD::SMAX:
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/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/gcn/ |
H A D | gcn.c | 4196 : unspec == UNSPEC_SMAX_DPP_SHR ? SMAX
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/netbsd-current/external/gpl3/gcc.old/dist/gcc/config/xtensa/ |
H A D | xtensa.c | 3884 case SMAX:
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