| /netbsd-current/external/gpl3/gcc.old/usr.bin/gcc/arch/mipsn64eb/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc.old/usr.bin/gcc/arch/mipsn64el/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc.old/usr.bin/gcc/arch/mipsel/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc.old/usr.bin/gcc/arch/mips64eb/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc.old/usr.bin/gcc/arch/powerpc64/ |
| H A D | insn-modes.h | 261 #define SFmode E_SFmode macro
263 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/mipsel/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/mips64eb/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/mipsn64el/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
|
| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/mipsn64eb/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/ia64/ |
| H A D | insn-modes.h | 219 #define SFmode E_SFmode macro
221 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/sparc64/ |
| H A D | insn-modes.h | 275 #define SFmode E_SFmode macro
277 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
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| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/sparc/ |
| H A D | insn-modes.h | 275 #define SFmode E_SFmode macro
277 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
|
| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/mipseb/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
|
| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/mips64el/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
|
| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/powerpc/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
|
| /netbsd-current/external/gpl3/gcc/usr.bin/gcc/arch/powerpc64/ |
| H A D | insn-modes.h | 233 #define SFmode E_SFmode macro
235 #define SFmode (scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
|
| /netbsd-current/external/gpl3/gcc/dist/gcc/config/i386/ |
| H A D | i386.h | 118 in SFmode, DFmode and XFmode */
120 in SFmode, DFmode and XFmode */
645 SFmode, DFmode and XFmode) in the current excess precision
1027 || (MODE) == SFmode)
1060 || (MODE) == SFmode || (MODE) == TFmode || (MODE) == TDmode)
1063 ((MODE) == V2SFmode || (MODE) == SFmode)
1077 ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \
1108 (TARGET_80387 && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode))
1111 ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
1122 ((MODE) == SFmode || (MOD
[all...] |
| /netbsd-current/external/gpl3/gcc/dist/gcc/config/rs6000/ |
| H A D | rs6000.cc | 2240 SFmode,
2657 DFmode/SFmode if those registers can go in both the
2701 for 64-bit scalars and 32-bit SFmode to altivec registers. */
2705 || ((msize == 8 || m2 == SFmode)
2928 /* SFmode, see if we want to use the VSX unit. */
2931 rs6000_vector_unit[SFmode] = VECTOR_VSX;
2932 rs6000_vector_align[SFmode] = 32;
2965 f - Register class to use with traditional SFmode instructions.
2975 rs6000_constraints[RS6000_CONSTRAINT_f] = FLOAT_REGS; /* SFmode */
3023 reg_addr[SFmode]
[all...] |
| /netbsd-current/external/gpl3/gcc.old/dist/gcc/config/arm/ |
| H A D | arm.c | 1162 /* FP SFmode */
1265 /* FP SFmode */
1369 /* FP SFmode */
1474 /* FP SFmode */
1577 /* FP SFmode */
1680 /* FP SFmode */
1783 /* FP SFmode */
2561 set_optab_libfunc (add_optab, SFmode, "__aeabi_fadd");
2562 set_optab_libfunc (sdiv_optab, SFmode, "__aeabi_fdiv");
2563 set_optab_libfunc (smul_optab, SFmode, "__aeabi_fmu
[all...] |
| /netbsd-current/external/gpl3/gcc.old/dist/gcc/config/rs6000/ |
| H A D | rs6000.c | 2229 SFmode,
2650 DFmode/SFmode if those registers can go in both the
2694 for 64-bit scalars and 32-bit SFmode to altivec registers. */
2698 || ((msize == 8 || m2 == SFmode)
2921 /* SFmode, see if we want to use the VSX unit. */
2924 rs6000_vector_unit[SFmode] = VECTOR_VSX;
2925 rs6000_vector_align[SFmode] = 32;
2958 f - Register class to use with traditional SFmode instructions.
2968 rs6000_constraints[RS6000_CONSTRAINT_f] = FLOAT_REGS; /* SFmode */
3016 reg_addr[SFmode]
[all...] |
| /netbsd-current/external/gpl3/gcc.old/dist/gcc/ |
| H A D | reg-stack.c | 1225 dest = FP_MODE_REG (REGNO (dest), SFmode);
1594 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
2593 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num),
2830 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode),
3194 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num);
3422 not_a_num = CONST0_RTX (SFmode);
3427 real_nan (&r, "", 1, SFmode);
3428 not_a_num = const_double_from_real_value (r, SFmode);
3429 not_a_num = force_const_mem (SFmode, not_a_num);
|
| /netbsd-current/external/gpl3/gcc/dist/gcc/ |
| H A D | reg-stack.cc | 1226 dest = FP_MODE_REG (REGNO (dest), SFmode);
1595 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
2606 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num),
2843 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode),
3205 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num);
3433 not_a_num = CONST0_RTX (SFmode);
3438 real_nan (&r, "", 1, SFmode);
3439 not_a_num = const_double_from_real_value (r, SFmode);
3440 not_a_num = force_const_mem (SFmode, not_a_num);
|
| /netbsd-current/external/gpl3/gcc.old/dist/gcc/config/i386/ |
| H A D | i386.h | 261 in SFmode, DFmode and XFmode */
263 in SFmode, DFmode and XFmode */
802 SFmode, DFmode and XFmode) in the current excess precision
1184 || (MODE) == SFmode)
1206 || (MODE) == SFmode || (MODE) == TFmode)
1209 ((MODE) == V2SFmode || (MODE) == SFmode)
1224 ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \
1247 (TARGET_80387 && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode))
1250 ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
1708 SFmode/DFmod
[all...] |
| /netbsd-current/external/gpl3/gcc.old/dist/gcc/config/sh/ |
| H A D | sh.c | 103 /* Reg weights arrays for modes SFmode and SImode, indexed by insn LUID. */
106 /* Total SFmode and SImode weights of scheduled insns. */
415 and SFmode regs required by already scheduled insns. When these counts
427 and SFmode weights of insns of basic blocks; much similar to what
435 TARGET_SCHED_REORDER: If the register pressure for SImode or SFmode is
3349 /* mems for SFmode and DFmode can be inside a parallel due to
4796 CONST_DOUBLE input value is CONST_OK_FOR_I08. For a SFmode move, we don't
6864 x = gen_push_e (gen_rtx_REG (SFmode, rn));
6890 x = gen_pop_e (gen_rtx_REG (SFmode, rn));
7417 /* First unnamed SFmode floa
[all...] |
| /netbsd-current/external/gpl3/gcc/dist/gcc/config/sh/ |
| H A D | sh.cc | 103 /* Reg weights arrays for modes SFmode and SImode, indexed by insn LUID. */
106 /* Total SFmode and SImode weights of scheduled insns. */
415 and SFmode regs required by already scheduled insns. When these counts
427 and SFmode weights of insns of basic blocks; much similar to what
435 TARGET_SCHED_REORDER: If the register pressure for SImode or SFmode is
3349 /* mems for SFmode and DFmode can be inside a parallel due to
4796 CONST_DOUBLE input value is CONST_OK_FOR_I08. For a SFmode move, we don't
6864 x = gen_push_e (gen_rtx_REG (SFmode, rn));
6890 x = gen_pop_e (gen_rtx_REG (SFmode, rn));
7417 /* First unnamed SFmode floa
[all...] |