1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992-2020 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it 7 under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20/* This pass converts stack-like registers from the "flat register 21 file" model that gcc uses, to a stack convention that the 387 uses. 22 23 * The form of the input: 24 25 On input, the function consists of insn that have had their 26 registers fully allocated to a set of "virtual" registers. Note that 27 the word "virtual" is used differently here than elsewhere in gcc: for 28 each virtual stack reg, there is a hard reg, but the mapping between 29 them is not known until this pass is run. On output, hard register 30 numbers have been substituted, and various pop and exchange insns have 31 been emitted. The hard register numbers and the virtual register 32 numbers completely overlap - before this pass, all stack register 33 numbers are virtual, and afterward they are all hard. 34 35 The virtual registers can be manipulated normally by gcc, and their 36 semantics are the same as for normal registers. After the hard 37 register numbers are substituted, the semantics of an insn containing 38 stack-like regs are not the same as for an insn with normal regs: for 39 instance, it is not safe to delete an insn that appears to be a no-op 40 move. In general, no insn containing hard regs should be changed 41 after this pass is done. 42 43 * The form of the output: 44 45 After this pass, hard register numbers represent the distance from 46 the current top of stack to the desired register. A reference to 47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 48 represents the register just below that, and so forth. Also, REG_DEAD 49 notes indicate whether or not a stack register should be popped. 50 51 A "swap" insn looks like a parallel of two patterns, where each 52 pattern is a SET: one sets A to B, the other B to A. 53 54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 56 will replace the existing stack top, not push a new value. 57 58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 59 SET_SRC is REG or MEM. 60 61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 62 appears ambiguous. As a special case, the presence of a REG_DEAD note 63 for FIRST_STACK_REG differentiates between a load insn and a pop. 64 65 If a REG_DEAD is present, the insn represents a "pop" that discards 66 the top of the register stack. If there is no REG_DEAD note, then the 67 insn represents a "dup" or a push of the current top of stack onto the 68 stack. 69 70 * Methodology: 71 72 Existing REG_DEAD and REG_UNUSED notes for stack registers are 73 deleted and recreated from scratch. REG_DEAD is never created for a 74 SET_DEST, only REG_UNUSED. 75 76 * asm_operands: 77 78 There are several rules on the usage of stack-like regs in 79 asm_operands insns. These rules apply only to the operands that are 80 stack-like regs: 81 82 1. Given a set of input regs that die in an asm_operands, it is 83 necessary to know which are implicitly popped by the asm, and 84 which must be explicitly popped by gcc. 85 86 An input reg that is implicitly popped by the asm must be 87 explicitly clobbered, unless it is constrained to match an 88 output operand. 89 90 2. For any input reg that is implicitly popped by an asm, it is 91 necessary to know how to adjust the stack to compensate for the pop. 92 If any non-popped input is closer to the top of the reg-stack than 93 the implicitly popped reg, it would not be possible to know what the 94 stack looked like - it's not clear how the rest of the stack "slides 95 up". 96 97 All implicitly popped input regs must be closer to the top of 98 the reg-stack than any input that is not implicitly popped. 99 100 All explicitly referenced input operands may not "skip" a reg. 101 Otherwise we can have holes in the stack. 102 103 3. It is possible that if an input dies in an insn, reload might 104 use the input reg for an output reload. Consider this example: 105 106 asm ("foo" : "=t" (a) : "f" (b)); 107 108 This asm says that input B is not popped by the asm, and that 109 the asm pushes a result onto the reg-stack, i.e., the stack is one 110 deeper after the asm than it was before. But, it is possible that 111 reload will think that it can use the same reg for both the input and 112 the output, if input B dies in this insn. 113 114 If any input operand uses the "f" constraint, all output reg 115 constraints must use the "&" earlyclobber. 116 117 The asm above would be written as 118 119 asm ("foo" : "=&t" (a) : "f" (b)); 120 121 4. Some operands need to be in particular places on the stack. All 122 output operands fall in this category - there is no other way to 123 know which regs the outputs appear in unless the user indicates 124 this in the constraints. 125 126 Output operands must specifically indicate which reg an output 127 appears in after an asm. "=f" is not allowed: the operand 128 constraints must select a class with a single reg. 129 130 5. Output operands may not be "inserted" between existing stack regs. 131 Since no 387 opcode uses a read/write operand, all output operands 132 are dead before the asm_operands, and are pushed by the asm_operands. 133 It makes no sense to push anywhere but the top of the reg-stack. 134 135 Output operands must start at the top of the reg-stack: output 136 operands may not "skip" a reg. 137 138 6. Some asm statements may need extra stack space for internal 139 calculations. This can be guaranteed by clobbering stack registers 140 unrelated to the inputs and outputs. 141 142 Here are a couple of reasonable asms to want to write. This asm 143 takes one input, which is internally popped, and produces two outputs. 144 145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 146 147 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 148 and replaces them with one output. The user must code the "st(1)" 149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 150 151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 152 153*/ 154 155#include "config.h" 156#include "system.h" 157#include "coretypes.h" 158#include "backend.h" 159#include "target.h" 160#include "rtl.h" 161#include "tree.h" 162#include "df.h" 163#include "insn-config.h" 164#include "memmodel.h" 165#include "regs.h" 166#include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ 167#include "recog.h" 168#include "varasm.h" 169#include "rtl-error.h" 170#include "cfgrtl.h" 171#include "cfganal.h" 172#include "cfgbuild.h" 173#include "cfgcleanup.h" 174#include "reload.h" 175#include "tree-pass.h" 176#include "rtl-iter.h" 177 178#ifdef STACK_REGS 179 180/* We use this array to cache info about insns, because otherwise we 181 spend too much time in stack_regs_mentioned_p. 182 183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 184 the insn uses stack registers, two indicates the insn does not use 185 stack registers. */ 186static vec<char> stack_regs_mentioned_data; 187 188#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 189 190int regstack_completed = 0; 191 192/* This is the basic stack record. TOP is an index into REG[] such 193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 194 195 If TOP is -2, REG[] is not yet initialized. Stack initialization 196 consists of placing each live reg in array `reg' and setting `top' 197 appropriately. 198 199 REG_SET indicates which registers are live. */ 200 201typedef struct stack_def 202{ 203 int top; /* index to top stack element */ 204 HARD_REG_SET reg_set; /* set of live registers */ 205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 206} *stack_ptr; 207 208/* This is used to carry information about basic blocks. It is 209 attached to the AUX field of the standard CFG block. */ 210 211typedef struct block_info_def 212{ 213 struct stack_def stack_in; /* Input stack configuration. */ 214 struct stack_def stack_out; /* Output stack configuration. */ 215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 216 int done; /* True if block already converted. */ 217 int predecessors; /* Number of predecessors that need 218 to be visited. */ 219} *block_info; 220 221#define BLOCK_INFO(B) ((block_info) (B)->aux) 222 223/* Passed to change_stack to indicate where to emit insns. */ 224enum emit_where 225{ 226 EMIT_AFTER, 227 EMIT_BEFORE 228}; 229 230/* The block we're currently working on. */ 231static basic_block current_block; 232 233/* In the current_block, whether we're processing the first register 234 stack or call instruction, i.e. the regstack is currently the 235 same as BLOCK_INFO(current_block)->stack_in. */ 236static bool starting_stack_p; 237 238/* This is the register file for all register after conversion. */ 239static rtx 240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 241 242#define FP_MODE_REG(regno,mode) \ 243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 244 245/* Used to initialize uninitialized registers. */ 246static rtx not_a_num; 247 248/* Forward declarations */ 249 250static int stack_regs_mentioned_p (const_rtx pat); 251static void pop_stack (stack_ptr, int); 252static rtx *get_true_reg (rtx *); 253 254static int check_asm_stack_operands (rtx_insn *); 255static void get_asm_operands_in_out (rtx, int *, int *); 256static rtx stack_result (tree); 257static void replace_reg (rtx *, int); 258static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int); 259static int get_hard_regnum (stack_ptr, rtx); 260static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where); 261static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx); 262static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx); 263static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx); 264static int swap_rtx_condition_1 (rtx); 265static int swap_rtx_condition (rtx_insn *, int &); 266static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx, bool); 267static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx); 268static void subst_asm_stack_regs (rtx_insn *, stack_ptr); 269static bool subst_stack_regs (rtx_insn *, stack_ptr); 270static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where); 271static void print_stack (FILE *, stack_ptr); 272static rtx_insn *next_flags_user (rtx_insn *, int &); 273 274/* Return nonzero if any stack register is mentioned somewhere within PAT. */ 275 276static int 277stack_regs_mentioned_p (const_rtx pat) 278{ 279 const char *fmt; 280 int i; 281 282 if (STACK_REG_P (pat)) 283 return 1; 284 285 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 287 { 288 if (fmt[i] == 'E') 289 { 290 int j; 291 292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 294 return 1; 295 } 296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 297 return 1; 298 } 299 300 return 0; 301} 302 303/* Return nonzero if INSN mentions stacked registers, else return zero. */ 304 305int 306stack_regs_mentioned (const_rtx insn) 307{ 308 unsigned int uid, max; 309 int test; 310 311 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ()) 312 return 0; 313 314 uid = INSN_UID (insn); 315 max = stack_regs_mentioned_data.length (); 316 if (uid >= max) 317 { 318 /* Allocate some extra size to avoid too many reallocs, but 319 do not grow too quickly. */ 320 max = uid + uid / 20 + 1; 321 stack_regs_mentioned_data.safe_grow_cleared (max); 322 } 323 324 test = stack_regs_mentioned_data[uid]; 325 if (test == 0) 326 { 327 /* This insn has yet to be examined. Do so now. */ 328 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 329 stack_regs_mentioned_data[uid] = test; 330 } 331 332 return test == 1; 333} 334 335static rtx ix86_flags_rtx; 336 337static rtx_insn * 338next_flags_user (rtx_insn *insn, int &debug_seen) 339{ 340 /* Search forward looking for the first use of this value. 341 Stop at block boundaries. */ 342 343 while (insn != BB_END (current_block)) 344 { 345 insn = NEXT_INSN (insn); 346 347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 348 { 349 if (DEBUG_INSN_P (insn) && debug_seen >= 0) 350 { 351 debug_seen = 1; 352 continue; 353 } 354 return insn; 355 } 356 357 if (CALL_P (insn)) 358 return NULL; 359 } 360 return NULL; 361} 362 363/* Reorganize the stack into ascending numbers, before this insn. */ 364 365static void 366straighten_stack (rtx_insn *insn, stack_ptr regstack) 367{ 368 struct stack_def temp_stack; 369 int top; 370 371 /* If there is only a single register on the stack, then the stack is 372 already in increasing order and no reorganization is needed. 373 374 Similarly if the stack is empty. */ 375 if (regstack->top <= 0) 376 return; 377 378 temp_stack.reg_set = regstack->reg_set; 379 380 for (top = temp_stack.top = regstack->top; top >= 0; top--) 381 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 382 383 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 384} 385 386/* Pop a register from the stack. */ 387 388static void 389pop_stack (stack_ptr regstack, int regno) 390{ 391 int top = regstack->top; 392 393 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 394 regstack->top--; 395 /* If regno was not at the top of stack then adjust stack. */ 396 if (regstack->reg [top] != regno) 397 { 398 int i; 399 for (i = regstack->top; i >= 0; i--) 400 if (regstack->reg [i] == regno) 401 { 402 int j; 403 for (j = i; j < top; j++) 404 regstack->reg [j] = regstack->reg [j + 1]; 405 break; 406 } 407 } 408} 409 410/* Return a pointer to the REG expression within PAT. If PAT is not a 411 REG, possible enclosed by a conversion rtx, return the inner part of 412 PAT that stopped the search. */ 413 414static rtx * 415get_true_reg (rtx *pat) 416{ 417 for (;;) 418 switch (GET_CODE (*pat)) 419 { 420 case SUBREG: 421 /* Eliminate FP subregister accesses in favor of the 422 actual FP register in use. */ 423 { 424 rtx subreg = SUBREG_REG (*pat); 425 426 if (STACK_REG_P (subreg)) 427 { 428 int regno_off = subreg_regno_offset (REGNO (subreg), 429 GET_MODE (subreg), 430 SUBREG_BYTE (*pat), 431 GET_MODE (*pat)); 432 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 433 GET_MODE (subreg)); 434 return pat; 435 } 436 pat = &XEXP (*pat, 0); 437 break; 438 } 439 440 case FLOAT_TRUNCATE: 441 if (!flag_unsafe_math_optimizations) 442 return pat; 443 /* FALLTHRU */ 444 445 case FLOAT: 446 case FIX: 447 case FLOAT_EXTEND: 448 pat = &XEXP (*pat, 0); 449 break; 450 451 case UNSPEC: 452 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP 453 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC) 454 pat = &XVECEXP (*pat, 0, 0); 455 return pat; 456 457 default: 458 return pat; 459 } 460} 461 462/* Set if we find any malformed asms in a block. */ 463static bool any_malformed_asm; 464 465/* There are many rules that an asm statement for stack-like regs must 466 follow. Those rules are explained at the top of this file: the rule 467 numbers below refer to that explanation. */ 468 469static int 470check_asm_stack_operands (rtx_insn *insn) 471{ 472 int i; 473 int n_clobbers; 474 int malformed_asm = 0; 475 rtx body = PATTERN (insn); 476 477 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 478 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 479 char explicitly_used[FIRST_PSEUDO_REGISTER]; 480 481 rtx *clobber_reg = 0; 482 int n_inputs, n_outputs; 483 484 /* Find out what the constraints require. If no constraint 485 alternative matches, this asm is malformed. */ 486 extract_constrain_insn (insn); 487 488 preprocess_constraints (insn); 489 490 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 491 492 if (which_alternative < 0) 493 { 494 /* Avoid further trouble with this insn. */ 495 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 496 return 0; 497 } 498 const operand_alternative *op_alt = which_op_alt (); 499 500 /* Strip SUBREGs here to make the following code simpler. */ 501 for (i = 0; i < recog_data.n_operands; i++) 502 if (GET_CODE (recog_data.operand[i]) == SUBREG 503 && REG_P (SUBREG_REG (recog_data.operand[i]))) 504 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 505 506 /* Set up CLOBBER_REG. */ 507 508 n_clobbers = 0; 509 510 if (GET_CODE (body) == PARALLEL) 511 { 512 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 513 514 for (i = 0; i < XVECLEN (body, 0); i++) 515 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 516 { 517 rtx clobber = XVECEXP (body, 0, i); 518 rtx reg = XEXP (clobber, 0); 519 520 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 521 reg = SUBREG_REG (reg); 522 523 if (STACK_REG_P (reg)) 524 { 525 clobber_reg[n_clobbers] = reg; 526 n_clobbers++; 527 } 528 } 529 } 530 531 /* Enforce rule #4: Output operands must specifically indicate which 532 reg an output appears in after an asm. "=f" is not allowed: the 533 operand constraints must select a class with a single reg. 534 535 Also enforce rule #5: Output operands must start at the top of 536 the reg-stack: output operands may not "skip" a reg. */ 537 538 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 539 for (i = 0; i < n_outputs; i++) 540 if (STACK_REG_P (recog_data.operand[i])) 541 { 542 if (reg_class_size[(int) op_alt[i].cl] != 1) 543 { 544 error_for_asm (insn, "output constraint %d must specify a single register", i); 545 malformed_asm = 1; 546 } 547 else 548 { 549 int j; 550 551 for (j = 0; j < n_clobbers; j++) 552 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 553 { 554 error_for_asm (insn, "output constraint %d cannot be " 555 "specified together with %qs clobber", 556 i, reg_names [REGNO (clobber_reg[j])]); 557 malformed_asm = 1; 558 break; 559 } 560 if (j == n_clobbers) 561 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 562 } 563 } 564 565 566 /* Search for first non-popped reg. */ 567 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 568 if (! reg_used_as_output[i]) 569 break; 570 571 /* If there are any other popped regs, that's an error. */ 572 for (; i < LAST_STACK_REG + 1; i++) 573 if (reg_used_as_output[i]) 574 break; 575 576 if (i != LAST_STACK_REG + 1) 577 { 578 error_for_asm (insn, "output registers must be grouped at top of stack"); 579 malformed_asm = 1; 580 } 581 582 /* Enforce rule #2: All implicitly popped input regs must be closer 583 to the top of the reg-stack than any input that is not implicitly 584 popped. */ 585 586 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 587 memset (explicitly_used, 0, sizeof (explicitly_used)); 588 for (i = n_outputs; i < n_outputs + n_inputs; i++) 589 if (STACK_REG_P (recog_data.operand[i])) 590 { 591 /* An input reg is implicitly popped if it is tied to an 592 output, or if there is a CLOBBER for it. */ 593 int j; 594 595 for (j = 0; j < n_clobbers; j++) 596 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 597 break; 598 599 if (j < n_clobbers || op_alt[i].matches >= 0) 600 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 601 else if (reg_class_size[(int) op_alt[i].cl] == 1) 602 explicitly_used[REGNO (recog_data.operand[i])] = 1; 603 } 604 605 /* Search for first non-popped reg. */ 606 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 607 if (! implicitly_dies[i]) 608 break; 609 610 /* If there are any other popped regs, that's an error. */ 611 for (; i < LAST_STACK_REG + 1; i++) 612 if (implicitly_dies[i]) 613 break; 614 615 if (i != LAST_STACK_REG + 1) 616 { 617 error_for_asm (insn, 618 "implicitly popped registers must be grouped " 619 "at top of stack"); 620 malformed_asm = 1; 621 } 622 623 /* Search for first not-explicitly used reg. */ 624 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 625 if (! implicitly_dies[i] && ! explicitly_used[i]) 626 break; 627 628 /* If there are any other explicitly used regs, that's an error. */ 629 for (; i < LAST_STACK_REG + 1; i++) 630 if (explicitly_used[i]) 631 break; 632 633 if (i != LAST_STACK_REG + 1) 634 { 635 error_for_asm (insn, 636 "explicitly used registers must be grouped " 637 "at top of stack"); 638 malformed_asm = 1; 639 } 640 641 /* Enforce rule #3: If any input operand uses the "f" constraint, all 642 output constraints must use the "&" earlyclobber. 643 644 ??? Detect this more deterministically by having constrain_asm_operands 645 record any earlyclobber. */ 646 647 for (i = n_outputs; i < n_outputs + n_inputs; i++) 648 if (STACK_REG_P (recog_data.operand[i]) && op_alt[i].matches == -1) 649 { 650 int j; 651 652 for (j = 0; j < n_outputs; j++) 653 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 654 { 655 error_for_asm (insn, 656 "output operand %d must use %<&%> constraint", j); 657 malformed_asm = 1; 658 } 659 } 660 661 if (malformed_asm) 662 { 663 /* Avoid further trouble with this insn. */ 664 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 665 any_malformed_asm = true; 666 return 0; 667 } 668 669 return 1; 670} 671 672/* Calculate the number of inputs and outputs in BODY, an 673 asm_operands. N_OPERANDS is the total number of operands, and 674 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 675 placed. */ 676 677static void 678get_asm_operands_in_out (rtx body, int *pout, int *pin) 679{ 680 rtx asmop = extract_asm_operands (body); 681 682 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); 683 *pout = (recog_data.n_operands 684 - ASM_OPERANDS_INPUT_LENGTH (asmop) 685 - ASM_OPERANDS_LABEL_LENGTH (asmop)); 686} 687 688/* If current function returns its result in an fp stack register, 689 return the REG. Otherwise, return 0. */ 690 691static rtx 692stack_result (tree decl) 693{ 694 rtx result; 695 696 /* If the value is supposed to be returned in memory, then clearly 697 it is not returned in a stack register. */ 698 if (aggregate_value_p (DECL_RESULT (decl), decl)) 699 return 0; 700 701 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 702 if (result != 0) 703 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 704 decl, true); 705 706 return result != 0 && STACK_REG_P (result) ? result : 0; 707} 708 709 710/* 711 * This section deals with stack register substitution, and forms the second 712 * pass over the RTL. 713 */ 714 715/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 716 the desired hard REGNO. */ 717 718static void 719replace_reg (rtx *reg, int regno) 720{ 721 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); 722 gcc_assert (STACK_REG_P (*reg)); 723 724 gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT 725 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 726 727 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 728} 729 730/* Remove a note of type NOTE, which must be found, for register 731 number REGNO from INSN. Remove only one such note. */ 732 733static void 734remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno) 735{ 736 rtx *note_link, this_rtx; 737 738 note_link = ®_NOTES (insn); 739 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) 740 if (REG_NOTE_KIND (this_rtx) == note 741 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) 742 { 743 *note_link = XEXP (this_rtx, 1); 744 return; 745 } 746 else 747 note_link = &XEXP (this_rtx, 1); 748 749 gcc_unreachable (); 750} 751 752/* Find the hard register number of virtual register REG in REGSTACK. 753 The hard register number is relative to the top of the stack. -1 is 754 returned if the register is not found. */ 755 756static int 757get_hard_regnum (stack_ptr regstack, rtx reg) 758{ 759 int i; 760 761 gcc_assert (STACK_REG_P (reg)); 762 763 for (i = regstack->top; i >= 0; i--) 764 if (regstack->reg[i] == REGNO (reg)) 765 break; 766 767 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 768} 769 770/* Emit an insn to pop virtual register REG before or after INSN. 771 REGSTACK is the stack state after INSN and is updated to reflect this 772 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 773 is represented as a SET whose destination is the register to be popped 774 and source is the top of stack. A death note for the top of stack 775 cases the movdf pattern to pop. */ 776 777static rtx_insn * 778emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, 779 enum emit_where where) 780{ 781 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; 782 rtx_insn *pop_insn; 783 rtx pop_rtx; 784 int hard_regno; 785 786 /* For complex types take care to pop both halves. These may survive in 787 CLOBBER and USE expressions. */ 788 if (COMPLEX_MODE_P (GET_MODE (reg))) 789 { 790 rtx reg1 = FP_MODE_REG (REGNO (reg), raw_mode); 791 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, raw_mode); 792 793 pop_insn = NULL; 794 if (get_hard_regnum (regstack, reg1) >= 0) 795 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 796 if (get_hard_regnum (regstack, reg2) >= 0) 797 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 798 gcc_assert (pop_insn); 799 return pop_insn; 800 } 801 802 hard_regno = get_hard_regnum (regstack, reg); 803 804 gcc_assert (hard_regno >= FIRST_STACK_REG); 805 806 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, raw_mode), 807 FP_MODE_REG (FIRST_STACK_REG, raw_mode)); 808 809 if (where == EMIT_AFTER) 810 pop_insn = emit_insn_after (pop_rtx, insn); 811 else 812 pop_insn = emit_insn_before (pop_rtx, insn); 813 814 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, raw_mode)); 815 816 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 817 = regstack->reg[regstack->top]; 818 regstack->top -= 1; 819 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 820 821 return pop_insn; 822} 823 824/* Emit an insn before or after INSN to swap virtual register REG with 825 the top of stack. REGSTACK is the stack state before the swap, and 826 is updated to reflect the swap. A swap insn is represented as a 827 PARALLEL of two patterns: each pattern moves one reg to the other. 828 829 If REG is already at the top of the stack, no insn is emitted. */ 830 831static void 832emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg) 833{ 834 int hard_regno; 835 int other_reg; /* swap regno temps */ 836 rtx_insn *i1; /* the stack-reg insn prior to INSN */ 837 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 838 839 hard_regno = get_hard_regnum (regstack, reg); 840 841 if (hard_regno == FIRST_STACK_REG) 842 return; 843 if (hard_regno == -1) 844 { 845 /* Something failed if the register wasn't on the stack. If we had 846 malformed asms, we zapped the instruction itself, but that didn't 847 produce the same pattern of register sets as before. To prevent 848 further failure, adjust REGSTACK to include REG at TOP. */ 849 gcc_assert (any_malformed_asm); 850 regstack->reg[++regstack->top] = REGNO (reg); 851 return; 852 } 853 gcc_assert (hard_regno >= FIRST_STACK_REG); 854 855 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 856 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]); 857 858 /* Find the previous insn involving stack regs, but don't pass a 859 block boundary. */ 860 i1 = NULL; 861 if (current_block && insn != BB_HEAD (current_block)) 862 { 863 rtx_insn *tmp = PREV_INSN (insn); 864 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 865 while (tmp != limit) 866 { 867 if (LABEL_P (tmp) 868 || CALL_P (tmp) 869 || NOTE_INSN_BASIC_BLOCK_P (tmp) 870 || (NONJUMP_INSN_P (tmp) 871 && stack_regs_mentioned (tmp))) 872 { 873 i1 = tmp; 874 break; 875 } 876 tmp = PREV_INSN (tmp); 877 } 878 } 879 880 if (i1 != NULL_RTX 881 && (i1set = single_set (i1)) != NULL_RTX) 882 { 883 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 884 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 885 886 /* If the previous register stack push was from the reg we are to 887 swap with, omit the swap. */ 888 889 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 890 && REG_P (i1src) 891 && REGNO (i1src) == (unsigned) hard_regno - 1 892 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 893 return; 894 895 /* If the previous insn wrote to the reg we are to swap with, 896 omit the swap. */ 897 898 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 899 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 900 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 901 return; 902 903 /* Instead of 904 fld a 905 fld b 906 fxch %st(1) 907 just use 908 fld b 909 fld a 910 if possible. Similarly for fld1, fldz, fldpi etc. instead of any 911 of the loads or for float extension from memory. */ 912 913 i1src = SET_SRC (i1set); 914 if (GET_CODE (i1src) == FLOAT_EXTEND) 915 i1src = XEXP (i1src, 0); 916 if (REG_P (i1dest) 917 && REGNO (i1dest) == FIRST_STACK_REG 918 && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE) 919 && !side_effects_p (i1src) 920 && hard_regno == FIRST_STACK_REG + 1 921 && i1 != BB_HEAD (current_block)) 922 { 923 /* i1 is the last insn that involves stack regs before insn, and 924 is known to be a load without other side-effects, i.e. fld b 925 in the above comment. */ 926 rtx_insn *i2 = NULL; 927 rtx i2set; 928 rtx_insn *tmp = PREV_INSN (i1); 929 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block)); 930 /* Find the previous insn involving stack regs, but don't pass a 931 block boundary. */ 932 while (tmp != limit) 933 { 934 if (LABEL_P (tmp) 935 || CALL_P (tmp) 936 || NOTE_INSN_BASIC_BLOCK_P (tmp) 937 || (NONJUMP_INSN_P (tmp) 938 && stack_regs_mentioned (tmp))) 939 { 940 i2 = tmp; 941 break; 942 } 943 tmp = PREV_INSN (tmp); 944 } 945 if (i2 != NULL_RTX 946 && (i2set = single_set (i2)) != NULL_RTX) 947 { 948 rtx i2dest = *get_true_reg (&SET_DEST (i2set)); 949 rtx i2src = SET_SRC (i2set); 950 if (GET_CODE (i2src) == FLOAT_EXTEND) 951 i2src = XEXP (i2src, 0); 952 /* If the last two insns before insn that involve 953 stack regs are loads, where the latter (i1) 954 pushes onto the register stack and thus 955 moves the value from the first load (i2) from 956 %st to %st(1), consider swapping them. */ 957 if (REG_P (i2dest) 958 && REGNO (i2dest) == FIRST_STACK_REG 959 && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE) 960 /* Ensure i2 doesn't have other side-effects. */ 961 && !side_effects_p (i2src) 962 /* And that the two instructions can actually be 963 swapped, i.e. there shouldn't be any stores 964 in between i2 and i1 that might alias with 965 the i1 memory, and the memory address can't 966 use registers set in between i2 and i1. */ 967 && !modified_between_p (SET_SRC (i1set), i2, i1)) 968 { 969 /* Move i1 (fld b above) right before i2 (fld a 970 above. */ 971 remove_insn (i1); 972 SET_PREV_INSN (i1) = NULL_RTX; 973 SET_NEXT_INSN (i1) = NULL_RTX; 974 set_block_for_insn (i1, NULL); 975 emit_insn_before (i1, i2); 976 return; 977 } 978 } 979 } 980 } 981 982 /* Avoid emitting the swap if this is the first register stack insn 983 of the current_block. Instead update the current_block's stack_in 984 and let compensate edges take care of this for us. */ 985 if (current_block && starting_stack_p) 986 { 987 BLOCK_INFO (current_block)->stack_in = *regstack; 988 starting_stack_p = false; 989 return; 990 } 991 992 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; 993 rtx op1 = FP_MODE_REG (hard_regno, raw_mode); 994 rtx op2 = FP_MODE_REG (FIRST_STACK_REG, raw_mode); 995 rtx swap_rtx 996 = gen_rtx_PARALLEL (VOIDmode, 997 gen_rtvec (2, gen_rtx_SET (op1, op2), 998 gen_rtx_SET (op2, op1))); 999 if (i1) 1000 emit_insn_after (swap_rtx, i1); 1001 else if (current_block) 1002 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 1003 else 1004 emit_insn_before (swap_rtx, insn); 1005} 1006 1007/* Emit an insns before INSN to swap virtual register SRC1 with 1008 the top of stack and virtual register SRC2 with second stack 1009 slot. REGSTACK is the stack state before the swaps, and 1010 is updated to reflect the swaps. A swap insn is represented as a 1011 PARALLEL of two patterns: each pattern moves one reg to the other. 1012 1013 If SRC1 and/or SRC2 are already at the right place, no swap insn 1014 is emitted. */ 1015 1016static void 1017swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2) 1018{ 1019 struct stack_def temp_stack; 1020 int regno, j, k; 1021 1022 temp_stack = *regstack; 1023 1024 /* Place operand 1 at the top of stack. */ 1025 regno = get_hard_regnum (&temp_stack, src1); 1026 gcc_assert (regno >= 0); 1027 if (regno != FIRST_STACK_REG) 1028 { 1029 k = temp_stack.top - (regno - FIRST_STACK_REG); 1030 j = temp_stack.top; 1031 1032 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1033 } 1034 1035 /* Place operand 2 next on the stack. */ 1036 regno = get_hard_regnum (&temp_stack, src2); 1037 gcc_assert (regno >= 0); 1038 if (regno != FIRST_STACK_REG + 1) 1039 { 1040 k = temp_stack.top - (regno - FIRST_STACK_REG); 1041 j = temp_stack.top - 1; 1042 1043 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 1044 } 1045 1046 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 1047} 1048 1049/* Handle a move to or from a stack register in PAT, which is in INSN. 1050 REGSTACK is the current stack. Return whether a control flow insn 1051 was deleted in the process. */ 1052 1053static bool 1054move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat) 1055{ 1056 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1057 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1058 rtx src, dest; 1059 rtx note; 1060 bool control_flow_insn_deleted = false; 1061 1062 src = *psrc; dest = *pdest; 1063 1064 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1065 { 1066 /* Write from one stack reg to another. If SRC dies here, then 1067 just change the register mapping and delete the insn. */ 1068 1069 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1070 if (note) 1071 { 1072 int i; 1073 1074 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1075 gcc_assert (REGNO (src) != REGNO (dest)); 1076 1077 for (i = regstack->top; i >= 0; i--) 1078 if (regstack->reg[i] == REGNO (src)) 1079 break; 1080 1081 /* The destination must be dead, or life analysis is borked. */ 1082 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1083 1084 /* If the source is not live, this is yet another case of 1085 uninitialized variables. Load up a NaN instead. */ 1086 if (i < 0) 1087 return move_nan_for_stack_reg (insn, regstack, dest); 1088 1089 /* It is possible that the dest is unused after this insn. 1090 If so, just pop the src. */ 1091 1092 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1093 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1094 else 1095 { 1096 regstack->reg[i] = REGNO (dest); 1097 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1098 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1099 } 1100 1101 control_flow_insn_deleted |= control_flow_insn_p (insn); 1102 delete_insn (insn); 1103 return control_flow_insn_deleted; 1104 } 1105 1106 /* The source reg does not die. */ 1107 1108 /* If this appears to be a no-op move, delete it, or else it 1109 will confuse the machine description output patterns. But if 1110 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1111 for REG_UNUSED will not work for deleted insns. */ 1112 1113 if (REGNO (src) == REGNO (dest)) 1114 { 1115 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1116 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1117 1118 control_flow_insn_deleted |= control_flow_insn_p (insn); 1119 delete_insn (insn); 1120 return control_flow_insn_deleted; 1121 } 1122 1123 /* The destination ought to be dead. */ 1124 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1125 gcc_assert (any_malformed_asm); 1126 else 1127 { 1128 replace_reg (psrc, get_hard_regnum (regstack, src)); 1129 1130 regstack->reg[++regstack->top] = REGNO (dest); 1131 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1132 replace_reg (pdest, FIRST_STACK_REG); 1133 } 1134 } 1135 else if (STACK_REG_P (src)) 1136 { 1137 /* Save from a stack reg to MEM, or possibly integer reg. Since 1138 only top of stack may be saved, emit an exchange first if 1139 needs be. */ 1140 1141 emit_swap_insn (insn, regstack, src); 1142 1143 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1144 if (note) 1145 { 1146 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1147 regstack->top--; 1148 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1149 } 1150 else if ((GET_MODE (src) == XFmode) 1151 && regstack->top < REG_STACK_SIZE - 1) 1152 { 1153 /* A 387 cannot write an XFmode value to a MEM without 1154 clobbering the source reg. The output code can handle 1155 this by reading back the value from the MEM. 1156 But it is more efficient to use a temp register if one is 1157 available. Push the source value here if the register 1158 stack is not full, and then write the value to memory via 1159 a pop. */ 1160 rtx push_rtx; 1161 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1162 1163 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1164 emit_insn_before (push_rtx, insn); 1165 add_reg_note (insn, REG_DEAD, top_stack_reg); 1166 } 1167 1168 replace_reg (psrc, FIRST_STACK_REG); 1169 } 1170 else 1171 { 1172 rtx pat = PATTERN (insn); 1173 1174 gcc_assert (STACK_REG_P (dest)); 1175 1176 /* Load from MEM, or possibly integer REG or constant, into the 1177 stack regs. The actual target is always the top of the 1178 stack. The stack mapping is changed to reflect that DEST is 1179 now at top of stack. */ 1180 1181 /* The destination ought to be dead. However, there is a 1182 special case with i387 UNSPEC_TAN, where destination is live 1183 (an argument to fptan) but inherent load of 1.0 is modelled 1184 as a load from a constant. */ 1185 if (GET_CODE (pat) == PARALLEL 1186 && XVECLEN (pat, 0) == 2 1187 && GET_CODE (XVECEXP (pat, 0, 1)) == SET 1188 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC 1189 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) 1190 emit_swap_insn (insn, regstack, dest); 1191 else 1192 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG 1193 || any_malformed_asm); 1194 1195 gcc_assert (regstack->top < REG_STACK_SIZE); 1196 1197 regstack->reg[++regstack->top] = REGNO (dest); 1198 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1199 replace_reg (pdest, FIRST_STACK_REG); 1200 } 1201 1202 return control_flow_insn_deleted; 1203} 1204 1205/* A helper function which replaces INSN with a pattern that loads up 1206 a NaN into DEST, then invokes move_for_stack_reg. */ 1207 1208static bool 1209move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest) 1210{ 1211 rtx pat; 1212 1213 dest = FP_MODE_REG (REGNO (dest), SFmode); 1214 pat = gen_rtx_SET (dest, not_a_num); 1215 PATTERN (insn) = pat; 1216 INSN_CODE (insn) = -1; 1217 1218 return move_for_stack_reg (insn, regstack, pat); 1219} 1220 1221/* Swap the condition on a branch, if there is one. Return true if we 1222 found a condition to swap. False if the condition was not used as 1223 such. */ 1224 1225static int 1226swap_rtx_condition_1 (rtx pat) 1227{ 1228 const char *fmt; 1229 int i, r = 0; 1230 1231 if (COMPARISON_P (pat)) 1232 { 1233 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1234 r = 1; 1235 } 1236 else 1237 { 1238 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1239 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1240 { 1241 if (fmt[i] == 'E') 1242 { 1243 int j; 1244 1245 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1246 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1247 } 1248 else if (fmt[i] == 'e') 1249 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1250 } 1251 } 1252 1253 return r; 1254} 1255 1256/* This function swaps condition in cc users and returns true 1257 if successful. It is invoked in 2 different modes, one with 1258 DEBUG_SEEN set initially to 0. In this mode, next_flags_user 1259 will skip DEBUG_INSNs that it would otherwise return and just 1260 sets DEBUG_SEEN to 1 in that case. If DEBUG_SEEN is 0 at 1261 the end of toplevel swap_rtx_condition which returns true, 1262 it means no problematic DEBUG_INSNs were seen and all changes 1263 have been applied. If it returns true but DEBUG_SEEN is 1, 1264 it means some problematic DEBUG_INSNs were seen and no changes 1265 have been applied so far. In that case one needs to call 1266 swap_rtx_condition again with DEBUG_SEEN set to -1, in which 1267 case it doesn't skip DEBUG_INSNs, but instead adjusts the 1268 flags related condition in them or resets them as needed. */ 1269 1270static int 1271swap_rtx_condition (rtx_insn *insn, int &debug_seen) 1272{ 1273 rtx pat = PATTERN (insn); 1274 1275 /* We're looking for a single set to cc0 or an HImode temporary. */ 1276 1277 if (GET_CODE (pat) == SET 1278 && REG_P (SET_DEST (pat)) 1279 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1280 { 1281 insn = next_flags_user (insn, debug_seen); 1282 if (insn == NULL_RTX) 1283 return 0; 1284 pat = PATTERN (insn); 1285 } 1286 1287 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1288 with the cc value right now. We may be able to search for one 1289 though. */ 1290 1291 if (GET_CODE (pat) == SET 1292 && GET_CODE (SET_SRC (pat)) == UNSPEC 1293 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1294 { 1295 rtx dest = SET_DEST (pat); 1296 1297 /* Search forward looking for the first use of this value. 1298 Stop at block boundaries. */ 1299 while (insn != BB_END (current_block)) 1300 { 1301 insn = NEXT_INSN (insn); 1302 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1303 { 1304 if (DEBUG_INSN_P (insn)) 1305 { 1306 if (debug_seen >= 0) 1307 debug_seen = 1; 1308 else 1309 /* Reset the DEBUG insn otherwise. */ 1310 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1311 continue; 1312 } 1313 break; 1314 } 1315 if (CALL_P (insn)) 1316 return 0; 1317 } 1318 1319 /* We haven't found it. */ 1320 if (insn == BB_END (current_block)) 1321 return 0; 1322 1323 /* So we've found the insn using this value. If it is anything 1324 other than sahf or the value does not die (meaning we'd have 1325 to search further), then we must give up. */ 1326 pat = PATTERN (insn); 1327 if (GET_CODE (pat) != SET 1328 || GET_CODE (SET_SRC (pat)) != UNSPEC 1329 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1330 || ! dead_or_set_p (insn, dest)) 1331 return 0; 1332 1333 /* Now we are prepared to handle this as a normal cc0 setter. */ 1334 insn = next_flags_user (insn, debug_seen); 1335 if (insn == NULL_RTX) 1336 return 0; 1337 pat = PATTERN (insn); 1338 } 1339 1340 if (swap_rtx_condition_1 (pat)) 1341 { 1342 int fail = 0; 1343 if (DEBUG_INSN_P (insn)) 1344 gcc_assert (debug_seen < 0); 1345 else 1346 { 1347 INSN_CODE (insn) = -1; 1348 if (recog_memoized (insn) == -1) 1349 fail = 1; 1350 } 1351 /* In case the flags don't die here, recurse to try fix 1352 following user too. */ 1353 if (!fail && !dead_or_set_p (insn, ix86_flags_rtx)) 1354 { 1355 insn = next_flags_user (insn, debug_seen); 1356 if (!insn || !swap_rtx_condition (insn, debug_seen)) 1357 fail = 1; 1358 } 1359 if (fail || debug_seen == 1) 1360 swap_rtx_condition_1 (pat); 1361 return !fail; 1362 } 1363 return 0; 1364} 1365 1366/* Handle a comparison. Special care needs to be taken to avoid 1367 causing comparisons that a 387 cannot do correctly, such as EQ. 1368 1369 Also, a pop insn may need to be emitted. The 387 does have an 1370 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1371 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1372 set up. */ 1373 1374static void 1375compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, 1376 rtx pat_src, bool can_pop_second_op) 1377{ 1378 rtx *src1, *src2; 1379 rtx src1_note, src2_note; 1380 int debug_seen = 0; 1381 1382 src1 = get_true_reg (&XEXP (pat_src, 0)); 1383 src2 = get_true_reg (&XEXP (pat_src, 1)); 1384 1385 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1386 registers that die in this insn - move those to stack top first. */ 1387 if ((! STACK_REG_P (*src1) 1388 || (STACK_REG_P (*src2) 1389 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1390 && swap_rtx_condition (insn, debug_seen)) 1391 { 1392 /* If swap_rtx_condition succeeded but some debug insns 1393 were seen along the way, it has actually reverted all the 1394 changes. Rerun swap_rtx_condition in a mode where DEBUG_ISNSs 1395 will be adjusted as well. */ 1396 if (debug_seen) 1397 { 1398 debug_seen = -1; 1399 swap_rtx_condition (insn, debug_seen); 1400 } 1401 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1)); 1402 1403 src1 = get_true_reg (&XEXP (pat_src, 0)); 1404 src2 = get_true_reg (&XEXP (pat_src, 1)); 1405 1406 INSN_CODE (insn) = -1; 1407 } 1408 1409 /* We will fix any death note later. */ 1410 1411 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1412 1413 if (STACK_REG_P (*src2)) 1414 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1415 else 1416 src2_note = NULL_RTX; 1417 1418 emit_swap_insn (insn, regstack, *src1); 1419 1420 replace_reg (src1, FIRST_STACK_REG); 1421 1422 if (STACK_REG_P (*src2)) 1423 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1424 1425 if (src1_note) 1426 { 1427 if (*src2 == CONST0_RTX (GET_MODE (*src2))) 1428 { 1429 /* This is `ftst' insn that can't pop register. */ 1430 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src1_note, 0))); 1431 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1432 EMIT_AFTER); 1433 } 1434 else 1435 { 1436 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1437 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1438 } 1439 } 1440 1441 /* If the second operand dies, handle that. But if the operands are 1442 the same stack register, don't bother, because only one death is 1443 needed, and it was just handled. */ 1444 1445 if (src2_note 1446 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1447 && REGNO (*src1) == REGNO (*src2))) 1448 { 1449 /* As a special case, two regs may die in this insn if src2 is 1450 next to top of stack and the top of stack also dies. Since 1451 we have already popped src1, "next to top of stack" is really 1452 at top (FIRST_STACK_REG) now. */ 1453 1454 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1455 && src1_note && can_pop_second_op) 1456 { 1457 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1458 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1459 } 1460 else 1461 { 1462 /* The 386 can only represent death of the first operand in 1463 the case handled above. In all other cases, emit a separate 1464 pop and remove the death note from here. */ 1465 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1466 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1467 EMIT_AFTER); 1468 } 1469 } 1470} 1471 1472/* Substitute hardware stack regs in debug insn INSN, using stack 1473 layout REGSTACK. If we can't find a hardware stack reg for any of 1474 the REGs in it, reset the debug insn. */ 1475 1476static void 1477subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack) 1478{ 1479 subrtx_ptr_iterator::array_type array; 1480 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST) 1481 { 1482 rtx *loc = *iter; 1483 rtx x = *loc; 1484 if (STACK_REG_P (x)) 1485 { 1486 int hard_regno = get_hard_regnum (regstack, x); 1487 1488 /* If we can't find an active register, reset this debug insn. */ 1489 if (hard_regno == -1) 1490 { 1491 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC (); 1492 return; 1493 } 1494 1495 gcc_assert (hard_regno >= FIRST_STACK_REG); 1496 replace_reg (loc, hard_regno); 1497 iter.skip_subrtxes (); 1498 } 1499 } 1500} 1501 1502/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1503 is the current register layout. Return whether a control flow insn 1504 was deleted in the process. */ 1505 1506static bool 1507subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat) 1508{ 1509 rtx *dest, *src; 1510 bool control_flow_insn_deleted = false; 1511 1512 switch (GET_CODE (pat)) 1513 { 1514 case USE: 1515 /* Deaths in USE insns can happen in non optimizing compilation. 1516 Handle them by popping the dying register. */ 1517 src = get_true_reg (&XEXP (pat, 0)); 1518 if (STACK_REG_P (*src) 1519 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1520 { 1521 /* USEs are ignored for liveness information so USEs of dead 1522 register might happen. */ 1523 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) 1524 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1525 return control_flow_insn_deleted; 1526 } 1527 /* Uninitialized USE might happen for functions returning uninitialized 1528 value. We will properly initialize the USE on the edge to EXIT_BLOCK, 1529 so it is safe to ignore the use here. This is consistent with behavior 1530 of dataflow analyzer that ignores USE too. (This also imply that 1531 forcibly initializing the register to NaN here would lead to ICE later, 1532 since the REG_DEAD notes are not issued.) */ 1533 break; 1534 1535 case VAR_LOCATION: 1536 gcc_unreachable (); 1537 1538 case CLOBBER: 1539 { 1540 rtx note; 1541 1542 dest = get_true_reg (&XEXP (pat, 0)); 1543 if (STACK_REG_P (*dest)) 1544 { 1545 note = find_reg_note (insn, REG_DEAD, *dest); 1546 1547 if (pat != PATTERN (insn)) 1548 { 1549 /* The fix_truncdi_1 pattern wants to be able to 1550 allocate its own scratch register. It does this by 1551 clobbering an fp reg so that it is assured of an 1552 empty reg-stack register. If the register is live, 1553 kill it now. Remove the DEAD/UNUSED note so we 1554 don't try to kill it later too. 1555 1556 In reality the UNUSED note can be absent in some 1557 complicated cases when the register is reused for 1558 partially set variable. */ 1559 1560 if (note) 1561 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1562 else 1563 note = find_reg_note (insn, REG_UNUSED, *dest); 1564 if (note) 1565 remove_note (insn, note); 1566 replace_reg (dest, FIRST_STACK_REG + 1); 1567 } 1568 else 1569 { 1570 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1571 indicates an uninitialized value. Because reload removed 1572 all other clobbers, this must be due to a function 1573 returning without a value. Load up a NaN. */ 1574 1575 if (!note) 1576 { 1577 rtx t = *dest; 1578 if (COMPLEX_MODE_P (GET_MODE (t))) 1579 { 1580 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1581 if (get_hard_regnum (regstack, u) == -1) 1582 { 1583 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1584 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1585 control_flow_insn_deleted 1586 |= move_nan_for_stack_reg (insn2, regstack, u); 1587 } 1588 } 1589 if (get_hard_regnum (regstack, t) == -1) 1590 control_flow_insn_deleted 1591 |= move_nan_for_stack_reg (insn, regstack, t); 1592 } 1593 } 1594 } 1595 break; 1596 } 1597 1598 case SET: 1599 { 1600 rtx *src1 = (rtx *) 0, *src2; 1601 rtx src1_note, src2_note; 1602 rtx pat_src; 1603 1604 dest = get_true_reg (&SET_DEST (pat)); 1605 src = get_true_reg (&SET_SRC (pat)); 1606 pat_src = SET_SRC (pat); 1607 1608 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1609 if (STACK_REG_P (*src) 1610 || (STACK_REG_P (*dest) 1611 && (REG_P (*src) || MEM_P (*src) 1612 || CONST_DOUBLE_P (*src)))) 1613 { 1614 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1615 break; 1616 } 1617 1618 switch (GET_CODE (pat_src)) 1619 { 1620 case CALL: 1621 { 1622 int count; 1623 for (count = REG_NREGS (*dest); --count >= 0;) 1624 { 1625 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1626 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1627 } 1628 } 1629 replace_reg (dest, FIRST_STACK_REG); 1630 break; 1631 1632 case REG: 1633 /* This is a `tstM2' case. */ 1634 gcc_assert (*dest == cc0_rtx); 1635 src1 = src; 1636 1637 /* Fall through. */ 1638 1639 case FLOAT_TRUNCATE: 1640 case SQRT: 1641 case ABS: 1642 case NEG: 1643 /* These insns only operate on the top of the stack. DEST might 1644 be cc0_rtx if we're processing a tstM pattern. Also, it's 1645 possible that the tstM case results in a REG_DEAD note on the 1646 source. */ 1647 1648 if (src1 == 0) 1649 src1 = get_true_reg (&XEXP (pat_src, 0)); 1650 1651 emit_swap_insn (insn, regstack, *src1); 1652 1653 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1654 1655 if (STACK_REG_P (*dest)) 1656 replace_reg (dest, FIRST_STACK_REG); 1657 1658 if (src1_note) 1659 { 1660 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1661 regstack->top--; 1662 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1663 } 1664 1665 replace_reg (src1, FIRST_STACK_REG); 1666 break; 1667 1668 case MINUS: 1669 case DIV: 1670 /* On i386, reversed forms of subM3 and divM3 exist for 1671 MODE_FLOAT, so the same code that works for addM3 and mulM3 1672 can be used. */ 1673 case MULT: 1674 case PLUS: 1675 /* These insns can accept the top of stack as a destination 1676 from a stack reg or mem, or can use the top of stack as a 1677 source and some other stack register (possibly top of stack) 1678 as a destination. */ 1679 1680 src1 = get_true_reg (&XEXP (pat_src, 0)); 1681 src2 = get_true_reg (&XEXP (pat_src, 1)); 1682 1683 /* We will fix any death note later. */ 1684 1685 if (STACK_REG_P (*src1)) 1686 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1687 else 1688 src1_note = NULL_RTX; 1689 if (STACK_REG_P (*src2)) 1690 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1691 else 1692 src2_note = NULL_RTX; 1693 1694 /* If either operand is not a stack register, then the dest 1695 must be top of stack. */ 1696 1697 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1698 emit_swap_insn (insn, regstack, *dest); 1699 else 1700 { 1701 /* Both operands are REG. If neither operand is already 1702 at the top of stack, choose to make the one that is the 1703 dest the new top of stack. */ 1704 1705 int src1_hard_regnum, src2_hard_regnum; 1706 1707 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1708 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1709 1710 /* If the source is not live, this is yet another case of 1711 uninitialized variables. Load up a NaN instead. */ 1712 if (src1_hard_regnum == -1) 1713 { 1714 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); 1715 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1716 control_flow_insn_deleted 1717 |= move_nan_for_stack_reg (insn2, regstack, *src1); 1718 } 1719 if (src2_hard_regnum == -1) 1720 { 1721 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); 1722 rtx_insn *insn2 = emit_insn_before (pat2, insn); 1723 control_flow_insn_deleted 1724 |= move_nan_for_stack_reg (insn2, regstack, *src2); 1725 } 1726 1727 if (src1_hard_regnum != FIRST_STACK_REG 1728 && src2_hard_regnum != FIRST_STACK_REG) 1729 emit_swap_insn (insn, regstack, *dest); 1730 } 1731 1732 if (STACK_REG_P (*src1)) 1733 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1734 if (STACK_REG_P (*src2)) 1735 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1736 1737 if (src1_note) 1738 { 1739 rtx src1_reg = XEXP (src1_note, 0); 1740 1741 /* If the register that dies is at the top of stack, then 1742 the destination is somewhere else - merely substitute it. 1743 But if the reg that dies is not at top of stack, then 1744 move the top of stack to the dead reg, as though we had 1745 done the insn and then a store-with-pop. */ 1746 1747 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1748 { 1749 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1750 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1751 } 1752 else 1753 { 1754 int regno = get_hard_regnum (regstack, src1_reg); 1755 1756 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1757 replace_reg (dest, regno); 1758 1759 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1760 = regstack->reg[regstack->top]; 1761 } 1762 1763 CLEAR_HARD_REG_BIT (regstack->reg_set, 1764 REGNO (XEXP (src1_note, 0))); 1765 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1766 regstack->top--; 1767 } 1768 else if (src2_note) 1769 { 1770 rtx src2_reg = XEXP (src2_note, 0); 1771 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1772 { 1773 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1774 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1775 } 1776 else 1777 { 1778 int regno = get_hard_regnum (regstack, src2_reg); 1779 1780 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1781 replace_reg (dest, regno); 1782 1783 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1784 = regstack->reg[regstack->top]; 1785 } 1786 1787 CLEAR_HARD_REG_BIT (regstack->reg_set, 1788 REGNO (XEXP (src2_note, 0))); 1789 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1790 regstack->top--; 1791 } 1792 else 1793 { 1794 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1795 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1796 } 1797 1798 /* Keep operand 1 matching with destination. */ 1799 if (COMMUTATIVE_ARITH_P (pat_src) 1800 && REG_P (*src1) && REG_P (*src2) 1801 && REGNO (*src1) != REGNO (*dest)) 1802 { 1803 int tmp = REGNO (*src1); 1804 replace_reg (src1, REGNO (*src2)); 1805 replace_reg (src2, tmp); 1806 } 1807 break; 1808 1809 case UNSPEC: 1810 switch (XINT (pat_src, 1)) 1811 { 1812 case UNSPEC_FIST: 1813 case UNSPEC_FIST_ATOMIC: 1814 1815 case UNSPEC_FIST_FLOOR: 1816 case UNSPEC_FIST_CEIL: 1817 1818 /* These insns only operate on the top of the stack. */ 1819 1820 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1821 emit_swap_insn (insn, regstack, *src1); 1822 1823 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1824 1825 if (STACK_REG_P (*dest)) 1826 replace_reg (dest, FIRST_STACK_REG); 1827 1828 if (src1_note) 1829 { 1830 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1831 regstack->top--; 1832 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1833 } 1834 1835 replace_reg (src1, FIRST_STACK_REG); 1836 break; 1837 1838 case UNSPEC_FXAM: 1839 1840 /* This insn only operate on the top of the stack. */ 1841 1842 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1843 emit_swap_insn (insn, regstack, *src1); 1844 1845 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1846 1847 replace_reg (src1, FIRST_STACK_REG); 1848 1849 if (src1_note) 1850 { 1851 remove_regno_note (insn, REG_DEAD, 1852 REGNO (XEXP (src1_note, 0))); 1853 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), 1854 EMIT_AFTER); 1855 } 1856 1857 break; 1858 1859 case UNSPEC_SIN: 1860 case UNSPEC_COS: 1861 case UNSPEC_FRNDINT: 1862 case UNSPEC_F2XM1: 1863 1864 case UNSPEC_FRNDINT_ROUNDEVEN: 1865 case UNSPEC_FRNDINT_FLOOR: 1866 case UNSPEC_FRNDINT_CEIL: 1867 case UNSPEC_FRNDINT_TRUNC: 1868 1869 /* Above insns operate on the top of the stack. */ 1870 1871 case UNSPEC_SINCOS_COS: 1872 case UNSPEC_XTRACT_FRACT: 1873 1874 /* Above insns operate on the top two stack slots, 1875 first part of one input, double output insn. */ 1876 1877 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1878 1879 emit_swap_insn (insn, regstack, *src1); 1880 1881 /* Input should never die, it is replaced with output. */ 1882 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1883 gcc_assert (!src1_note); 1884 1885 if (STACK_REG_P (*dest)) 1886 replace_reg (dest, FIRST_STACK_REG); 1887 1888 replace_reg (src1, FIRST_STACK_REG); 1889 break; 1890 1891 case UNSPEC_SINCOS_SIN: 1892 case UNSPEC_XTRACT_EXP: 1893 1894 /* These insns operate on the top two stack slots, 1895 second part of one input, double output insn. */ 1896 1897 regstack->top++; 1898 /* FALLTHRU */ 1899 1900 case UNSPEC_TAN: 1901 1902 /* For UNSPEC_TAN, regstack->top is already increased 1903 by inherent load of constant 1.0. */ 1904 1905 /* Output value is generated in the second stack slot. 1906 Move current value from second slot to the top. */ 1907 regstack->reg[regstack->top] 1908 = regstack->reg[regstack->top - 1]; 1909 1910 gcc_assert (STACK_REG_P (*dest)); 1911 1912 regstack->reg[regstack->top - 1] = REGNO (*dest); 1913 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1914 replace_reg (dest, FIRST_STACK_REG + 1); 1915 1916 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1917 1918 replace_reg (src1, FIRST_STACK_REG); 1919 break; 1920 1921 case UNSPEC_FPATAN: 1922 case UNSPEC_FYL2X: 1923 case UNSPEC_FYL2XP1: 1924 /* These insns operate on the top two stack slots. */ 1925 1926 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1927 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1928 1929 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1930 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1931 1932 swap_to_top (insn, regstack, *src1, *src2); 1933 1934 replace_reg (src1, FIRST_STACK_REG); 1935 replace_reg (src2, FIRST_STACK_REG + 1); 1936 1937 if (src1_note) 1938 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1939 if (src2_note) 1940 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1941 1942 /* Pop both input operands from the stack. */ 1943 CLEAR_HARD_REG_BIT (regstack->reg_set, 1944 regstack->reg[regstack->top]); 1945 CLEAR_HARD_REG_BIT (regstack->reg_set, 1946 regstack->reg[regstack->top - 1]); 1947 regstack->top -= 2; 1948 1949 /* Push the result back onto the stack. */ 1950 regstack->reg[++regstack->top] = REGNO (*dest); 1951 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1952 replace_reg (dest, FIRST_STACK_REG); 1953 break; 1954 1955 case UNSPEC_FSCALE_FRACT: 1956 case UNSPEC_FPREM_F: 1957 case UNSPEC_FPREM1_F: 1958 /* These insns operate on the top two stack slots, 1959 first part of double input, double output insn. */ 1960 1961 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1962 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1963 1964 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1965 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1966 1967 /* Inputs should never die, they are 1968 replaced with outputs. */ 1969 gcc_assert (!src1_note); 1970 gcc_assert (!src2_note); 1971 1972 swap_to_top (insn, regstack, *src1, *src2); 1973 1974 /* Push the result back onto stack. Empty stack slot 1975 will be filled in second part of insn. */ 1976 if (STACK_REG_P (*dest)) 1977 { 1978 regstack->reg[regstack->top] = REGNO (*dest); 1979 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1980 replace_reg (dest, FIRST_STACK_REG); 1981 } 1982 1983 replace_reg (src1, FIRST_STACK_REG); 1984 replace_reg (src2, FIRST_STACK_REG + 1); 1985 break; 1986 1987 case UNSPEC_FSCALE_EXP: 1988 case UNSPEC_FPREM_U: 1989 case UNSPEC_FPREM1_U: 1990 /* These insns operate on the top two stack slots, 1991 second part of double input, double output insn. */ 1992 1993 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1994 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1995 1996 /* Push the result back onto stack. Fill empty slot from 1997 first part of insn and fix top of stack pointer. */ 1998 if (STACK_REG_P (*dest)) 1999 { 2000 regstack->reg[regstack->top - 1] = REGNO (*dest); 2001 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2002 replace_reg (dest, FIRST_STACK_REG + 1); 2003 } 2004 2005 replace_reg (src1, FIRST_STACK_REG); 2006 replace_reg (src2, FIRST_STACK_REG + 1); 2007 break; 2008 2009 case UNSPEC_C2_FLAG: 2010 /* This insn operates on the top two stack slots, 2011 third part of C2 setting double input insn. */ 2012 2013 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 2014 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 2015 2016 replace_reg (src1, FIRST_STACK_REG); 2017 replace_reg (src2, FIRST_STACK_REG + 1); 2018 break; 2019 2020 case UNSPEC_FNSTSW: 2021 /* Combined fcomp+fnstsw generated for doing well with 2022 CSE. When optimizing this would have been broken 2023 up before now. */ 2024 2025 pat_src = XVECEXP (pat_src, 0, 0); 2026 if (GET_CODE (pat_src) == COMPARE) 2027 goto do_compare; 2028 2029 /* Fall through. */ 2030 2031 case UNSPEC_NOTRAP: 2032 2033 pat_src = XVECEXP (pat_src, 0, 0); 2034 gcc_assert (GET_CODE (pat_src) == COMPARE); 2035 goto do_compare; 2036 2037 default: 2038 gcc_unreachable (); 2039 } 2040 break; 2041 2042 case COMPARE: 2043 do_compare: 2044 /* `fcomi' insn can't pop two regs. */ 2045 compare_for_stack_reg (insn, regstack, pat_src, 2046 REGNO (*dest) != FLAGS_REG); 2047 break; 2048 2049 case IF_THEN_ELSE: 2050 /* This insn requires the top of stack to be the destination. */ 2051 2052 src1 = get_true_reg (&XEXP (pat_src, 1)); 2053 src2 = get_true_reg (&XEXP (pat_src, 2)); 2054 2055 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 2056 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 2057 2058 /* If the comparison operator is an FP comparison operator, 2059 it is handled correctly by compare_for_stack_reg () who 2060 will move the destination to the top of stack. But if the 2061 comparison operator is not an FP comparison operator, we 2062 have to handle it here. */ 2063 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 2064 && REGNO (*dest) != regstack->reg[regstack->top]) 2065 { 2066 /* In case one of operands is the top of stack and the operands 2067 dies, it is safe to make it the destination operand by 2068 reversing the direction of cmove and avoid fxch. */ 2069 if ((REGNO (*src1) == regstack->reg[regstack->top] 2070 && src1_note) 2071 || (REGNO (*src2) == regstack->reg[regstack->top] 2072 && src2_note)) 2073 { 2074 int idx1 = (get_hard_regnum (regstack, *src1) 2075 - FIRST_STACK_REG); 2076 int idx2 = (get_hard_regnum (regstack, *src2) 2077 - FIRST_STACK_REG); 2078 2079 /* Make reg-stack believe that the operands are already 2080 swapped on the stack */ 2081 regstack->reg[regstack->top - idx1] = REGNO (*src2); 2082 regstack->reg[regstack->top - idx2] = REGNO (*src1); 2083 2084 /* Reverse condition to compensate the operand swap. 2085 i386 do have comparison always reversible. */ 2086 PUT_CODE (XEXP (pat_src, 0), 2087 reversed_comparison_code (XEXP (pat_src, 0), insn)); 2088 } 2089 else 2090 emit_swap_insn (insn, regstack, *dest); 2091 } 2092 2093 { 2094 rtx src_note [3]; 2095 int i; 2096 2097 src_note[0] = 0; 2098 src_note[1] = src1_note; 2099 src_note[2] = src2_note; 2100 2101 if (STACK_REG_P (*src1)) 2102 replace_reg (src1, get_hard_regnum (regstack, *src1)); 2103 if (STACK_REG_P (*src2)) 2104 replace_reg (src2, get_hard_regnum (regstack, *src2)); 2105 2106 for (i = 1; i <= 2; i++) 2107 if (src_note [i]) 2108 { 2109 int regno = REGNO (XEXP (src_note[i], 0)); 2110 2111 /* If the register that dies is not at the top of 2112 stack, then move the top of stack to the dead reg. 2113 Top of stack should never die, as it is the 2114 destination. */ 2115 gcc_assert (regno != regstack->reg[regstack->top]); 2116 remove_regno_note (insn, REG_DEAD, regno); 2117 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 2118 EMIT_AFTER); 2119 } 2120 } 2121 2122 /* Make dest the top of stack. Add dest to regstack if 2123 not present. */ 2124 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 2125 regstack->reg[++regstack->top] = REGNO (*dest); 2126 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2127 replace_reg (dest, FIRST_STACK_REG); 2128 break; 2129 2130 default: 2131 gcc_unreachable (); 2132 } 2133 break; 2134 } 2135 2136 default: 2137 break; 2138 } 2139 2140 return control_flow_insn_deleted; 2141} 2142 2143/* Substitute hard regnums for any stack regs in INSN, which has 2144 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 2145 before the insn, and is updated with changes made here. 2146 2147 There are several requirements and assumptions about the use of 2148 stack-like regs in asm statements. These rules are enforced by 2149 record_asm_stack_regs; see comments there for details. Any 2150 asm_operands left in the RTL at this point may be assume to meet the 2151 requirements, since record_asm_stack_regs removes any problem asm. */ 2152 2153static void 2154subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) 2155{ 2156 rtx body = PATTERN (insn); 2157 2158 rtx *note_reg; /* Array of note contents */ 2159 rtx **note_loc; /* Address of REG field of each note */ 2160 enum reg_note *note_kind; /* The type of each note */ 2161 2162 rtx *clobber_reg = 0; 2163 rtx **clobber_loc = 0; 2164 2165 struct stack_def temp_stack; 2166 int n_notes; 2167 int n_clobbers; 2168 rtx note; 2169 int i; 2170 int n_inputs, n_outputs; 2171 2172 if (! check_asm_stack_operands (insn)) 2173 return; 2174 2175 /* Find out what the constraints required. If no constraint 2176 alternative matches, that is a compiler bug: we should have caught 2177 such an insn in check_asm_stack_operands. */ 2178 extract_constrain_insn (insn); 2179 2180 preprocess_constraints (insn); 2181 const operand_alternative *op_alt = which_op_alt (); 2182 2183 get_asm_operands_in_out (body, &n_outputs, &n_inputs); 2184 2185 /* Strip SUBREGs here to make the following code simpler. */ 2186 for (i = 0; i < recog_data.n_operands; i++) 2187 if (GET_CODE (recog_data.operand[i]) == SUBREG 2188 && REG_P (SUBREG_REG (recog_data.operand[i]))) 2189 { 2190 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 2191 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 2192 } 2193 2194 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2195 2196 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2197 i++; 2198 2199 note_reg = XALLOCAVEC (rtx, i); 2200 note_loc = XALLOCAVEC (rtx *, i); 2201 note_kind = XALLOCAVEC (enum reg_note, i); 2202 2203 n_notes = 0; 2204 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2205 { 2206 if (GET_CODE (note) != EXPR_LIST) 2207 continue; 2208 rtx reg = XEXP (note, 0); 2209 rtx *loc = & XEXP (note, 0); 2210 2211 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2212 { 2213 loc = & SUBREG_REG (reg); 2214 reg = SUBREG_REG (reg); 2215 } 2216 2217 if (STACK_REG_P (reg) 2218 && (REG_NOTE_KIND (note) == REG_DEAD 2219 || REG_NOTE_KIND (note) == REG_UNUSED)) 2220 { 2221 note_reg[n_notes] = reg; 2222 note_loc[n_notes] = loc; 2223 note_kind[n_notes] = REG_NOTE_KIND (note); 2224 n_notes++; 2225 } 2226 } 2227 2228 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2229 2230 n_clobbers = 0; 2231 2232 if (GET_CODE (body) == PARALLEL) 2233 { 2234 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); 2235 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); 2236 2237 for (i = 0; i < XVECLEN (body, 0); i++) 2238 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2239 { 2240 rtx clobber = XVECEXP (body, 0, i); 2241 rtx reg = XEXP (clobber, 0); 2242 rtx *loc = & XEXP (clobber, 0); 2243 2244 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2245 { 2246 loc = & SUBREG_REG (reg); 2247 reg = SUBREG_REG (reg); 2248 } 2249 2250 if (STACK_REG_P (reg)) 2251 { 2252 clobber_reg[n_clobbers] = reg; 2253 clobber_loc[n_clobbers] = loc; 2254 n_clobbers++; 2255 } 2256 } 2257 } 2258 2259 temp_stack = *regstack; 2260 2261 /* Put the input regs into the desired place in TEMP_STACK. */ 2262 2263 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2264 if (STACK_REG_P (recog_data.operand[i]) 2265 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS) 2266 && op_alt[i].cl != FLOAT_REGS) 2267 { 2268 /* If an operand needs to be in a particular reg in 2269 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2270 these constraints are for single register classes, and 2271 reload guaranteed that operand[i] is already in that class, 2272 we can just use REGNO (recog_data.operand[i]) to know which 2273 actual reg this operand needs to be in. */ 2274 2275 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2276 2277 gcc_assert (regno >= 0); 2278 2279 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2280 { 2281 /* recog_data.operand[i] is not in the right place. Find 2282 it and swap it with whatever is already in I's place. 2283 K is where recog_data.operand[i] is now. J is where it 2284 should be. */ 2285 int j, k; 2286 2287 k = temp_stack.top - (regno - FIRST_STACK_REG); 2288 j = (temp_stack.top 2289 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2290 2291 std::swap (temp_stack.reg[j], temp_stack.reg[k]); 2292 } 2293 } 2294 2295 /* Emit insns before INSN to make sure the reg-stack is in the right 2296 order. */ 2297 2298 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2299 2300 /* Make the needed input register substitutions. Do death notes and 2301 clobbers too, because these are for inputs, not outputs. */ 2302 2303 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2304 if (STACK_REG_P (recog_data.operand[i])) 2305 { 2306 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2307 2308 gcc_assert (regnum >= 0); 2309 2310 replace_reg (recog_data.operand_loc[i], regnum); 2311 } 2312 2313 for (i = 0; i < n_notes; i++) 2314 if (note_kind[i] == REG_DEAD) 2315 { 2316 int regnum = get_hard_regnum (regstack, note_reg[i]); 2317 2318 gcc_assert (regnum >= 0); 2319 2320 replace_reg (note_loc[i], regnum); 2321 } 2322 2323 for (i = 0; i < n_clobbers; i++) 2324 { 2325 /* It's OK for a CLOBBER to reference a reg that is not live. 2326 Don't try to replace it in that case. */ 2327 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2328 2329 if (regnum >= 0) 2330 replace_reg (clobber_loc[i], regnum); 2331 } 2332 2333 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2334 2335 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2336 if (STACK_REG_P (recog_data.operand[i])) 2337 { 2338 /* An input reg is implicitly popped if it is tied to an 2339 output, or if there is a CLOBBER for it. */ 2340 int j; 2341 2342 for (j = 0; j < n_clobbers; j++) 2343 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2344 break; 2345 2346 if (j < n_clobbers || op_alt[i].matches >= 0) 2347 { 2348 /* recog_data.operand[i] might not be at the top of stack. 2349 But that's OK, because all we need to do is pop the 2350 right number of regs off of the top of the reg-stack. 2351 record_asm_stack_regs guaranteed that all implicitly 2352 popped regs were grouped at the top of the reg-stack. */ 2353 2354 CLEAR_HARD_REG_BIT (regstack->reg_set, 2355 regstack->reg[regstack->top]); 2356 regstack->top--; 2357 } 2358 } 2359 2360 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2361 Note that there isn't any need to substitute register numbers. 2362 ??? Explain why this is true. */ 2363 2364 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2365 { 2366 /* See if there is an output for this hard reg. */ 2367 int j; 2368 2369 for (j = 0; j < n_outputs; j++) 2370 if (STACK_REG_P (recog_data.operand[j]) 2371 && REGNO (recog_data.operand[j]) == (unsigned) i) 2372 { 2373 regstack->reg[++regstack->top] = i; 2374 SET_HARD_REG_BIT (regstack->reg_set, i); 2375 break; 2376 } 2377 } 2378 2379 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2380 input that the asm didn't implicitly pop. If the asm didn't 2381 implicitly pop an input reg, that reg will still be live. 2382 2383 Note that we can't use find_regno_note here: the register numbers 2384 in the death notes have already been substituted. */ 2385 2386 for (i = 0; i < n_outputs; i++) 2387 if (STACK_REG_P (recog_data.operand[i])) 2388 { 2389 int j; 2390 2391 for (j = 0; j < n_notes; j++) 2392 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2393 && note_kind[j] == REG_UNUSED) 2394 { 2395 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2396 EMIT_AFTER); 2397 break; 2398 } 2399 } 2400 2401 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2402 if (STACK_REG_P (recog_data.operand[i])) 2403 { 2404 int j; 2405 2406 for (j = 0; j < n_notes; j++) 2407 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2408 && note_kind[j] == REG_DEAD 2409 && TEST_HARD_REG_BIT (regstack->reg_set, 2410 REGNO (recog_data.operand[i]))) 2411 { 2412 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2413 EMIT_AFTER); 2414 break; 2415 } 2416 } 2417} 2418 2419/* Substitute stack hard reg numbers for stack virtual registers in 2420 INSN. Non-stack register numbers are not changed. REGSTACK is the 2421 current stack content. Insns may be emitted as needed to arrange the 2422 stack for the 387 based on the contents of the insn. Return whether 2423 a control flow insn was deleted in the process. */ 2424 2425static bool 2426subst_stack_regs (rtx_insn *insn, stack_ptr regstack) 2427{ 2428 rtx *note_link, note; 2429 bool control_flow_insn_deleted = false; 2430 int i; 2431 2432 if (CALL_P (insn)) 2433 { 2434 int top = regstack->top; 2435 2436 /* If there are any floating point parameters to be passed in 2437 registers for this call, make sure they are in the right 2438 order. */ 2439 2440 if (top >= 0) 2441 { 2442 straighten_stack (insn, regstack); 2443 2444 /* Now mark the arguments as dead after the call. */ 2445 2446 while (regstack->top >= 0) 2447 { 2448 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2449 regstack->top--; 2450 } 2451 } 2452 } 2453 2454 /* Do the actual substitution if any stack regs are mentioned. 2455 Since we only record whether entire insn mentions stack regs, and 2456 subst_stack_regs_pat only works for patterns that contain stack regs, 2457 we must check each pattern in a parallel here. A call_value_pop could 2458 fail otherwise. */ 2459 2460 if (stack_regs_mentioned (insn)) 2461 { 2462 int n_operands = asm_noperands (PATTERN (insn)); 2463 if (n_operands >= 0) 2464 { 2465 /* This insn is an `asm' with operands. Decode the operands, 2466 decide how many are inputs, and do register substitution. 2467 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2468 2469 subst_asm_stack_regs (insn, regstack); 2470 return control_flow_insn_deleted; 2471 } 2472 2473 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2474 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2475 { 2476 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2477 { 2478 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2479 XVECEXP (PATTERN (insn), 0, i) 2480 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2481 control_flow_insn_deleted 2482 |= subst_stack_regs_pat (insn, regstack, 2483 XVECEXP (PATTERN (insn), 0, i)); 2484 } 2485 } 2486 else 2487 control_flow_insn_deleted 2488 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2489 } 2490 2491 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2492 REG_UNUSED will already have been dealt with, so just return. */ 2493 2494 if (NOTE_P (insn) || insn->deleted ()) 2495 return control_flow_insn_deleted; 2496 2497 /* If this a noreturn call, we can't insert pop insns after it. 2498 Instead, reset the stack state to empty. */ 2499 if (CALL_P (insn) 2500 && find_reg_note (insn, REG_NORETURN, NULL)) 2501 { 2502 regstack->top = -1; 2503 CLEAR_HARD_REG_SET (regstack->reg_set); 2504 return control_flow_insn_deleted; 2505 } 2506 2507 /* If there is a REG_UNUSED note on a stack register on this insn, 2508 the indicated reg must be popped. The REG_UNUSED note is removed, 2509 since the form of the newly emitted pop insn references the reg, 2510 making it no longer `unset'. */ 2511 2512 note_link = ®_NOTES (insn); 2513 for (note = *note_link; note; note = XEXP (note, 1)) 2514 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2515 { 2516 *note_link = XEXP (note, 1); 2517 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2518 } 2519 else 2520 note_link = &XEXP (note, 1); 2521 2522 return control_flow_insn_deleted; 2523} 2524 2525/* Change the organization of the stack so that it fits a new basic 2526 block. Some registers might have to be popped, but there can never be 2527 a register live in the new block that is not now live. 2528 2529 Insert any needed insns before or after INSN, as indicated by 2530 WHERE. OLD is the original stack layout, and NEW is the desired 2531 form. OLD is updated to reflect the code emitted, i.e., it will be 2532 the same as NEW upon return. 2533 2534 This function will not preserve block_end[]. But that information 2535 is no longer needed once this has executed. */ 2536 2537static void 2538change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack, 2539 enum emit_where where) 2540{ 2541 int reg; 2542 machine_mode raw_mode = reg_raw_mode[FIRST_STACK_REG]; 2543 rtx_insn *update_end = NULL; 2544 int i; 2545 2546 /* Stack adjustments for the first insn in a block update the 2547 current_block's stack_in instead of inserting insns directly. 2548 compensate_edges will add the necessary code later. */ 2549 if (current_block 2550 && starting_stack_p 2551 && where == EMIT_BEFORE) 2552 { 2553 BLOCK_INFO (current_block)->stack_in = *new_stack; 2554 starting_stack_p = false; 2555 *old = *new_stack; 2556 return; 2557 } 2558 2559 /* We will be inserting new insns "backwards". If we are to insert 2560 after INSN, find the next insn, and insert before it. */ 2561 2562 if (where == EMIT_AFTER) 2563 { 2564 if (current_block && BB_END (current_block) == insn) 2565 update_end = insn; 2566 insn = NEXT_INSN (insn); 2567 } 2568 2569 /* Initialize partially dead variables. */ 2570 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 2571 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) 2572 && !TEST_HARD_REG_BIT (old->reg_set, i)) 2573 { 2574 old->reg[++old->top] = i; 2575 SET_HARD_REG_BIT (old->reg_set, i); 2576 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num), 2577 insn); 2578 } 2579 2580 /* Pop any registers that are not needed in the new block. */ 2581 2582 /* If the destination block's stack already has a specified layout 2583 and contains two or more registers, use a more intelligent algorithm 2584 to pop registers that minimizes the number of fxchs below. */ 2585 if (new_stack->top > 0) 2586 { 2587 bool slots[REG_STACK_SIZE]; 2588 int pops[REG_STACK_SIZE]; 2589 int next, dest, topsrc; 2590 2591 /* First pass to determine the free slots. */ 2592 for (reg = 0; reg <= new_stack->top; reg++) 2593 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); 2594 2595 /* Second pass to allocate preferred slots. */ 2596 topsrc = -1; 2597 for (reg = old->top; reg > new_stack->top; reg--) 2598 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2599 { 2600 dest = -1; 2601 for (next = 0; next <= new_stack->top; next++) 2602 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) 2603 { 2604 /* If this is a preference for the new top of stack, record 2605 the fact by remembering it's old->reg in topsrc. */ 2606 if (next == new_stack->top) 2607 topsrc = reg; 2608 slots[next] = true; 2609 dest = next; 2610 break; 2611 } 2612 pops[reg] = dest; 2613 } 2614 else 2615 pops[reg] = reg; 2616 2617 /* Intentionally, avoid placing the top of stack in it's correct 2618 location, if we still need to permute the stack below and we 2619 can usefully place it somewhere else. This is the case if any 2620 slot is still unallocated, in which case we should place the 2621 top of stack there. */ 2622 if (topsrc != -1) 2623 for (reg = 0; reg < new_stack->top; reg++) 2624 if (!slots[reg]) 2625 { 2626 pops[topsrc] = reg; 2627 slots[new_stack->top] = false; 2628 slots[reg] = true; 2629 break; 2630 } 2631 2632 /* Third pass allocates remaining slots and emits pop insns. */ 2633 next = new_stack->top; 2634 for (reg = old->top; reg > new_stack->top; reg--) 2635 { 2636 dest = pops[reg]; 2637 if (dest == -1) 2638 { 2639 /* Find next free slot. */ 2640 while (slots[next]) 2641 next--; 2642 dest = next--; 2643 } 2644 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], raw_mode), 2645 EMIT_BEFORE); 2646 } 2647 } 2648 else 2649 { 2650 /* The following loop attempts to maximize the number of times we 2651 pop the top of the stack, as this permits the use of the faster 2652 ffreep instruction on platforms that support it. */ 2653 int live, next; 2654 2655 live = 0; 2656 for (reg = 0; reg <= old->top; reg++) 2657 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) 2658 live++; 2659 2660 next = live; 2661 while (old->top >= live) 2662 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) 2663 { 2664 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) 2665 next--; 2666 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], raw_mode), 2667 EMIT_BEFORE); 2668 } 2669 else 2670 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], raw_mode), 2671 EMIT_BEFORE); 2672 } 2673 2674 if (new_stack->top == -2) 2675 { 2676 /* If the new block has never been processed, then it can inherit 2677 the old stack order. */ 2678 2679 new_stack->top = old->top; 2680 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); 2681 } 2682 else 2683 { 2684 /* This block has been entered before, and we must match the 2685 previously selected stack order. */ 2686 2687 /* By now, the only difference should be the order of the stack, 2688 not their depth or liveliness. */ 2689 2690 gcc_assert (old->reg_set == new_stack->reg_set); 2691 gcc_assert (old->top == new_stack->top); 2692 2693 /* If the stack is not empty (new_stack->top != -1), loop here emitting 2694 swaps until the stack is correct. 2695 2696 The worst case number of swaps emitted is N + 2, where N is the 2697 depth of the stack. In some cases, the reg at the top of 2698 stack may be correct, but swapped anyway in order to fix 2699 other regs. But since we never swap any other reg away from 2700 its correct slot, this algorithm will converge. */ 2701 2702 if (new_stack->top != -1) 2703 do 2704 { 2705 /* Swap the reg at top of stack into the position it is 2706 supposed to be in, until the correct top of stack appears. */ 2707 2708 while (old->reg[old->top] != new_stack->reg[new_stack->top]) 2709 { 2710 for (reg = new_stack->top; reg >= 0; reg--) 2711 if (new_stack->reg[reg] == old->reg[old->top]) 2712 break; 2713 2714 gcc_assert (reg != -1); 2715 2716 emit_swap_insn (insn, old, 2717 FP_MODE_REG (old->reg[reg], raw_mode)); 2718 } 2719 2720 /* See if any regs remain incorrect. If so, bring an 2721 incorrect reg to the top of stack, and let the while loop 2722 above fix it. */ 2723 2724 for (reg = new_stack->top; reg >= 0; reg--) 2725 if (new_stack->reg[reg] != old->reg[reg]) 2726 { 2727 emit_swap_insn (insn, old, 2728 FP_MODE_REG (old->reg[reg], raw_mode)); 2729 break; 2730 } 2731 } while (reg >= 0); 2732 2733 /* At this point there must be no differences. */ 2734 2735 for (reg = old->top; reg >= 0; reg--) 2736 gcc_assert (old->reg[reg] == new_stack->reg[reg]); 2737 } 2738 2739 if (update_end) 2740 { 2741 for (update_end = NEXT_INSN (update_end); update_end != insn; 2742 update_end = NEXT_INSN (update_end)) 2743 { 2744 set_block_for_insn (update_end, current_block); 2745 if (INSN_P (update_end)) 2746 df_insn_rescan (update_end); 2747 } 2748 BB_END (current_block) = PREV_INSN (insn); 2749 } 2750} 2751 2752/* Print stack configuration. */ 2753 2754static void 2755print_stack (FILE *file, stack_ptr s) 2756{ 2757 if (! file) 2758 return; 2759 2760 if (s->top == -2) 2761 fprintf (file, "uninitialized\n"); 2762 else if (s->top == -1) 2763 fprintf (file, "empty\n"); 2764 else 2765 { 2766 int i; 2767 fputs ("[ ", file); 2768 for (i = 0; i <= s->top; ++i) 2769 fprintf (file, "%d ", s->reg[i]); 2770 fputs ("]\n", file); 2771 } 2772} 2773 2774/* This function was doing life analysis. We now let the regular live 2775 code do it's job, so we only need to check some extra invariants 2776 that reg-stack expects. Primary among these being that all registers 2777 are initialized before use. 2778 2779 The function returns true when code was emitted to CFG edges and 2780 commit_edge_insertions needs to be called. */ 2781 2782static int 2783convert_regs_entry (void) 2784{ 2785 int inserted = 0; 2786 edge e; 2787 edge_iterator ei; 2788 2789 /* Load something into each stack register live at function entry. 2790 Such live registers can be caused by uninitialized variables or 2791 functions not returning values on all paths. In order to keep 2792 the push/pop code happy, and to not scrog the register stack, we 2793 must put something in these registers. Use a QNaN. 2794 2795 Note that we are inserting converted code here. This code is 2796 never seen by the convert_regs pass. */ 2797 2798 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 2799 { 2800 basic_block block = e->dest; 2801 block_info bi = BLOCK_INFO (block); 2802 int reg, top = -1; 2803 2804 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2805 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2806 { 2807 rtx init; 2808 2809 bi->stack_in.reg[++top] = reg; 2810 2811 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode), 2812 not_a_num); 2813 insert_insn_on_edge (init, e); 2814 inserted = 1; 2815 } 2816 2817 bi->stack_in.top = top; 2818 } 2819 2820 return inserted; 2821} 2822 2823/* Construct the desired stack for function exit. This will either 2824 be `empty', or the function return value at top-of-stack. */ 2825 2826static void 2827convert_regs_exit (void) 2828{ 2829 int value_reg_low, value_reg_high; 2830 stack_ptr output_stack; 2831 rtx retvalue; 2832 2833 retvalue = stack_result (current_function_decl); 2834 value_reg_low = value_reg_high = -1; 2835 if (retvalue) 2836 { 2837 value_reg_low = REGNO (retvalue); 2838 value_reg_high = END_REGNO (retvalue) - 1; 2839 } 2840 2841 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in; 2842 if (value_reg_low == -1) 2843 output_stack->top = -1; 2844 else 2845 { 2846 int reg; 2847 2848 output_stack->top = value_reg_high - value_reg_low; 2849 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2850 { 2851 output_stack->reg[value_reg_high - reg] = reg; 2852 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2853 } 2854 } 2855} 2856 2857/* Copy the stack info from the end of edge E's source block to the 2858 start of E's destination block. */ 2859 2860static void 2861propagate_stack (edge e) 2862{ 2863 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out; 2864 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2865 int reg; 2866 2867 /* Preserve the order of the original stack, but check whether 2868 any pops are needed. */ 2869 dest_stack->top = -1; 2870 for (reg = 0; reg <= src_stack->top; ++reg) 2871 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2872 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2873 2874 /* Push in any partially dead values. */ 2875 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) 2876 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) 2877 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) 2878 dest_stack->reg[++dest_stack->top] = reg; 2879} 2880 2881 2882/* Adjust the stack of edge E's source block on exit to match the stack 2883 of it's target block upon input. The stack layouts of both blocks 2884 should have been defined by now. */ 2885 2886static bool 2887compensate_edge (edge e) 2888{ 2889 basic_block source = e->src, target = e->dest; 2890 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in; 2891 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out; 2892 struct stack_def regstack; 2893 int reg; 2894 2895 if (dump_file) 2896 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2897 2898 gcc_assert (target_stack->top != -2); 2899 2900 /* Check whether stacks are identical. */ 2901 if (target_stack->top == source_stack->top) 2902 { 2903 for (reg = target_stack->top; reg >= 0; --reg) 2904 if (target_stack->reg[reg] != source_stack->reg[reg]) 2905 break; 2906 2907 if (reg == -1) 2908 { 2909 if (dump_file) 2910 fprintf (dump_file, "no changes needed\n"); 2911 return false; 2912 } 2913 } 2914 2915 if (dump_file) 2916 { 2917 fprintf (dump_file, "correcting stack to "); 2918 print_stack (dump_file, target_stack); 2919 } 2920 2921 /* Abnormal calls may appear to have values live in st(0), but the 2922 abnormal return path will not have actually loaded the values. */ 2923 if (e->flags & EDGE_ABNORMAL_CALL) 2924 { 2925 /* Assert that the lifetimes are as we expect -- one value 2926 live at st(0) on the end of the source block, and no 2927 values live at the beginning of the destination block. 2928 For complex return values, we may have st(1) live as well. */ 2929 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2930 gcc_assert (target_stack->top == -1); 2931 return false; 2932 } 2933 2934 /* Handle non-call EH edges specially. The normal return path have 2935 values in registers. These will be popped en masse by the unwind 2936 library. */ 2937 if (e->flags & EDGE_EH) 2938 { 2939 gcc_assert (target_stack->top == -1); 2940 return false; 2941 } 2942 2943 /* We don't support abnormal edges. Global takes care to 2944 avoid any live register across them, so we should never 2945 have to insert instructions on such edges. */ 2946 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2947 2948 /* Make a copy of source_stack as change_stack is destructive. */ 2949 regstack = *source_stack; 2950 2951 /* It is better to output directly to the end of the block 2952 instead of to the edge, because emit_swap can do minimal 2953 insn scheduling. We can do this when there is only one 2954 edge out, and it is not abnormal. */ 2955 if (EDGE_COUNT (source->succs) == 1) 2956 { 2957 current_block = source; 2958 change_stack (BB_END (source), ®stack, target_stack, 2959 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2960 } 2961 else 2962 { 2963 rtx_insn *seq; 2964 rtx_note *after; 2965 2966 current_block = NULL; 2967 start_sequence (); 2968 2969 /* ??? change_stack needs some point to emit insns after. */ 2970 after = emit_note (NOTE_INSN_DELETED); 2971 2972 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2973 2974 seq = get_insns (); 2975 end_sequence (); 2976 2977 set_insn_locations (seq, e->goto_locus); 2978 insert_insn_on_edge (seq, e); 2979 return true; 2980 } 2981 return false; 2982} 2983 2984/* Traverse all non-entry edges in the CFG, and emit the necessary 2985 edge compensation code to change the stack from stack_out of the 2986 source block to the stack_in of the destination block. */ 2987 2988static bool 2989compensate_edges (void) 2990{ 2991 bool inserted = false; 2992 basic_block bb; 2993 2994 starting_stack_p = false; 2995 2996 FOR_EACH_BB_FN (bb, cfun) 2997 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 2998 { 2999 edge e; 3000 edge_iterator ei; 3001 3002 FOR_EACH_EDGE (e, ei, bb->succs) 3003 inserted |= compensate_edge (e); 3004 } 3005 return inserted; 3006} 3007 3008/* Select the better of two edges E1 and E2 to use to determine the 3009 stack layout for their shared destination basic block. This is 3010 typically the more frequently executed. The edge E1 may be NULL 3011 (in which case E2 is returned), but E2 is always non-NULL. */ 3012 3013static edge 3014better_edge (edge e1, edge e2) 3015{ 3016 if (!e1) 3017 return e2; 3018 3019 if (e1->count () > e2->count ()) 3020 return e1; 3021 if (e1->count () < e2->count ()) 3022 return e2; 3023 3024 /* Prefer critical edges to minimize inserting compensation code on 3025 critical edges. */ 3026 3027 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 3028 return EDGE_CRITICAL_P (e1) ? e1 : e2; 3029 3030 /* Avoid non-deterministic behavior. */ 3031 return (e1->src->index < e2->src->index) ? e1 : e2; 3032} 3033 3034/* Convert stack register references in one block. Return true if the CFG 3035 has been modified in the process. */ 3036 3037static bool 3038convert_regs_1 (basic_block block) 3039{ 3040 struct stack_def regstack; 3041 block_info bi = BLOCK_INFO (block); 3042 int reg; 3043 rtx_insn *insn, *next; 3044 bool control_flow_insn_deleted = false; 3045 bool cfg_altered = false; 3046 int debug_insns_with_starting_stack = 0; 3047 3048 any_malformed_asm = false; 3049 3050 /* Choose an initial stack layout, if one hasn't already been chosen. */ 3051 if (bi->stack_in.top == -2) 3052 { 3053 edge e, beste = NULL; 3054 edge_iterator ei; 3055 3056 /* Select the best incoming edge (typically the most frequent) to 3057 use as a template for this basic block. */ 3058 FOR_EACH_EDGE (e, ei, block->preds) 3059 if (BLOCK_INFO (e->src)->done) 3060 beste = better_edge (beste, e); 3061 3062 if (beste) 3063 propagate_stack (beste); 3064 else 3065 { 3066 /* No predecessors. Create an arbitrary input stack. */ 3067 bi->stack_in.top = -1; 3068 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 3069 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 3070 bi->stack_in.reg[++bi->stack_in.top] = reg; 3071 } 3072 } 3073 3074 if (dump_file) 3075 { 3076 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 3077 print_stack (dump_file, &bi->stack_in); 3078 } 3079 3080 /* Process all insns in this block. Keep track of NEXT so that we 3081 don't process insns emitted while substituting in INSN. */ 3082 current_block = block; 3083 next = BB_HEAD (block); 3084 regstack = bi->stack_in; 3085 starting_stack_p = true; 3086 3087 do 3088 { 3089 insn = next; 3090 next = NEXT_INSN (insn); 3091 3092 /* Ensure we have not missed a block boundary. */ 3093 gcc_assert (next); 3094 if (insn == BB_END (block)) 3095 next = NULL; 3096 3097 /* Don't bother processing unless there is a stack reg 3098 mentioned or if it's a CALL_INSN. */ 3099 if (DEBUG_BIND_INSN_P (insn)) 3100 { 3101 if (starting_stack_p) 3102 debug_insns_with_starting_stack++; 3103 else 3104 { 3105 subst_all_stack_regs_in_debug_insn (insn, ®stack); 3106 3107 /* Nothing must ever die at a debug insn. If something 3108 is referenced in it that becomes dead, it should have 3109 died before and the reference in the debug insn 3110 should have been removed so as to avoid changing code 3111 generation. */ 3112 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); 3113 } 3114 } 3115 else if (stack_regs_mentioned (insn) 3116 || CALL_P (insn)) 3117 { 3118 if (dump_file) 3119 { 3120 fprintf (dump_file, " insn %d input stack: ", 3121 INSN_UID (insn)); 3122 print_stack (dump_file, ®stack); 3123 } 3124 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3125 starting_stack_p = false; 3126 } 3127 } 3128 while (next); 3129 3130 if (debug_insns_with_starting_stack) 3131 { 3132 /* Since it's the first non-debug instruction that determines 3133 the stack requirements of the current basic block, we refrain 3134 from updating debug insns before it in the loop above, and 3135 fix them up here. */ 3136 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; 3137 insn = NEXT_INSN (insn)) 3138 { 3139 if (!DEBUG_BIND_INSN_P (insn)) 3140 continue; 3141 3142 debug_insns_with_starting_stack--; 3143 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in); 3144 } 3145 } 3146 3147 if (dump_file) 3148 { 3149 fprintf (dump_file, "Expected live registers ["); 3150 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3151 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 3152 fprintf (dump_file, " %d", reg); 3153 fprintf (dump_file, " ]\nOutput stack: "); 3154 print_stack (dump_file, ®stack); 3155 } 3156 3157 insn = BB_END (block); 3158 if (JUMP_P (insn)) 3159 insn = PREV_INSN (insn); 3160 3161 /* If the function is declared to return a value, but it returns one 3162 in only some cases, some registers might come live here. Emit 3163 necessary moves for them. */ 3164 3165 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 3166 { 3167 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 3168 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 3169 { 3170 rtx set; 3171 3172 if (dump_file) 3173 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 3174 3175 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num); 3176 insn = emit_insn_after (set, insn); 3177 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 3178 } 3179 } 3180 3181 /* Amongst the insns possibly deleted during the substitution process above, 3182 might have been the only trapping insn in the block. We purge the now 3183 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 3184 called at the end of convert_regs. The order in which we process the 3185 blocks ensures that we never delete an already processed edge. 3186 3187 Note that, at this point, the CFG may have been damaged by the emission 3188 of instructions after an abnormal call, which moves the basic block end 3189 (and is the reason why we call fixup_abnormal_edges later). So we must 3190 be sure that the trapping insn has been deleted before trying to purge 3191 dead edges, otherwise we risk purging valid edges. 3192 3193 ??? We are normally supposed not to delete trapping insns, so we pretend 3194 that the insns deleted above don't actually trap. It would have been 3195 better to detect this earlier and avoid creating the EH edge in the first 3196 place, still, but we don't have enough information at that time. */ 3197 3198 if (control_flow_insn_deleted) 3199 cfg_altered |= purge_dead_edges (block); 3200 3201 /* Something failed if the stack lives don't match. If we had malformed 3202 asms, we zapped the instruction itself, but that didn't produce the 3203 same pattern of register kills as before. */ 3204 3205 gcc_assert (regstack.reg_set == bi->out_reg_set || any_malformed_asm); 3206 bi->stack_out = regstack; 3207 bi->done = true; 3208 3209 return cfg_altered; 3210} 3211 3212/* Convert registers in all blocks reachable from BLOCK. Return true if the 3213 CFG has been modified in the process. */ 3214 3215static bool 3216convert_regs_2 (basic_block block) 3217{ 3218 basic_block *stack, *sp; 3219 bool cfg_altered = false; 3220 3221 /* We process the blocks in a top-down manner, in a way such that one block 3222 is only processed after all its predecessors. The number of predecessors 3223 of every block has already been computed. */ 3224 3225 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun)); 3226 sp = stack; 3227 3228 *sp++ = block; 3229 3230 do 3231 { 3232 edge e; 3233 edge_iterator ei; 3234 3235 block = *--sp; 3236 3237 /* Processing BLOCK is achieved by convert_regs_1, which may purge 3238 some dead EH outgoing edge after the deletion of the trapping 3239 insn inside the block. Since the number of predecessors of 3240 BLOCK's successors was computed based on the initial edge set, 3241 we check the necessity to process some of these successors 3242 before such an edge deletion may happen. However, there is 3243 a pitfall: if BLOCK is the only predecessor of a successor and 3244 the edge between them happens to be deleted, the successor 3245 becomes unreachable and should not be processed. The problem 3246 is that there is no way to preventively detect this case so we 3247 stack the successor in all cases and hand over the task of 3248 fixing up the discrepancy to convert_regs_1. */ 3249 3250 FOR_EACH_EDGE (e, ei, block->succs) 3251 if (! (e->flags & EDGE_DFS_BACK)) 3252 { 3253 BLOCK_INFO (e->dest)->predecessors--; 3254 if (!BLOCK_INFO (e->dest)->predecessors) 3255 *sp++ = e->dest; 3256 } 3257 3258 cfg_altered |= convert_regs_1 (block); 3259 } 3260 while (sp != stack); 3261 3262 free (stack); 3263 3264 return cfg_altered; 3265} 3266 3267/* Traverse all basic blocks in a function, converting the register 3268 references in each insn from the "flat" register file that gcc uses, 3269 to the stack-like registers the 387 uses. */ 3270 3271static void 3272convert_regs (void) 3273{ 3274 bool cfg_altered = false; 3275 int inserted; 3276 basic_block b; 3277 edge e; 3278 edge_iterator ei; 3279 3280 /* Initialize uninitialized registers on function entry. */ 3281 inserted = convert_regs_entry (); 3282 3283 /* Construct the desired stack for function exit. */ 3284 convert_regs_exit (); 3285 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1; 3286 3287 /* ??? Future: process inner loops first, and give them arbitrary 3288 initial stacks which emit_swap_insn can modify. This ought to 3289 prevent double fxch that often appears at the head of a loop. */ 3290 3291 /* Process all blocks reachable from all entry points. */ 3292 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs) 3293 cfg_altered |= convert_regs_2 (e->dest); 3294 3295 /* ??? Process all unreachable blocks. Though there's no excuse 3296 for keeping these even when not optimizing. */ 3297 FOR_EACH_BB_FN (b, cfun) 3298 { 3299 block_info bi = BLOCK_INFO (b); 3300 3301 if (! bi->done) 3302 cfg_altered |= convert_regs_2 (b); 3303 } 3304 3305 /* We must fix up abnormal edges before inserting compensation code 3306 because both mechanisms insert insns on edges. */ 3307 inserted |= fixup_abnormal_edges (); 3308 3309 inserted |= compensate_edges (); 3310 3311 clear_aux_for_blocks (); 3312 3313 if (inserted) 3314 commit_edge_insertions (); 3315 3316 if (cfg_altered) 3317 cleanup_cfg (0); 3318 3319 if (dump_file) 3320 fputc ('\n', dump_file); 3321} 3322 3323/* Convert register usage from "flat" register file usage to a "stack 3324 register file. FILE is the dump file, if used. 3325 3326 Construct a CFG and run life analysis. Then convert each insn one 3327 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3328 code duplication created when the converter inserts pop insns on 3329 the edges. */ 3330 3331static bool 3332reg_to_stack (void) 3333{ 3334 basic_block bb; 3335 int i; 3336 int max_uid; 3337 3338 /* Clean up previous run. */ 3339 stack_regs_mentioned_data.release (); 3340 3341 /* See if there is something to do. Flow analysis is quite 3342 expensive so we might save some compilation time. */ 3343 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3344 if (df_regs_ever_live_p (i)) 3345 break; 3346 if (i > LAST_STACK_REG) 3347 return false; 3348 3349 df_note_add_problem (); 3350 df_analyze (); 3351 3352 mark_dfs_back_edges (); 3353 3354 /* Set up block info for each basic block. */ 3355 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3356 FOR_EACH_BB_FN (bb, cfun) 3357 { 3358 block_info bi = BLOCK_INFO (bb); 3359 edge_iterator ei; 3360 edge e; 3361 int reg; 3362 3363 FOR_EACH_EDGE (e, ei, bb->preds) 3364 if (!(e->flags & EDGE_DFS_BACK) 3365 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun)) 3366 bi->predecessors++; 3367 3368 /* Set current register status at last instruction `uninitialized'. */ 3369 bi->stack_in.top = -2; 3370 3371 /* Copy live_at_end and live_at_start into temporaries. */ 3372 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3373 { 3374 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) 3375 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3376 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) 3377 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3378 } 3379 } 3380 3381 /* Create the replacement registers up front. */ 3382 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3383 { 3384 machine_mode mode; 3385 FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT) 3386 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3387 FOR_EACH_MODE_IN_CLASS (mode, MODE_COMPLEX_FLOAT) 3388 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3389 } 3390 3391 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3392 3393 /* A QNaN for initializing uninitialized variables. 3394 3395 ??? We can't load from constant memory in PIC mode, because 3396 we're inserting these instructions before the prologue and 3397 the PIC register hasn't been set up. In that case, fall back 3398 on zero, which we can get from `fldz'. */ 3399 3400 if ((flag_pic && !TARGET_64BIT) 3401 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) 3402 not_a_num = CONST0_RTX (SFmode); 3403 else 3404 { 3405 REAL_VALUE_TYPE r; 3406 3407 real_nan (&r, "", 1, SFmode); 3408 not_a_num = const_double_from_real_value (r, SFmode); 3409 not_a_num = force_const_mem (SFmode, not_a_num); 3410 } 3411 3412 /* Allocate a cache for stack_regs_mentioned. */ 3413 max_uid = get_max_uid (); 3414 stack_regs_mentioned_data.create (max_uid + 1); 3415 memset (stack_regs_mentioned_data.address (), 3416 0, sizeof (char) * (max_uid + 1)); 3417 3418 convert_regs (); 3419 3420 free_aux_for_blocks (); 3421 return true; 3422} 3423#endif /* STACK_REGS */ 3424 3425namespace { 3426 3427const pass_data pass_data_stack_regs = 3428{ 3429 RTL_PASS, /* type */ 3430 "*stack_regs", /* name */ 3431 OPTGROUP_NONE, /* optinfo_flags */ 3432 TV_REG_STACK, /* tv_id */ 3433 0, /* properties_required */ 3434 0, /* properties_provided */ 3435 0, /* properties_destroyed */ 3436 0, /* todo_flags_start */ 3437 0, /* todo_flags_finish */ 3438}; 3439 3440class pass_stack_regs : public rtl_opt_pass 3441{ 3442public: 3443 pass_stack_regs (gcc::context *ctxt) 3444 : rtl_opt_pass (pass_data_stack_regs, ctxt) 3445 {} 3446 3447 /* opt_pass methods: */ 3448 virtual bool gate (function *) 3449 { 3450#ifdef STACK_REGS 3451 return true; 3452#else 3453 return false; 3454#endif 3455 } 3456 3457}; // class pass_stack_regs 3458 3459} // anon namespace 3460 3461rtl_opt_pass * 3462make_pass_stack_regs (gcc::context *ctxt) 3463{ 3464 return new pass_stack_regs (ctxt); 3465} 3466 3467/* Convert register usage from flat register file usage to a stack 3468 register file. */ 3469static unsigned int 3470rest_of_handle_stack_regs (void) 3471{ 3472#ifdef STACK_REGS 3473 reg_to_stack (); 3474 regstack_completed = 1; 3475#endif 3476 return 0; 3477} 3478 3479namespace { 3480 3481const pass_data pass_data_stack_regs_run = 3482{ 3483 RTL_PASS, /* type */ 3484 "stack", /* name */ 3485 OPTGROUP_NONE, /* optinfo_flags */ 3486 TV_REG_STACK, /* tv_id */ 3487 0, /* properties_required */ 3488 0, /* properties_provided */ 3489 0, /* properties_destroyed */ 3490 0, /* todo_flags_start */ 3491 TODO_df_finish, /* todo_flags_finish */ 3492}; 3493 3494class pass_stack_regs_run : public rtl_opt_pass 3495{ 3496public: 3497 pass_stack_regs_run (gcc::context *ctxt) 3498 : rtl_opt_pass (pass_data_stack_regs_run, ctxt) 3499 {} 3500 3501 /* opt_pass methods: */ 3502 virtual unsigned int execute (function *) 3503 { 3504 return rest_of_handle_stack_regs (); 3505 } 3506 3507}; // class pass_stack_regs_run 3508 3509} // anon namespace 3510 3511rtl_opt_pass * 3512make_pass_stack_regs_run (gcc::context *ctxt) 3513{ 3514 return new pass_stack_regs_run (ctxt); 3515} 3516