/netbsd-current/sys/dev/pci/ |
H A D | bha_pci.c | 97 pcireg_t csr; local 127 csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 129 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
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H A D | dpt_pci.c | 88 pcireg_t csr; local 114 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 116 csr | PCI_COMMAND_MASTER_ENABLE);
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H A D | pci_map.c | 52 pcireg_t address, mask, csr; local 83 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 85 csr & ~PCI_COMMAND_IO_ENABLE) ; 89 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 119 pcireg_t csr; local 151 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 158 csr & ~PCI_COMMAND_MEM_ENABLE) ; 170 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 508 pcireg_t address, mask, csr; local 518 csr 576 pcireg_t csr; local [all...] |
H A D | xhci_pci.c | 127 pcireg_t csr, memtype, usbrev; local 142 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 143 if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) { 148 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, 150 csr |= PCI_COMMAND_MEM_ENABLE; 152 csr); 213 csr | PCI_COMMAND_MASTER_ENABLE);
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H A D | ohci_pci.c | 91 pcireg_t csr; local 105 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 107 printf("csr: %08x\n", csr); 109 if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) { 132 csr | PCI_COMMAND_MASTER_ENABLE);
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H A D | if_hme_pci.c | 118 pcireg_t csr; local 149 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 158 csr |= PCI_COMMAND_MEM_ENABLE; 162 csr |= PCI_COMMAND_IO_ENABLE; 167 csr | PCI_COMMAND_MEM_ENABLE);
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/netbsd-current/sys/arch/newsmips/apbus/ |
H A D | dmac3reg.h | 30 volatile uint32_t csr; member in struct:dmac3reg
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/netbsd-current/sys/rump/dev/lib/libpci/ |
H A D | rumpdev_pci.c | 58 unsigned csr; local 72 PCI_COMMAND_STATUS_REG, &csr); 73 if (rv == 0 && (csr & PCI_COMMAND_MEM_ENABLE) == 0) { 75 PCI_COMMAND_STATUS_REG, csr | PCI_COMMAND_MEM_ENABLE);
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/netbsd-current/sys/arch/powerpc/ibm4xx/pci/ |
H A D | pci_machdep.c | 199 pcireg_t csr; local 202 csr = ibm4xx_pci_conf_read(v, tag, PCI_CLASS_REG); 203 csr |= (PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1)) 205 ibm4xx_pci_conf_write(v, tag, PCI_CLASS_REG, csr);
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/netbsd-current/sys/arch/arm/at91/ |
H A D | at91spi.c | 204 uint32_t csr; local 209 csr = GETREG(sc, SPI_CSR(0)); /* read register */ 210 csr &= SPI_CSR_RESERVED; /* keep reserved bits */ 211 csr |= SPI_CSR_BITS_8; /* assume 8 bit transfers */ 222 csr |= scbr << SPI_CSR_SCBR_SHIFT; 232 csr |= SPI_CSR_NCPHA; /* CPHA = 0, CPOL = 0 */ 235 csr |= 0; /* CPHA = 1, CPOL = 0 */ 238 csr |= SPI_CSR_NCPHA /* CPHA = 0, CPOL = 1 */ 242 csr |= SPI_CSR_CPOL; /* CPHA = 1, CPOL = 1 */ 248 PUTREG(sc, SPI_CSR(0), csr); [all...] |
H A D | at91usart.c | 160 inline static void at91usart_rxsoft(struct at91usart_softc *, struct tty *, unsigned csr); 516 DPRINTFN(5, ("%s: %s, ier=%08x (csr=%08x)\n", device_xname(sc->sc_dev), __FUNCTION__, sc->sc_ier, at91usart_readreg(sc, US_CSR))); 964 at91usart_rxsoft(struct at91usart_softc *sc, struct tty *tp, unsigned csr) argument 972 if (ISSET(csr, US_CSR_TIMEOUT | US_CSR_RXBRK)) 979 if (!ISSET(csr, US_CSR_TIMEOUT | US_CSR_RXBRK)) 1047 u_int csr; local 1053 csr = sc->sc_csr; 1054 while (csr != 0) { 1055 if ((csr &= sc->sc_ier) == 0) 1058 DPRINTFN(5, ("%s: %s / csr 1096 u_int csr, imr; local [all...] |
/netbsd-current/sys/arch/evbarm/stand/boot2440/ |
H A D | dm9000.c | 115 unsigned int csr; member in struct:local 136 *(volatile uint8_t *)(l->csr) = reg; 137 return *(volatile uint8_t*)(l->csr + 4); 143 *(volatile uint8_t *)(l->csr) = reg; 144 return *(volatile uint16_t *)(l->csr + 4); 150 *(volatile uint8_t *)(l->csr) = reg; 151 *(volatile uint8_t *)(l->csr + 4) = data; 157 *(volatile uint8_t *)(l->csr) = reg; 158 *(volatile uint16_t *)(l->csr + 4) = data; 169 l->csr [all...] |
/netbsd-current/sys/arch/sun3/dev/ |
H A D | dmavar.h | 55 #define DMA_SCSR(sc, csr) \ 56 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, DMA_REG_CSR, (csr))
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/netbsd-current/sys/dev/usb/ |
H A D | motg.c | 1396 uint8_t csr; local 1411 csr = UREAD1(sc, MUSB2_REG_TXCSRL); 1412 DPRINTFN(MD_CTRL, "phase %jd csr %#jx xfer %#jx status %jd", 1413 ep->phase, csr, (uintptr_t)xfer, 1416 if (csr & MUSB2_MASK_CSR0L_NAKTIMO) { 1417 csr &= ~MUSB2_MASK_CSR0L_REQPKT; 1418 UWRITE1(sc, MUSB2_REG_TXCSRL, csr); 1420 csr &= ~MUSB2_MASK_CSR0L_NAKTIMO; 1421 UWRITE1(sc, MUSB2_REG_TXCSRL, csr); 1425 if (csr 1517 uint8_t csr; local 1913 uint8_t csr; local 2034 uint8_t csr; local 2178 uint8_t csr; local [all...] |
/netbsd-current/sys/dev/qbus/ |
H A D | if_il.c | 101 short sc_lastcmd; /* can't read csr, so must save it */ 129 #define IL_WCSR(csr, val) \ 130 bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val) 131 #define IL_RCSR(csr) \ 132 bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr) 235 aprint_error_dev(sc->sc_dev, "%s failed, csr=%s\n", op, bits); 410 short csr; local 418 csr = ((sc->sc_ui.ui_baddr >> 2) & IL_EUA) 430 csr = ((sc->sc_ifuba.ifu_w.ifrw_info >> 2) & IL_EUA) 434 sc->sc_lastcmd = csr 447 short csr; local [all...] |
/netbsd-current/external/gpl3/gdb/dist/sim/riscv/ |
H A D | sim-main.c | 78 fetch_csr (SIM_CPU *cpu, const char *name, int csr, unsigned_word *reg) 81 switch (csr) 95 store_csr (SIM_CPU *cpu, const char *name, int csr, unsigned_word *reg, 98 switch (csr) 104 cpu->csr.fcsr = (cpu->csr.fcsr & ~0xe0) | (val << 5); 109 cpu->csr.fcsr = (cpu->csr.fcsr & ~0x1f) | val; 114 cpu->csr.frm = (val >> 5) & 0x7; 115 cpu->csr 76 fetch_csr(SIM_CPU *cpu, const char *name, int csr, unsigned_word *reg) argument 93 store_csr(SIM_CPU *cpu, const char *name, int csr, unsigned_word *reg, unsigned_word val) argument 156 unsigned int csr = (iw >> OP_SH_CSR) & OP_MASK_CSR; local [all...] |
/netbsd-current/sys/arch/sparc64/dev/ |
H A D | pci_machdep.c | 254 pcireg_t class, csr, bhlc, ic; local 286 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 287 csr |= PCI_COMMAND_PARITY_ENABLE; 288 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 337 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 338 if (csr & PCI_STATUS_BACKTOBACK_SUPPORT) 339 csr |= PCI_COMMAND_BACKTOBACK_ENABLE; 340 csr |= PCI_COMMAND_PARITY_ENABLE; 341 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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/netbsd-current/sys/dev/cardbus/ |
H A D | njata_cardbus.c | 131 int csr; local 146 csr = PCI_COMMAND_MASTER_ENABLE; 170 csr |= PCI_COMMAND_MEM_ENABLE; 181 csr |= PCI_COMMAND_IO_ENABLE; 193 reg |= csr;
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H A D | njs_cardbus.c | 127 pcireg_t csr, reg; local 144 csr = PCI_COMMAND_MASTER_ENABLE; 164 csr |= PCI_COMMAND_MEM_ENABLE; 174 csr |= PCI_COMMAND_IO_ENABLE; 186 reg |= csr;
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H A D | siisata_cardbus.c | 141 pcireg_t csr; local 239 csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); 240 csr |= PCI_COMMAND_MASTER_ENABLE; 241 csr |= PCI_COMMAND_MEM_ENABLE; 242 Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, csr);
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H A D | fwohci_cardbus.c | 93 pcireg_t csr; local 120 csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); 122 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE);
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/netbsd-current/sys/arch/atari/pci/ |
H A D | pci_hades.c | 231 uint32_t csr; local 236 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 237 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE); 238 csr |= PCI_COMMAND_MASTER_ENABLE; 239 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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H A D | pci_tseng.c | 84 uint32_t csr; local 93 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 94 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE); 95 csr |= PCI_COMMAND_MASTER_ENABLE; 96 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
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/netbsd-current/sys/dev/mii/ |
H A D | lxtphy.c | 231 uint16_t bmcr, bmsr, csr; local 243 PHY_READ(sc, MII_LXTPHY_CSR, &csr); 244 if (csr & CSR_LINK) 265 if (csr & CSR_SPEED) 270 if (csr & CSR_DUPLEX)
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/netbsd-current/sys/arch/emips/ebus/ |
H A D | dz_ebus.c | 524 dzrint(struct dz_softc *sc, uint32_t csr) argument 537 if (csr & (USI_OVRE|USI_FRAME|USI_PARE)) 545 if (csr & USI_OVRE) { 550 if (csr & USI_FRAME) 552 if (csr & USI_PARE) 566 dzxint(struct dz_softc *sc, uint32_t csr) argument 709 uint32_t csr; local 716 for (; ((csr = (dzr->ChannelStatus & dzr->IntrMask)) & 718 if ((csr & USI_INTRS) != 0) 719 dzrint(sc, csr); [all...] |