/macosx-10.10.1/llvmCore-3425.0.34/lib/Analysis/ |
H A D | CaptureTracking.cpp | 101 switch (I->getOpcode()) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGSDNodes.h | 68 if (Node->getOpcode() == ISD::EntryToken ||
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H A D | ScheduleDAGSDNodes.cpp | 114 if (Op != 2 || User->getOpcode() != ISD::CopyToReg) 155 DAG->MorphNodeTo(N, N->getOpcode(), VTList, &Ops[0], Ops.size()); 389 if (NI->getOpcode() == ISD::TokenFactor) 411 if (SUNode->getOpcode() != ISD::CopyToReg) 485 if(isChain && OpN->getOpcode() == ISD::TokenFactor) 531 if (Node->getOpcode() == ISD::CopyFromReg) 590 if (N && N->getOpcode() == ISD::TokenFactor) { 632 if (Latency > 1 && Use->getOpcode() == ISD::CopyToReg &&
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMMCInstLower.cpp | 116 OutMI.setOpcode(MI->getOpcode());
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H A D | ARMISelLowering.cpp | 1687 if (Arg.getOpcode() == ISD::CopyFromReg) { 1963 if (Copy->getOpcode() == ISD::CopyToReg) { 1969 } else if (Copy->getOpcode() == ARMISD::VMOVRRD) { 1975 if (UI->getOpcode() != ISD::CopyToReg) 1992 } else if (Copy->getOpcode() == ISD::BITCAST) { 1997 if (Copy->getOpcode() != ISD::CopyToReg || !Copy->hasNUsesOfValue(1, 0)) 2007 if (UI->getOpcode() != ARMISD::RET_FLAG) 2763 if (Op.getOperand(1).getOpcode() == ARMISD::Wrapper) { 2849 unsigned Opc = Cmp.getOpcode(); 2856 Opc = Cmp.getOpcode(); [all...] |
H A D | ARMFrameLowering.cpp | 97 if (MI->getOpcode() == ARM::LDMIA_RET || 98 MI->getOpcode() == ARM::t2LDMIA_RET || 99 MI->getOpcode() == ARM::LDMIA_UPD || 100 MI->getOpcode() == ARM::t2LDMIA_UPD || 101 MI->getOpcode() == ARM::VLDMDIA_UPD) { 109 if ((MI->getOpcode() == ARM::LDR_POST_IMM || 110 MI->getOpcode() == ARM::LDR_POST_REG || 111 MI->getOpcode() == ARM::t2LDR_POST) && 248 while (MBBI->getOpcode() == ARM::VSTMDDB_UPD) 348 unsigned RetOpcode = MBBI->getOpcode(); [all...] |
H A D | ARMLoadStoreOptimizer.cpp | 537 switch (MI->getOpcode()) { 551 unsigned Scale = (MI->getOpcode() == ARM::tSUBspi) ? 4 : 1; // FIXME 570 switch (MI->getOpcode()) { 584 unsigned Scale = (MI->getOpcode() == ARM::tADDspi) ? 4 : 1; // FIXME 596 switch (MI->getOpcode()) { 720 int Opcode = MI->getOpcode(); 854 int Opcode = MI->getOpcode(); 1012 int Opcode = MI->getOpcode(); 1049 int Opcode = MI->getOpcode(); 1099 unsigned Opcode = MI->getOpcode(); [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/ |
H A D | MSP430MCInstLower.cpp | 110 OutMI.setOpcode(MI->getOpcode());
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
H A D | MipsSERegisterInfo.cpp | 56 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Transforms/Scalar/ |
H A D | EarlyCSE.cpp | 121 return (Res << 1) ^ Inst->getOpcode(); 130 if (LHSI->getOpcode() != RHSI->getOpcode()) return false; 194 return (Res << 1) ^ Inst->getOpcode();
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H A D | CorrelatedValuePropagation.cpp | 273 switch (II->getOpcode()) { 292 switch (Term->getOpcode()) {
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/macosx-10.10.1/llvmCore-3425.0.34/utils/TableGen/ |
H A D | DAGISelMatcher.cpp | 367 return COM->getOpcode().getEnumName() != getOpcode().getEnumName(); 375 if (CT->getResNo() >= getOpcode().getNumResults()) 378 MVT::SimpleValueType NodeType = getOpcode().getKnownType(CT->getResNo());
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 308 OutMI.setOpcode(MI->getOpcode()); 354 switch (OutMI.getOpcode()) { 396 unsigned Opcode = OutMI.getOpcode(); 416 switch (OutMI.getOpcode()) { 552 bool is64Bits = MI.getOpcode() == X86::TLS_addr64 || 553 MI.getOpcode() == X86::TLS_base_addr64; 555 bool needsPadding = MI.getOpcode() == X86::TLS_addr64; 566 switch (MI.getOpcode()) { 640 switch (MI->getOpcode()) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 636 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; 637 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands; 661 switch (MI.getOpcode()) { 701 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; 702 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands; 738 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; 740 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands; 800 if (MI.getOpcode() == ARM::t2IT && ITBlock.instrInITBlock()) 808 if (MI.getOpcode() == ARM::t2IT) { 1101 if (Inst.getOpcode() [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonVLIWPacketizer.cpp | 237 return ((MI->getOpcode() == Hexagon::CALLR) || 238 (MI->getOpcode() == Hexagon::CALLRv3)); 337 return (MI->getOpcode() == Hexagon::JMP); 341 switch (MI->getOpcode()) { 371 switch (MI->getOpcode()) 477 return (MI->getOpcode() == Hexagon::LOOP0_i || 478 MI->getOpcode() == Hexagon::LOOP0_r); 1447 NewOpcode = GetDotNewPredOp(MI->getOpcode()); 1449 NewOpcode = GetDotNewOp(MI->getOpcode()); 2159 int NewOpcode = GetDotOldOp(MI->getOpcode()); [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 595 if (basePtr.getOpcode() == ISD::ADD 613 } else if ((basePtr.getOpcode() == SPUISD::AFormAddr) 614 || (basePtr.getOpcode() == SPUISD::IndirectAddr 615 && basePtr.getOperand(0).getOpcode() == SPUISD::Hi 616 && basePtr.getOperand(1).getOpcode() == SPUISD::Lo)) { 635 if (basePtr.getOpcode() == ISD::ADD) { 803 if (basePtr.getOpcode() == ISD::ADD 830 if (basePtr.getOpcode() == ISD::ADD) { 877 && (theValue.getOpcode() == ISD::AssertZext 878 || theValue.getOpcode() [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/VMCore/ |
H A D | ConstantFold.cpp | 87 Instruction::CastOps firstOp = Instruction::CastOps(Op->getOpcode()); 216 switch (CE->getOpcode()) { 531 } else if (CE->getOpcode() == Instruction::GetElementPtr) { 609 if (CE->getOpcode() == Instruction::GetElementPtr && 725 if (TrueVal->getOpcode() == Instruction::Select) 730 if (FalseVal->getOpcode() == Instruction::Select) 973 if (CE1->getOpcode() == Instruction::ZExt) { 983 if (CE1->getOpcode() == Instruction::PtrToInt && 1013 switch (CE1->getOpcode()) { 1029 if (CE1->getOpcode() [all...] |
H A D | Globals.cpp | 234 assert((CE->getOpcode() == Instruction::BitCast || 235 CE->getOpcode() == Instruction::GetElementPtr) &&
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H A D | Instructions.cpp | 1598 if (CE->getOpcode() == Instruction::UserOp1) 1921 if (Bop->getOpcode() == Instruction::Sub) 1929 if (Bop->getOpcode() == Instruction::FSub) 1937 return (Bop->getOpcode() == Instruction::Xor && 2036 switch (getOpcode()) { 2050 if (getOpcode() != Instruction::BitCast) 2102 return isNoopCast(getOpcode(), getOperand(0)->getType(), getType(), IntPtrTy); 2695 assert(castIsValid(getOpcode(), S, Ty) && "Illegal Trunc"); 2701 assert(castIsValid(getOpcode(), S, Ty) && "Illegal Trunc"); 2707 assert(castIsValid(getOpcode(), [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/Support/ |
H A D | CallSite.h | 63 if (II->getOpcode() == Instruction::Call) 65 else if (II->getOpcode() == Instruction::Invoke)
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeDelaySlotFiller.cpp | 92 switch (instr->getOpcode()) { 191 unsigned op = I->getOpcode();
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 117 unsigned Opcode = MI.getOpcode(); 121 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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/macosx-10.10.1/llvmCore-3425.0.34/lib/MC/ |
H A D | MCExpr.cpp | 75 switch (UE.getOpcode()) { 95 switch (BE.getOpcode()) { 505 switch (AUE->getOpcode()) { 544 switch (ABE->getOpcode()) { 567 switch (ABE->getOpcode()) {
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/macosx-10.10.1/llvmCore-3425.0.34/tools/llvm-diff/ |
H A D | DifferenceEngine.cpp | 254 if (L->getOpcode() != R->getOpcode()) { 403 if (L->getOpcode() != R->getOpcode()) 406 switch (L->getOpcode()) {
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 786 bool DivIsSigned = DivI->getOpcode() == Instruction::SDiv; 945 if (ICI.isSigned() != (Shr->getOpcode() == Instruction::AShr)) 951 if (Shr->getOpcode() == Instruction::AShr && 962 Shr->getOpcode() == Instruction::AShr ? 974 assert(TheDiv->getOpcode() == Instruction::SDiv || 975 TheDiv->getOpcode() == Instruction::UDiv); 987 if (Shr->getOpcode() == Instruction::LShr) 1025 switch (LHSI->getOpcode()) { 1174 if (Shift->getOpcode() == Instruction::Shl) 1181 if (ConstantExpr::get(Shift->getOpcode(), [all...] |