/linux-master/drivers/gpu/drm/i915/display/ |
H A D | icl_dsi_regs.h | 131 #define CLK_PRE_MASK (0x3 << 16) 198 #define OP_MODE_MASK (0x3 << 28) 203 #define VIDEO_MODE_SYNC_PULSE (0x3 << 28) 206 #define PIX_FMT_MASK (0x3 << 16) 211 #define PIX_FMT_RGB888 (0x3 << 16) 217 #define PIX_VIRT_CHAN_MASK (0x3 << 12) 219 #define PIX_BUF_THRESHOLD_MASK (0x3 << 10) 224 #define PIX_BUF_THRESHOLD_FULL (0x3 << 10) 225 #define CONTINUOUS_CLK_MASK (0x3 << 8) 229 #define CLK_HS_CONTINUOUS (0x3 << [all...] |
/linux-master/sound/soc/codecs/ |
H A D | mt6359.h | 515 #define ACCDET_DSN_CBS_MASK 0x3 516 #define ACCDET_DSN_CBS_MASK_SFT (0x3 << 0) 520 #define ACCDET_DSN_BIX_MASK 0x3 521 #define ACCDET_DSN_BIX_MASK_SFT (0x3 << 2) 570 #define RG_AUDACCDETRSV_MASK 0x3 571 #define RG_AUDACCDETRSV_MASK_SFT (0x3 << 13) 705 #define ACCDET_PWM_EN_SEL_MASK 0x3 706 #define ACCDET_PWM_EN_SEL_MASK_SFT (0x3 << 14) 745 #define ACCDET_EINT_EN_PWM_WIDTH_MASK 0x3 746 #define ACCDET_EINT_EN_PWM_WIDTH_MASK_SFT (0x3 << [all...] |
H A D | da7219-aad.h | 115 #define DA7219_MIC_DET_THRESH_MASK (0x3 << 4) 127 #define DA7219_JACK_DETECT_RATE_MASK (0x3 << 4) 129 #define DA7219_JACKDET_REM_DEB_MASK (0x3 << 6) 149 #define DA7219_BUTTON_AVERAGE_MASK (0x3 << 0) 151 #define DA7219_ADC_1_BIT_REPEAT_MASK (0x3 << 2) 161 #define DA7219_HPTEST_RES_SEL_MASK (0x3 << 1)
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/linux-master/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6sll-pinfunc.h | 22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0 29 #define MX6SLL_PAD_REF_CLK_32K__USB_OTG1_ID 0x001C 0x02E4 0x055C 0x3 0x0 57 #define MX6SLL_PAD_KEY_ROW1__CSI_FIELD 0x0030 0x02F8 0x0000 0x3 0x0 63 #define MX6SLL_PAD_KEY_COL2__CSI_DATA12 0x0034 0x02FC 0x05B8 0x3 0x1 69 #define MX6SLL_PAD_KEY_ROW2__CSI_DATA13 0x0038 0x0300 0x05BC 0x3 0x1 75 #define MX6SLL_PAD_KEY_COL3__CSI_DATA14 0x003C 0x0304 0x05C0 0x3 0x1 81 #define MX6SLL_PAD_KEY_ROW3__CSI_DATA15 0x0040 0x0308 0x05C4 0x3 0x2 87 #define MX6SLL_PAD_KEY_COL4__CSI_DATA16 0x0044 0x030C 0x0000 0x3 0x0 93 #define MX6SLL_PAD_KEY_ROW4__CSI_DATA17 0x0048 0x0310 0x0000 0x3 0x0 99 #define MX6SLL_PAD_KEY_COL5__CSI_DATA18 0x004C 0x0314 0x0000 0x3 [all...] |
/linux-master/scripts/dtc/include-prefixes/arm/nxp/imx/ |
H A D | imx6sll-pinfunc.h | 22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0 29 #define MX6SLL_PAD_REF_CLK_32K__USB_OTG1_ID 0x001C 0x02E4 0x055C 0x3 0x0 57 #define MX6SLL_PAD_KEY_ROW1__CSI_FIELD 0x0030 0x02F8 0x0000 0x3 0x0 63 #define MX6SLL_PAD_KEY_COL2__CSI_DATA12 0x0034 0x02FC 0x05B8 0x3 0x1 69 #define MX6SLL_PAD_KEY_ROW2__CSI_DATA13 0x0038 0x0300 0x05BC 0x3 0x1 75 #define MX6SLL_PAD_KEY_COL3__CSI_DATA14 0x003C 0x0304 0x05C0 0x3 0x1 81 #define MX6SLL_PAD_KEY_ROW3__CSI_DATA15 0x0040 0x0308 0x05C4 0x3 0x2 87 #define MX6SLL_PAD_KEY_COL4__CSI_DATA16 0x0044 0x030C 0x0000 0x3 0x0 93 #define MX6SLL_PAD_KEY_ROW4__CSI_DATA17 0x0048 0x0310 0x0000 0x3 0x0 99 #define MX6SLL_PAD_KEY_COL5__CSI_DATA18 0x004C 0x0314 0x0000 0x3 [all...] |
/linux-master/drivers/clk/mmp/ |
H A D | clk-of-mmp2.c | 251 {MMP2_CLK_TWSI0, "twsi0_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI0, 0x7, 0x3, 0x0, 0, &reset_lock}, 252 {MMP2_CLK_TWSI1, "twsi1_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI1, 0x7, 0x3, 0x0, 0, &reset_lock}, 253 {MMP2_CLK_TWSI2, "twsi2_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI2, 0x7, 0x3, 0x0, 0, &reset_lock}, 254 {MMP2_CLK_TWSI3, "twsi3_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI3, 0x7, 0x3, 0x0, 0, &reset_lock}, 255 {MMP2_CLK_TWSI4, "twsi4_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI4, 0x7, 0x3, 0x0, 0, &reset_lock}, 256 {MMP2_CLK_TWSI5, "twsi5_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_TWSI5, 0x7, 0x3, 0x0, 0, &reset_lock}, 257 {MMP2_CLK_GPIO, "gpio_clk", "vctcxo", CLK_SET_RATE_PARENT, APBC_GPIO, 0x7, 0x3, 0x0, 0, &reset_lock}, 258 {MMP2_CLK_KPC, "kpc_clk", "clk32", CLK_SET_RATE_PARENT, APBC_KPC, 0x7, 0x3, 0x0, MMP_CLK_GATE_NEED_DELAY, &reset_lock}, 260 {MMP2_CLK_PWM0, "pwm0_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM0, 0x7, 0x3, 0x0, 0, &reset_lock}, 261 {MMP2_CLK_PWM1, "pwm1_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM1, 0x7, 0x3, [all...] |
/linux-master/drivers/pinctrl/mvebu/ |
H A D | pinctrl-kirkwood.c | 68 MPP_VAR_FUNCTION(0x3, "ptp", "trig", V(1, 1, 1, 1, 0, 0, 0))), 73 MPP_VAR_FUNCTION(0x3, "ptp", "trig", V(1, 1, 1, 1, 0, 0, 0)), 79 MPP_VAR_FUNCTION(0x3, "uart1", "rts", V(1, 1, 1, 1, 1, 1, 1)), 88 MPP_VAR_FUNCTION(0x3, "uart1", "cts", V(1, 1, 1, 1, 1, 1, 1)), 101 MPP_VAR_FUNCTION(0x3, "uart0", "rxd", V(1, 1, 1, 1, 1, 1, 1)), 116 MPP_VAR_FUNCTION(0x3, "uart1", "txd", V(1, 1, 1, 1, 1, 1, 1)), 122 MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V(1, 1, 1, 1, 1, 1, 1)), 131 MPP_VAR_FUNCTION(0x3, "uart1", "txd", V(1, 1, 1, 1, 1, 0, 0)), 138 MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V(1, 1, 1, 1, 1, 0, 0)), 159 MPP_VAR_FUNCTION(0x3, "ge [all...] |
H A D | pinctrl-armada-xp.c | 100 MPP_VAR_FUNCTION(0x3, "spi1", "mosi", V_MV78230_PLUS), 106 MPP_VAR_FUNCTION(0x3, "spi1", "sck", V_MV78230_PLUS), 117 MPP_VAR_FUNCTION(0x3, "spi1", "cs0", V_MV78230_PLUS), 123 MPP_VAR_FUNCTION(0x3, "spi1", "miso", V_MV78230_PLUS), 129 MPP_VAR_FUNCTION(0x3, "ptp", "trig", V_MV78230_PLUS), 135 MPP_VAR_FUNCTION(0x3, "ptp", "evreq", V_MV78230_PLUS), 141 MPP_VAR_FUNCTION(0x3, "ptp", "clk", V_MV78230_PLUS), 147 MPP_VAR_FUNCTION(0x3, "dram", "bat", V_MV78230_PLUS), 153 MPP_VAR_FUNCTION(0x3, "sata0", "prsnt", V_MV78230_PLUS), 159 MPP_VAR_FUNCTION(0x3, "sata [all...] |
/linux-master/drivers/scsi/bnx2i/ |
H A D | 57xx_iscsi_hsi.h | 124 #define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14) 130 #define ISCSI_CLEANUP_REQUEST_TYPE (0x3<<14) 177 #define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14) 183 #define ISCSI_CLEANUP_RESPONSE_TYPE (0x3<<14) 200 #define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3) 214 #define ISCSI_CMD_REQUEST_RESERVED1 (0x3<<3) 237 #define ISCSI_CMD_REQUEST_TYPE (0x3<<14) 243 #define ISCSI_CMD_REQUEST_TYPE (0x3<<14) 363 #define ISCSI_CMD_RESPONSE_TYPE (0x3<<14) 369 #define ISCSI_CMD_RESPONSE_TYPE (0x3<<1 [all...] |
/linux-master/sound/soc/mediatek/mt8183/ |
H A D | mt8183-reg.h | 467 #define MOD_DAI_MODE_MASK 0x3 468 #define MOD_DAI_MODE_MASK_SFT (0x3 << 30) 753 #define AWB2_HD_MASK 0x3 754 #define AWB2_HD_MASK_SFT (0x3 << 28) 756 #define HDMI_HD_MASK 0x3 757 #define HDMI_HD_MASK_SFT (0x3 << 20) 759 #define MOD_DAI_HD_MASK 0x3 760 #define MOD_DAI_HD_MASK_SFT (0x3 << 18) 762 #define DAI_HD_MASK 0x3 763 #define DAI_HD_MASK_SFT (0x3 << 1 [all...] |
/linux-master/scripts/dtc/include-prefixes/arm64/freescale/ |
H A D | imx8mn-pinfunc.h | 15 #define MX8MN_IOMUXC_BOOT_MODE2_I2C1_SCL 0x020 0x25C 0x55C 0x1 0x3 17 #define MX8MN_IOMUXC_BOOT_MODE3_I2C1_SDA 0x024 0x260 0x56C 0x1 0x3 86 #define MX8MN_IOMUXC_ENET_MDC_PDM_BIT_STREAM3 0x068 0x2D0 0x540 0x3 0x1 92 #define MX8MN_IOMUXC_ENET_MDIO_PDM_BIT_STREAM2 0x06C 0x2D4 0x53C 0x3 0x1 98 #define MX8MN_IOMUXC_ENET_TD3_PDM_BIT_STREAM1 0x070 0x2D8 0x538 0x3 0x1 106 #define MX8MN_IOMUXC_ENET_TD2_PDM_BIT_STREAM3 0x074 0x2DC 0x540 0x3 0x2 111 #define MX8MN_IOMUXC_ENET_TD1_PDM_BIT_STREAM2 0x078 0x2E0 0x53C 0x3 0x2 113 #define MX8MN_IOMUXC_ENET_TD1_USDHC3_CD_B 0x078 0x2E0 0x598 0x6 0x3 116 #define MX8MN_IOMUXC_ENET_TD0_PDM_BIT_STREAM1 0x07C 0x2E4 0x538 0x3 0x2 118 #define MX8MN_IOMUXC_ENET_TD0_USDHC3_WP 0x07C 0x2E4 0x5B8 0x6 0x3 [all...] |
/linux-master/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn-pinfunc.h | 15 #define MX8MN_IOMUXC_BOOT_MODE2_I2C1_SCL 0x020 0x25C 0x55C 0x1 0x3 17 #define MX8MN_IOMUXC_BOOT_MODE3_I2C1_SDA 0x024 0x260 0x56C 0x1 0x3 86 #define MX8MN_IOMUXC_ENET_MDC_PDM_BIT_STREAM3 0x068 0x2D0 0x540 0x3 0x1 92 #define MX8MN_IOMUXC_ENET_MDIO_PDM_BIT_STREAM2 0x06C 0x2D4 0x53C 0x3 0x1 98 #define MX8MN_IOMUXC_ENET_TD3_PDM_BIT_STREAM1 0x070 0x2D8 0x538 0x3 0x1 106 #define MX8MN_IOMUXC_ENET_TD2_PDM_BIT_STREAM3 0x074 0x2DC 0x540 0x3 0x2 111 #define MX8MN_IOMUXC_ENET_TD1_PDM_BIT_STREAM2 0x078 0x2E0 0x53C 0x3 0x2 113 #define MX8MN_IOMUXC_ENET_TD1_USDHC3_CD_B 0x078 0x2E0 0x598 0x6 0x3 116 #define MX8MN_IOMUXC_ENET_TD0_PDM_BIT_STREAM1 0x07C 0x2E4 0x538 0x3 0x2 118 #define MX8MN_IOMUXC_ENET_TD0_USDHC3_WP 0x07C 0x2E4 0x5B8 0x6 0x3 [all...] |
/linux-master/drivers/net/ipa/ |
H A D | gsi_reg.h | 120 GSI_CHANNEL_TYPE_XDCI = 0x3, 223 GSI_GENERIC_ENABLE_FLOW_CONTROL = 0x3, /* IPA v4.2+ */ 249 IRAM_SIZE_THREE_KB = 0x3, 320 GSI_OUT_OF_RESOURCES = 0x3, 332 GSI_ERR_TYPE_EVT = 0x3, 345 GENERIC_EE_INCORRECT_DIRECTION = 0x3,
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/linux-master/sound/soc/mediatek/mt7986/ |
H A D | mt7986-reg.h | 101 #define DL0_PBUF_SIZE_MASK 0x3 102 #define DL0_PBUF_SIZE_MASK_SFT (0x3 << 5) 110 #define DL0_HD_MODE_MASK 0x3 111 #define DL0_HD_MODE_MASK_SFT (0x3 << 0) 127 #define VUL0_HD_MODE_MASK 0x3 128 #define VUL0_HD_MODE_MASK_SFT (0x3 << 0)
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/linux-master/drivers/net/dsa/microchip/ |
H A D | ksz9477_reg.h | 66 #define SW_9893_GL_2_1 0x3 130 #define SW_IBA_STATE_M 0x3 145 #define SW_POWER_DOWN_MODE 0x3 197 #define SW_FLUSH_OPTION_M 0x3 202 #define SW_PRIO_M 0x3 340 #define SW_COLOR_M 0x3 376 #define VLAN_ACTION 0x3 397 #define ALU_ACTION 0x3 455 #define HSR_ACTION 0x3 574 #define TS_UNIT_M 0x3 [all...] |
/linux-master/drivers/gpu/drm/amd/include/asic_reg/thm/ |
H A D | thm_11_0_2_sh_mask.h | 39 #define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x3 46 #define THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT 0x3 79 #define THM_TCON_THERM_TRIP__THERM_TP_SENSE__SHIFT 0x3
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/linux-master/drivers/net/dsa/ |
H A D | bcm_sf2_regs.h | 81 #define LED_CNTRL_MASK 0x3 183 #define ACB_FLUSH_MASK 0x3 241 #define SPEED_MASK 0x3 274 #define SPDSTS_MASK 0x3 309 #define P_TXQ_PSM_VDD_MASK 0x3 314 #define PRT_TO_QID_MASK 0x3 366 #define L3_FRAMING_MASK (0x3 << L3_FRAMING_SHIFT) 378 #define SLICE_NUM_MASK 0x3 398 #define CHANGE_FWRD_MAP_IB_MASK 0x3 411 #define CHANGE_FWRD_MAP_OB_MASK 0x3 [all...] |
/linux-master/drivers/net/ethernet/intel/iavf/ |
H A D | iavf_register.h | 37 #define IAVF_VFGEN_RSTAT_VFR_STATE_MASK IAVF_MASK(0x3, IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT) 42 #define IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK IAVF_MASK(0x3, IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) 49 #define IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK IAVF_MASK(0x3, IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT)
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/linux-master/arch/s390/include/asm/ |
H A D | pci_dma.h | 44 #define ZPCI_TABLE_LEN_RFX 0x3 45 #define ZPCI_TABLE_LEN_RSX 0x3 46 #define ZPCI_TABLE_LEN_RTX 0x3
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/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
H A D | smu_v13_0_6_ppsmc.h | 36 #define PPSMC_MSG_GfxDriverReset 0x3 100 #define PPSMC_RESET_TYPE_DRIVER_MODE_3_RESET 0x3 109 #define PPSMC_XCD_THM_TYPE 0x3
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/linux-master/arch/mips/include/asm/dec/ |
H A D | kn03.h | 60 #define KN03_MCR_RES_11 (0x3<<12) /* unused */
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/linux-master/include/linux/ |
H A D | pata_arasan_cf_data.h | 24 #define CF_IF_CLK_50M (0x3)
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/linux-master/drivers/gpu/drm/amd/include/asic_reg/df/ |
H A D | df_1_7_sh_mask.h | 49 #define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW__SHIFT 0x3
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/linux-master/include/linux/ulpi/ |
H A D | regs.h | 52 #define ULPI_FUNC_CTRL_XCVRSEL_MASK 0x3 56 #define ULPI_FUNC_CTRL_FS4LS 0x3 59 #define ULPI_FUNC_CTRL_OPMODE_MASK (0x3 << 3) 63 #define ULPI_FUNC_CTRL_OPMODE_NOSYNC_NOEOP (0x3 << 3)
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/linux-master/drivers/media/dvb-frontends/ |
H A D | cx24120.h | 20 u8 x3; member in struct:cx24120_initial_mpeg_config
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