Searched refs:x1 (Results 701 - 725 of 5701) sorted by relevance

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/linux-master/arch/xtensa/include/uapi/asm/
H A Dmman.h26 #define PROT_READ 0x1 /* page can be read */
119 #define PKEY_DISABLE_ACCESS 0x1
/linux-master/include/soc/at91/
H A Dsama7-ddr.h56 #define UDDRC_STAT_SELFREF_TYPE_PHY (0x1 << 4) /* SDRAM is in Self-refresh, which was caused by PHY Master Request */
61 #define UDDRC_STAT_OPMODE_NORMAL (0x1 << 0) /* Normal */
/linux-master/drivers/staging/media/deprecated/atmel/
H A Datmel-isc-regs.h37 #define ISC_PFG_CFG0_BPS_ELEVEN (0x1 << 28)
160 #define ISC_BAY_CFG_RGRG 0x1
299 #define ISC_RLP_CFG_MODE_DAT9 0x1
337 #define ISC_HIS_CFG_MODE_R 0x1
356 #define ISC_DCFG_IMODE_PACKED16 0x1
365 #define ISC_DCFG_YMBSIZE_BEATS4 (0x1 << 4)
372 #define ISC_DCFG_CMBSIZE_BEATS4 (0x1 << 8)
382 #define ISC_DCTRL_DVIEW_SEMIPLANAR (0x1 << 1)
/linux-master/drivers/media/platform/microchip/
H A Dmicrochip-isc-regs.h37 #define ISC_PFG_CFG0_BPS_ELEVEN (0x1 << 28)
160 #define ISC_BAY_CFG_RGRG 0x1
299 #define ISC_RLP_CFG_MODE_DAT9 0x1
337 #define ISC_HIS_CFG_MODE_R 0x1
356 #define ISC_DCFG_IMODE_PACKED16 0x1
365 #define ISC_DCFG_YMBSIZE_BEATS4 (0x1 << 4)
372 #define ISC_DCFG_CMBSIZE_BEATS4 (0x1 << 8)
382 #define ISC_DCTRL_DVIEW_SEMIPLANAR (0x1 << 1)
/linux-master/drivers/staging/rtl8192e/rtl8192e/
H A Drtl_eeprom.c30 return (reg >> no) & 0x1;
49 (data >> tx_len) & 0x1);
/linux-master/arch/parisc/include/uapi/asm/
H A Dmman.h5 #define PROT_READ 0x1 /* page can be read */
81 #define PKEY_DISABLE_ACCESS 0x1
/linux-master/include/linux/dsa/
H A Dtag_qca.h22 #define QCA_HDR_RECV_TYPE_MIB 0x1
33 #define QCA_HDR_XMIT_TYPE_RW_REG 0x1
/linux-master/drivers/pinctrl/freescale/
H A Dpinctrl-mxs.h47 #define PIN_CONFIG_TO_PULL(c) ((c) >> PULL_SHIFT & 0x1)
48 #define PIN_CONFIG_TO_VOL(c) ((c) >> VOL_SHIFT & 0x1)
/linux-master/arch/m68k/68000/
H A Ddragen2.c98 PFDIR |= 0x1;
99 PFSEL &= ~0x1;
/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc_hash.h91 KEX_LD_CFG_HASH(0x8ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
92 KEX_LD_CFG_HASH(0x18ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
96 KEX_LD_CFG_HASH(0x8ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
97 KEX_LD_CFG_HASH(0x18ULL, 0xf, 0x1, 0x1, NPC_LID_LC, NPC_LT_LC_IP6, 0xf),
/linux-master/include/uapi/linux/
H A Dblkzoned.h33 BLK_ZONE_TYPE_CONVENTIONAL = 0x1,
67 BLK_ZONE_COND_EMPTY = 0x1,
/linux-master/arch/x86/include/asm/
H A Dmwait.h19 #define CPUID5_ECX_EXTENSIONS_SUPPORTED 0x1
22 #define MWAIT_ECX_INTERRUPT_BREAK 0x1
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.h75 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_DEEP_COLOR_DTO_ENABLE_STATUS__SHIFT 0x1
87 #define PHYPLLG_PIXCLK_RESYNC_CNTL__PHYPLLG_DEEP_COLOR_DTO_ENABLE_STATUS__SHIFT 0x1
/linux-master/drivers/gpu/drm/
H A Ddrm_damage_helper.c43 dest->x1 = src->x1;
236 /* Round down for x1/y1 and round up for x2/y2 to catch all pixels */
239 iter->plane_src.x1 = src.x1 >> 16;
260 * x1/y1 and round up for x2/y2 for the intersected coordinate. Similar rounding
318 rect->x1 = INT_MAX;
325 rect->x1 = min(rect->x1, clip.x1);
[all...]
/linux-master/drivers/mmc/host/
H A Dsdhci-xenon.h38 #define XENON_RETUNING_COMPATIBLE 0x1
41 #define XENON_DLL_LOCK_STATE 0x1
/linux-master/drivers/net/ipa/
H A Dipa_reg.h223 BCR_TX_NOT_USING_BRESP = 0x1, /* Not IPA v4.2+ */
301 IPA_GRAN_20_US = 0x1,
336 IPA_CS_OFFLOAD_UL /* TX */ = 0x1, /* Not IPA v4.5+ */
338 IPA_CS_OFFLOAD_INLINE /* TX and RX */ = 0x1, /* IPA v4.5+ */
398 IPA_ENABLE_FRAMING_HDLC = 0x1,
420 IPA_ENABLE_AGGR /* RX */ = 0x1,
427 IPA_HDLC = 0x1,
593 IPA_IRQ_EOT_COAL = 0x1, /* Not IPA v3.5+ */
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v12_0.h68 #define MCA_IPID_LO_2_UMC_CH(_ipid_lo) (((((_ipid_lo) >> 20) & 0x1) * 4) + \
81 (((REG_GET_FIELD(ipid, MCMP1_IPIDT0, InstanceIdLo) & 0x1) << 2) | \
/linux-master/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_1_sh_mask.h27 #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1
30 #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1
59 #define MC_ARB_AGE_CNTL__RESET_RD_GROUP0_MASK 0x1
62 #define MC_ARB_AGE_CNTL__RESET_RD_GROUP1__SHIFT 0x1
135 #define MC_ARB_GECC2_STATUS__CORR_STS0_MASK 0x1
138 #define MC_ARB_GECC2_STATUS__UNCORR_STS0__SHIFT 0x1
265 #define MC_ARB_GECC2__ENABLE_MASK 0x1
268 #define MC_ARB_GECC2__ECC_MODE__SHIFT 0x1
317 #define MC_ARB_MISC3__NO_GECC_EXT_EOB_MASK 0x1
320 #define MC_ARB_MISC3__CHAN4_EN__SHIFT 0x1
[all...]
/linux-master/drivers/pinctrl/realtek/
H A Dpinctrl-rtd1319d.c808 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "nf"),
817 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "nf"),
822 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "nf"),
827 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "nf"),
832 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "nf"),
837 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "nf"),
842 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "nf"),
848 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "nf"),
853 RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "nf"),
858 RTK_PIN_FUNC(SHIFT_LEFT(0x1,
[all...]
/linux-master/arch/arm64/kernel/
H A Dentry-ftrace.S71 stp x0, x1, [sp, #FREGS_X0]
99 mov x1, x9 // parent_ip (callsite's LR)
120 ldp x0, x1, [sp, #FREGS_X0]
280 mcount_get_lr x1 // function's lr
307 mcount_get_lr_addr x1 // pointer to function's saved lr
334 stp x0, x1, [sp, #FGRET_REGS_X0]
345 ldp x0, x1, [sp, #FGRET_REGS_X0]
/linux-master/drivers/thermal/tegra/
H A Dtegra124-soctherm.c23 #define TEGRA124_THERMTRIP_ANY_EN_MASK (0x1 << 28)
24 #define TEGRA124_THERMTRIP_MEM_EN_MASK (0x1 << 27)
25 #define TEGRA124_THERMTRIP_GPU_EN_MASK (0x1 << 26)
26 #define TEGRA124_THERMTRIP_CPU_EN_MASK (0x1 << 25)
27 #define TEGRA124_THERMTRIP_TSENSE_EN_MASK (0x1 << 24)
H A Dtegra132-soctherm.c23 #define TEGRA132_THERMTRIP_ANY_EN_MASK (0x1 << 28)
24 #define TEGRA132_THERMTRIP_MEM_EN_MASK (0x1 << 27)
25 #define TEGRA132_THERMTRIP_GPU_EN_MASK (0x1 << 26)
26 #define TEGRA132_THERMTRIP_CPU_EN_MASK (0x1 << 25)
27 #define TEGRA132_THERMTRIP_TSENSE_EN_MASK (0x1 << 24)
H A Dtegra210-soctherm.c24 #define TEGRA210_THERMTRIP_ANY_EN_MASK (0x1 << 31)
25 #define TEGRA210_THERMTRIP_MEM_EN_MASK (0x1 << 30)
26 #define TEGRA210_THERMTRIP_GPU_EN_MASK (0x1 << 29)
27 #define TEGRA210_THERMTRIP_CPU_EN_MASK (0x1 << 28)
28 #define TEGRA210_THERMTRIP_TSENSE_EN_MASK (0x1 << 27)
/linux-master/include/video/
H A Datmel_lcdc.h50 #define ATMEL_LCDC_DMAEN (0x1 << 0)
51 #define ATMEL_LCDC_DMARST (0x1 << 1)
52 #define ATMEL_LCDC_DMABUSY (0x1 << 2)
53 #define ATMEL_LCDC_DMAUPDT (0x1 << 3)
54 #define ATMEL_LCDC_DMA2DEN (0x1 << 4)
/linux-master/include/linux/amba/
H A Dpl080.h97 #define PL080_BSIZE_4 (0x1)
106 #define PL080_WIDTH_16BIT (0x1)
125 #define PL080_FLOW_MEM2PER (0x1)
160 #define FTDMAC020_CH_CSR_FIFOTH_2 (0x1)
168 #define FTDMAC020_CH_CSR_SRCAD_CTL_DEC (0x1)

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