/linux-master/drivers/gpu/drm/i915/ |
H A D | vlv_sideband.c | 78 u32 addr, u32 *val) 100 intel_uncore_write_fw(uncore, VLV_IOSF_DATA, is_read ? 0 : *val); 113 *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); 128 u32 val = 0; local 131 SB_CRRDDA_NP, addr, &val); 133 return val; 136 int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val) argument 139 SB_CRWRDA_NP, addr, &val); 144 u32 val = 0; local 147 SB_CRRDDA_NP, reg, &val); 76 vlv_sideband_rw(struct drm_i915_private *i915, u32 devfn, u32 port, u32 opcode, u32 addr, u32 *val) argument 152 vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val) argument 160 u32 val = 0; local 170 u32 val = 0; local 178 vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val) argument 186 u32 val = 0; local 194 vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val) argument 215 u32 val = 0; local 230 vlv_dpio_write(struct drm_i915_private *i915, enum dpio_phy phy, int reg, u32 val) argument 240 u32 val = 0; local 247 vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val) argument [all...] |
H A D | intel_pcode.h | 13 int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1); 14 int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, 16 #define snb_pcode_write(uncore, mbox, val) \ 17 snb_pcode_write_timeout(uncore, mbox, val, 500, 0) 27 int snb_pcode_read_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 *val); 28 int snb_pcode_write_p(struct intel_uncore *uncore, u32 mbcmd, u32 p1, u32 p2, u32 val);
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/linux-master/lib/ |
H A D | iomap.c | 193 #define pio_write16be(val,port) outw(swab16(val),port) 194 #define pio_write32be(val,port) outl(swab32(val),port) 198 #define mmio_write16be(val,port) writew(swab16(val),port) 199 #define mmio_write32be(val,port) writel(swab32(val),port) 200 #define mmio_write64be(val,port) writeq(swab64(val),por 203 iowrite8(u8 val, void __iomem *addr) argument 209 iowrite16(u16 val, void __iomem *addr) argument 215 iowrite16be(u16 val, void __iomem *addr) argument 221 iowrite32(u32 val, void __iomem *addr) argument 227 iowrite32be(u32 val, void __iomem *addr) argument 240 pio_write64_lo_hi(u64 val, unsigned long port) argument 246 pio_write64_hi_lo(u64 val, unsigned long port) argument 252 pio_write64be_lo_hi(u64 val, unsigned long port) argument 258 pio_write64be_hi_lo(u64 val, unsigned long port) argument 264 iowrite64_lo_hi(u64 val, void __iomem *addr) argument 272 iowrite64_hi_lo(u64 val, void __iomem *addr) argument 280 iowrite64be_lo_hi(u64 val, void __iomem *addr) argument 288 iowrite64be_hi_lo(u64 val, void __iomem *addr) argument [all...] |
/linux-master/drivers/net/wireless/mediatek/mt76/mt76x0/ |
H A D | eeprom.c | 84 u8 val; local 86 val = mt76x02_eeprom_get(dev, MT_EE_2G_TARGET_POWER) >> 8; 87 if (mt76x02_field_valid(val)) 88 dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8); 96 u8 val; local 98 val = mt76x02_eeprom_get(dev, MT_EE_FREQ_OFFSET); 99 if (!mt76x02_field_valid(val)) 100 val = 0; 101 caldata->freq_offset = val; 103 val 114 s8 val, lna_5g[3], lna_2g; local 133 u8 val; local 157 u16 val, addr; local 275 u16 val; local [all...] |
/linux-master/arch/sh/include/asm/ |
H A D | cmpxchg-irq.h | 7 static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) argument 13 *m = val; 18 static inline unsigned long xchg_u16(volatile u16 *m, unsigned long val) argument 24 *m = val; 29 static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) argument 35 *m = val & 0xff;
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/linux-master/drivers/scsi/pm8001/ |
H A D | pm8001_chips.h | 49 static inline void pm8001_write_32(void *addr, u32 offset, __le32 val) argument 51 *((__le32 *)(addr + offset)) = val; 61 u32 addr, u32 val) 63 writel(val, pm8001_ha->io_mem[bar].memvirtaddr + addr); 69 static inline void pm8001_mw32(void __iomem *addr, u32 offset, u32 val) argument 71 writel(val, addr + offset); 60 pm8001_cw32(struct pm8001_hba_info *pm8001_ha, u32 bar, u32 addr, u32 val) argument
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/linux-master/tools/include/linux/unaligned/ |
H A D | packed_struct.h | 29 static inline void __put_unaligned_cpu16(u16 val, void *p) argument 32 ptr->x = val; 35 static inline void __put_unaligned_cpu32(u32 val, void *p) argument 38 ptr->x = val; 41 static inline void __put_unaligned_cpu64(u64 val, void *p) argument 44 ptr->x = val;
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/linux-master/arch/mips/include/asm/mach-ralink/ |
H A D | ralink_regs.h | 35 static inline void rt_sysc_w32(u32 val, unsigned reg) argument 37 __raw_writel(val, rt_sysc_membase + reg); 47 u32 val = rt_sysc_r32(reg) & ~clr; local 49 __raw_writel(val | set, rt_sysc_membase + reg); 52 static inline void rt_memc_w32(u32 val, unsigned reg) argument 54 __raw_writel(val, rt_memc_membase + reg);
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/linux-master/tools/perf/util/ |
H A D | spark.c | 10 /* Print spark lines on outf for numval values in val. */ 11 int print_spark(char *bf, int size, unsigned long *val, int numval) argument 20 if (val[i] < min) 21 min = val[i]; 22 if (val[i] > max) 23 max = val[i]; 30 ticks[((val[i] - min) << SPARK_SHIFT) / f]);
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/linux-master/arch/arm/mach-imx/ |
H A D | pm-imx7ulp.c | 32 u32 val = readl_relaxed(smc1_base + SMC_PMCTRL); local 35 val &= ~(BM_PMCTRL_RUNM | BM_PMCTRL_STOPM | BM_PMCTRL_PSTOPO); 40 val |= PSTOPO_PSTOP3 << BP_PMCTRL_PSTOPO; 44 val |= PSTOPO_PSTOP2 << BP_PMCTRL_PSTOPO; 48 val |= PSTOPO_PSTOP1 << BP_PMCTRL_PSTOPO; 54 writel_relaxed(val, smc1_base + SMC_PMCTRL);
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/linux-master/include/linux/unaligned/ |
H A D | packed_struct.h | 28 static inline void __put_unaligned_cpu16(u16 val, void *p) argument 31 ptr->x = val; 34 static inline void __put_unaligned_cpu32(u32 val, void *p) argument 37 ptr->x = val; 40 static inline void __put_unaligned_cpu64(u64 val, void *p) argument 43 ptr->x = val;
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/linux-master/include/uapi/linux/ |
H A D | lirc.h | 24 #define LIRC_SPACE(val) (((val) & LIRC_VALUE_MASK) | LIRC_MODE2_SPACE) 25 #define LIRC_PULSE(val) (((val) & LIRC_VALUE_MASK) | LIRC_MODE2_PULSE) 26 #define LIRC_FREQUENCY(val) (((val) & LIRC_VALUE_MASK) | LIRC_MODE2_FREQUENCY) 27 #define LIRC_TIMEOUT(val) (((val) & LIRC_VALUE_MASK) | LIRC_MODE2_TIMEOUT) 28 #define LIRC_OVERFLOW(val) (((val) [all...] |
/linux-master/arch/arm/mach-davinci/ |
H A D | pm.c | 45 unsigned val; local 50 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); 51 val &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN); 52 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); 57 val = __raw_readl(pm_config.cpupll_reg_base + PLLCTL); 58 val |= PLLCTL_PLLPWRDN; 59 __raw_writel(val, pm_config.cpupll_reg_base + PLLCTL); 63 val = __raw_readl(pm_config.deepsleep_reg); 64 val &= ~DEEPSLEEP_SLEEPCOUNT_MASK, 65 val | [all...] |
/linux-master/include/linux/ |
H A D | linear_range.h | 46 unsigned int *val); 48 unsigned int selector, unsigned int *val); 50 unsigned int val, unsigned int *selector, 53 unsigned int val, unsigned int *selector, 56 unsigned int val, unsigned int *selector); 58 int ranges, unsigned int val,
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/linux-master/arch/alpha/include/asm/ |
H A D | fpu.h | 44 wrfpcr(unsigned long val) argument 51 current_thread_info()->fp[31] = val; 59 : "=&r"(tmp) : "r"(val)); 66 : "=m"(tmp) : "m"(val)); 85 extern void alpha_write_fp_reg (unsigned long reg, unsigned long val); 87 extern void alpha_write_fp_reg_s (unsigned long reg, unsigned long val);
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/linux-master/arch/powerpc/sysdev/ |
H A D | grackle.c | 25 unsigned int val; local 28 val = in_le32(bp->cfg_data); 29 val = enable? (val | GRACKLE_PICR1_LOOPSNOOP) : 30 (val & ~GRACKLE_PICR1_LOOPSNOOP); 32 out_le32(bp->cfg_data, val);
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/linux-master/drivers/gpu/drm/xe/compat-i915-headers/ |
H A D | intel_pcode.h | 13 snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, argument 16 return xe_pcode_write_timeout(__compat_uncore_to_gt(uncore), mbox, val, 21 snb_pcode_write(struct intel_uncore *uncore, u32 mbox, u32 val) argument 24 return xe_pcode_write(__compat_uncore_to_gt(uncore), mbox, val); 28 snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1) argument 30 return xe_pcode_read(__compat_uncore_to_gt(uncore), mbox, val, val1);
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/linux-master/sound/soc/hisilicon/ |
H A D | hi6210-i2s.c | 80 static inline void hi6210_write_reg(struct hi6210_i2s *i2s, int reg, u32 val) argument 82 writel(val, i2s->base + reg); 95 u32 val; local 98 regmap_read(i2s->sysctrl, SC_PERIPH_RSTSTAT2, &val); 99 if (val & BIT(4)) 126 val = hi6210_read_reg(i2s, HII2S_CODEC_IRQ_MASK); 127 val |= 0x3f; 128 hi6210_write_reg(i2s, HII2S_CODEC_IRQ_MASK, val); 132 val = hi6210_read_reg(i2s, HII2S_APB_AFIFO_CFG_1); 133 val | 186 u32 val; local 206 u32 val; local 259 u32 val; local [all...] |
/linux-master/arch/parisc/include/asm/ |
H A D | special_insns.h | 54 #define set_eiem(val) mtctl(val, CR_EIEM) 65 #define mtsp(val, cr) \ 66 { if (__builtin_constant_p(val) && ((val) == 0)) \ 71 : "r" (val), "i" (cr) : "memory"); }
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/linux-master/include/trace/events/ |
H A D | mdio.h | 13 u8 addr, unsigned regnum, u16 val, int err), 15 TP_ARGS(bus, read, addr, regnum, val, err), 23 __field(u16, val) 32 __entry->val = val; 35 TP_printk("%s %-5s phy:0x%02hhx reg:0x%02x val:0x%04hx", 37 __entry->addr, __entry->regnum, __entry->val)
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/linux-master/drivers/tty/serial/ |
H A D | bcm63xx_uart.c | 90 unsigned int val; local 92 val = bcm_uart_readl(port, UART_IR_REG); 93 return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0; 101 unsigned int val; local 103 val = bcm_uart_readl(port, UART_MCTL_REG); 104 val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK); 107 val |= UART_MCTL_DTR_MASK; 109 val |= UART_MCTL_RTS_MASK; 110 bcm_uart_writel(port, val, UART_MCTL_REG); 112 val 125 unsigned int val, mctrl; local 145 unsigned int val; local 161 unsigned int val; local 177 unsigned int val; local 189 unsigned int val; local 202 unsigned int val; local 245 unsigned int val; local 305 unsigned int val; local 364 unsigned int val; local 376 unsigned int val; local 389 unsigned int val; local 406 unsigned int val; local 604 unsigned int val; local 666 unsigned int val; local 678 unsigned int val; local [all...] |
/linux-master/drivers/net/ethernet/qualcomm/emac/ |
H A D | emac-mac.h | 42 #define BITS_GET(val, lo, hi) ((le32_to_cpu(val) & GENMASK((hi), (lo))) >> lo) 43 #define BITS_SET(val, lo, hi, new_val) \ 44 val = cpu_to_le32((le32_to_cpu(val) & (~GENMASK((hi), (lo)))) | \ 67 #define RRD_UPDT_SET(rrd, val) BITS_SET((rrd)->word[3], 31, 31, val) 79 #define TPD_BUF_LEN_SET(tpd, val) BITS_SET((tpd)->word[0], 0, 15, val) 81 #define TPD_CSX_SET(tpd, val) BITS_SE [all...] |
/linux-master/drivers/clk/imx/ |
H A D | clk-frac-pll.c | 46 u32 val; local 48 return readl_poll_timeout(pll->base, val, val & PLL_LOCK_STATUS, 0, 54 u32 val; local 61 return readl_poll_timeout(pll->base, val, val & PLL_NEWDIV_ACK, 0, 68 u32 val; local 70 val = readl_relaxed(pll->base + PLL_CFG0); 71 val &= ~PLL_PD_MASK; 72 writel_relaxed(val, pl 80 u32 val; local 90 u32 val; local 100 u32 val, divff, divfi, divq; local 159 u32 val, divfi, divff; local [all...] |
/linux-master/drivers/comedi/drivers/ |
H A D | c6xdigio.c | 63 unsigned int val, unsigned int status) 65 outb_p(val, dev->iobase + C6XDIGIO_DATA_REG); 74 unsigned int val; local 76 val = inb(dev->iobase + C6XDIGIO_STATUS_REG); 77 val >>= 3; 78 val &= 0x07; 80 *bits = val; 86 unsigned int chan, unsigned int val) 91 if (val > 498) 92 val 62 c6xdigio_write_data(struct comedi_device *dev, unsigned int val, unsigned int status) argument 85 c6xdigio_pwm_write(struct comedi_device *dev, unsigned int chan, unsigned int val) argument 114 unsigned int val = 0; local 154 unsigned int val = (s->state >> (16 * chan)) & 0xffff; local 180 unsigned int val; local 197 unsigned int val; local [all...] |
/linux-master/drivers/media/i2c/ccs/ |
H A D | ccs-reg-access.c | 65 static u32 ireal32_to_u32_mul_1000000(struct i2c_client *client, u32 val) argument 67 if (val >> 10 > U32_MAX / 15625) { 68 dev_warn(&client->dev, "value %u overflows!\n", val); 72 return ((val >> 10) * 15625) + 73 (val & GENMASK(9, 0)) * 15625 / 1024; 76 u32 ccs_reg_conv(struct ccs_sensor *sensor, u32 reg, u32 val) argument 83 val = ireal32_to_u32_mul_1000000(client, val); 85 val = float_to_u32_mul_1000000(client, val); 97 __ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val, bool only8, bool conv) argument 112 __ccs_static_data_read_ro_reg(struct ccs_reg *regs, size_t num_regs, u32 reg, u32 *val) argument 151 ccs_static_data_read_ro_reg(struct ccs_sensor *sensor, u32 reg, u32 *val) argument 163 ccs_read_addr_raw(struct ccs_sensor *sensor, u32 reg, u32 *val, bool force8, bool quirk, bool conv, bool data) argument 192 ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val) argument 197 ccs_read_addr_8only(struct ccs_sensor *sensor, u32 reg, u32 *val) argument 202 ccs_read_addr_noconv(struct ccs_sensor *sensor, u32 reg, u32 *val) argument 211 ccs_write_addr(struct ccs_sensor *sensor, u32 reg, u32 val) argument [all...] |