Searched refs:regs (Results 751 - 775 of 3746) sorted by relevance

<<31323334353637383940>>

/linux-master/arch/arm64/kernel/
H A Dasm-offsets.c60 DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
61 DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
62 DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
63 DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
64 DEFINE(S_X8, offsetof(struct pt_regs, regs[8]));
65 DEFINE(S_X10, offsetof(struct pt_regs, regs[10]));
66 DEFINE(S_X12, offsetof(struct pt_regs, regs[12]));
67 DEFINE(S_X14, offsetof(struct pt_regs, regs[14]));
68 DEFINE(S_X16, offsetof(struct pt_regs, regs[16]));
69 DEFINE(S_X18, offsetof(struct pt_regs, regs[1
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/linux-master/drivers/spi/
H A Dspi-xilinx.c83 void __iomem *regs; /* virt. address of the control registers */ member in struct:xilinx_spi
121 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);
137 xspi->write_fn(data, xspi->regs + XSPI_TXD_OFFSET);
143 u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
165 void __iomem *regs_base = xspi->regs;
194 xspi->write_fn(xspi->cs_inactive, xspi->regs + XSPI_SSR_OFFSET);
199 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) & ~XSPI_CR_MODE_MASK;
208 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
219 xspi->write_fn(cs, xspi->regs + XSPI_SSR_OFFSET);
256 cr = xspi->read_fn(xspi->regs
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/linux-master/drivers/gpu/drm/mediatek/
H A Dmtk_ethdr.c71 void __iomem *regs; member in struct:mtk_ethdr_comp
123 writel(MIX_FME_CPL_INTEN, priv->ethdr_comp[ETHDR_MIXER].regs + MIX_INTEN);
130 writel(0x0, priv->ethdr_comp[ETHDR_MIXER].regs + MIX_INTEN);
137 writel(0x0, priv->ethdr_comp[ETHDR_MIXER].regs + MIX_INTSTA);
164 mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx));
177 mixer->regs, MIX_L_SRC_SIZE(idx));
178 mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx));
179 mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx),
181 mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON,
200 vdo_fe0->regs, HDR_VDO_FE_0804_HDR_DM_F
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H A Dmtk_disp_merge.c64 void __iomem *regs; member in struct:mtk_disp_merge
88 mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs,
91 mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs,
100 mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg, priv->regs,
103 mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs,
114 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_36);
117 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_37,
121 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_40,
125 &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_41,
156 mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,
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/linux-master/arch/s390/kernel/
H A Dirq.c101 static void do_IRQ(struct pt_regs *regs, int irq) argument
117 static void do_irq_async(struct pt_regs *regs, int irq) argument
120 do_IRQ(regs, irq);
123 struct pt_regs *, regs, int, irq);
127 static int irq_pending(struct pt_regs *regs) argument
136 void noinstr do_io_irq(struct pt_regs *regs) argument
138 irqentry_state_t state = irqentry_enter(regs);
139 struct pt_regs *old_regs = set_irq_regs(regs);
144 if (user_mode(regs)) {
147 current->thread.last_break = regs
172 do_ext_irq(struct pt_regs *regs) argument
342 struct pt_regs *regs = get_irq_regs(); local
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/linux-master/arch/arm64/mm/
H A Dfault.c48 struct pt_regs *regs);
258 struct pt_regs *regs)
268 (regs->pstate & PSR_PAN_BIT);
275 struct pt_regs *regs)
305 unsigned long esr, struct pt_regs *regs)
317 die("Oops", regs, esr);
324 struct pt_regs *regs)
331 kasan_report((void *)addr, 0, is_write, regs->pc);
336 struct pt_regs *regs) { }
340 struct pt_regs *regs)
257 is_el1_permission_fault(unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
273 is_spurious_el1_translation_fault(unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
304 die_kernel_fault(const char *msg, unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
323 report_tag_fault(unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
335 report_tag_fault(unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
339 do_tag_recovery(unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
368 __do_kernel_fault(unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
470 do_bad_area(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
503 do_page_fault(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
683 do_translation_fault(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
696 do_alignment_fault(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
706 do_bad(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
711 do_sea(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
741 do_tag_check_fault(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
821 do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs) argument
841 do_sp_pc_abort(unsigned long addr, unsigned long esr, struct pt_regs *regs) argument
883 debug_exception_enter(struct pt_regs *regs) argument
892 debug_exception_exit(struct pt_regs *regs) argument
898 do_debug_exception(unsigned long addr_if_watchpoint, unsigned long esr, struct pt_regs *regs) argument
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/linux-master/arch/nios2/kernel/
H A Dkgdb.c71 char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs) argument
77 memcpy(mem, (void *)regs + dbg_reg_def[regno].offset,
85 int dbg_set_reg(int regno, void *mem, struct pt_regs *regs) argument
91 memcpy((void *)regs + dbg_reg_def[regno].offset, mem,
104 void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc) argument
106 regs->ea = pc;
111 struct pt_regs *regs)
122 regs->ea = addr;
130 asmlinkage void kgdb_breakpoint_c(struct pt_regs *regs) argument
137 regs
109 kgdb_arch_handle_exception(int vector, int signo, int err_code, char *remcom_in_buffer, char *remcom_out_buffer, struct pt_regs *regs) argument
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/linux-master/arch/powerpc/perf/
H A Dcallchain_32.c82 unsigned int regs; local
85 if (read_user_stack_32((unsigned int __user *) &sf->sctx.regs, &regs))
87 return regs == (unsigned long) &sf->mctx;
93 unsigned int regs; local
96 if (read_user_stack_32((unsigned int __user *) &sf->uc.uc_regs, &regs))
98 return regs == (unsigned long) &sf->uc.uc_mcontext;
134 struct pt_regs *regs)
142 next_ip = perf_instruction_pointer(regs);
143 lr = regs
133 perf_callchain_user_32(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) argument
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/linux-master/drivers/watchdog/
H A Dpic32-dmt.c43 void __iomem *regs; member in struct:pic32_dmt
49 writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG));
54 writel(DMT_ON, PIC32_CLR(dmt->regs + DMTCON_REG));
66 val = readl(dmt->regs + DMTSTAT_REG);
80 writel(DMT_STEP1_KEY << 8, dmt->regs + DMTPRECLR_REG);
84 v = readl(dmt->regs + DMTSTAT_REG) & DMTSTAT_WINOPN;
90 writel(DMT_STEP2_KEY, dmt->regs + DMTCLR_REG);
102 return readl(dmt->regs + DMTPSCNT_REG) / rate;
177 dmt->regs = devm_platform_ioremap_resource(pdev, 0);
178 if (IS_ERR(dmt->regs))
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H A Dapple_wdt.c58 void __iomem *regs; member in struct:apple_wdt
71 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME);
72 writel_relaxed(APPLE_WDT_CTRL_RESET_EN, wdt->regs + APPLE_WDT_WD1_CTRL);
81 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CTRL);
90 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME);
99 writel_relaxed(0, wdt->regs + APPLE_WDT_WD1_CUR_TIME);
100 writel_relaxed(wdt->clk_rate * s, wdt->regs + APPLE_WDT_WD1_BITE_TIME);
112 cur_time = readl_relaxed(wdt->regs + APPLE_WDT_WD1_CUR_TIME);
113 reset_time = readl_relaxed(wdt->regs + APPLE_WDT_WD1_BITE_TIME);
123 writel_relaxed(APPLE_WDT_CTRL_RESET_EN, wdt->regs
[all...]
/linux-master/drivers/w1/masters/
H A Dmxc_w1.c30 void __iomem *regs; member in struct:mxc_w1_device
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL);
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL);
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL);
81 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL);
122 mdev->regs = devm_platform_ioremap_resource(pdev, 0);
123 if (IS_ERR(mdev->regs)) {
124 err = PTR_ERR(mdev->regs);
129 writeb(MXC_W1_RESET_RST, mdev->regs + MXC_W1_RESET);
130 writeb(0, mdev->regs
[all...]
/linux-master/arch/openrisc/kernel/
H A Dprocess.c121 void show_regs(struct pt_regs *regs) argument
125 show_registers(regs);
224 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp) argument
228 memset(regs, 0, sizeof(struct pt_regs));
230 regs->pc = pc;
231 regs->sr = sr;
232 regs->sp = sp;
273 void dump_elf_thread(elf_greg_t *dest, struct pt_regs* regs) argument
276 memcpy(dest+1, regs->gpr+1, 31*sizeof(unsigned long));
277 dest[32] = regs
[all...]
/linux-master/drivers/net/ethernet/intel/igc/
H A Digc_dump.c49 u32 regs[8]; local
54 regs[n] = rd32(IGC_RDLEN(n));
58 regs[n] = rd32(IGC_RDH(n));
62 regs[n] = rd32(IGC_RDT(n));
66 regs[n] = rd32(IGC_RXDCTL(n));
70 regs[n] = rd32(IGC_RDBAL(n));
74 regs[n] = rd32(IGC_RDBAH(n));
78 regs[n] = rd32(IGC_TDBAL(n));
82 regs[n] = rd32(IGC_TDBAH(n));
86 regs[
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/linux-master/drivers/gpu/drm/sun4i/
H A Dsun8i_tcon_top.c46 val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG);
49 writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG);
80 reg = readl(tcon_top->regs + TCON_TOP_PORT_SEL_REG);
88 writel(reg, tcon_top->regs + TCON_TOP_PORT_SEL_REG);
99 void __iomem *regs,
120 regs + TCON_TOP_GATE_SRC_REG,
131 void __iomem *regs; local
161 regs = devm_platform_ioremap_resource(pdev, 0);
162 tcon_top->regs = regs;
97 sun8i_tcon_top_register_gate(struct device *dev, const char *parent, void __iomem *regs, spinlock_t *lock, u8 bit, int name_index) argument
[all...]
H A Dsun4i_tv.c167 struct regmap *regs; member in struct:sun4i_tv
271 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
295 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
303 regmap_write(tv->regs, SUN4I_TVE_CFG0_REG,
312 regmap_write(tv->regs, SUN4I_TVE_DAC0_REG,
323 regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG,
327 regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG,
331 regmap_write(tv->regs, SUN4I_TVE_PORCH_REG,
336 regmap_write(tv->regs, SUN4I_TVE_LINE_REG,
340 regmap_write(tv->regs, SUN4I_TVE_LEVEL_RE
433 void __iomem *regs; local
[all...]
/linux-master/arch/loongarch/kernel/
H A Dunwind_prologue.c106 * st.d xx, sp, offset <- save callee saved regs and
115 struct pt_regs *regs; local
123 regs = (struct pt_regs *)state->sp;
126 state->pc = regs->csr_era;
127 state->ra = regs->regs[1];
128 state->sp = regs->regs[3];
197 struct pt_regs *regs; local
210 regs
240 unwind_start(struct unwind_state *state, struct task_struct *task, struct pt_regs *regs) argument
[all...]
/linux-master/drivers/scsi/
H A Dgvp11.c28 struct gvp11_scsiregs *regs; member in struct:gvp11_hostdata
39 unsigned int status = hdata->regs->CNTR;
60 struct gvp11_scsiregs *regs = hdata->regs; local
168 regs->CNTR = cntr;
171 regs->ACR = addr;
177 regs->BANK = bank_mask & (addr >> 18);
180 regs->ST_DMA = 1;
192 struct gvp11_scsiregs *regs = hdata->regs; local
237 check_wd33c93(struct gvp11_scsiregs *regs) argument
325 struct gvp11_scsiregs *regs; local
[all...]
/linux-master/drivers/net/ethernet/sgi/
H A Dioc3-eth.c81 struct ioc3_ethregs *regs; member in struct:ioc3_private
233 &ip->regs->emar_h);
238 &ip->regs->emar_l);
261 struct ioc3_ethregs *regs = ip->regs; local
263 while (readl(&regs->micr) & MICR_BUSY)
266 &regs->micr);
267 while (readl(&regs->micr) & MICR_BUSY)
270 return readl(&regs->midr_r) & MIDR_DATA_MASK;
276 struct ioc3_ethregs *regs local
291 struct ioc3_ethregs *regs = ip->regs; local
448 struct ioc3_ethregs *regs = ip->regs; local
535 struct ioc3_ethregs *regs = ip->regs; local
555 struct ioc3_ethregs *regs = ip->regs; local
694 struct ioc3_ethregs *regs = ip->regs; local
719 struct ioc3_ethregs *regs = ip->regs; local
742 struct ioc3_ethregs *regs = ip->regs; local
774 struct ioc3_ethregs *regs = ip->regs; local
833 struct resource *regs; local
1237 struct ioc3_ethregs *regs = ip->regs; local
[all...]
/linux-master/drivers/memory/tegra/
H A Dtegra124.c19 .regs = {
31 .regs = {
47 .regs = {
63 .regs = {
79 .regs = {
95 .regs = {
111 .regs = {
127 .regs = {
143 .regs = {
159 .regs
[all...]
H A Dtegra114.c18 .regs = {
30 .regs = {
46 .regs = {
62 .regs = {
78 .regs = {
94 .regs = {
110 .regs = {
126 .regs = {
142 .regs = {
158 .regs
[all...]
/linux-master/arch/x86/um/
H A Dsignal.c155 static int copy_sc_from_user(struct pt_regs *regs, argument
168 #define GETREG(regno, regname) regs->regs.gp[HOST_##regno] = sc.regname
230 err = copy_from_user(regs->regs.fp, (void *)sc.fpstate,
239 struct _xstate __user *to_fp, struct pt_regs *regs,
247 #define PUTREG(regno, regname) sc.regname = regs->regs.gp[HOST_##regno]
319 if (copy_to_user(to_fp, regs->regs
238 copy_sc_to_user(struct sigcontext __user *to, struct _xstate __user *to_fp, struct pt_regs *regs, unsigned long mask) argument
361 setup_signal_stack_sc(unsigned long stack_top, struct ksignal *ksig, struct pt_regs *regs, sigset_t *mask) argument
407 setup_signal_stack_si(unsigned long stack_top, struct ksignal *ksig, struct pt_regs *regs, sigset_t *mask) argument
489 setup_signal_stack_si(unsigned long stack_top, struct ksignal *ksig, struct pt_regs *regs, sigset_t *set) argument
[all...]
/linux-master/arch/powerpc/kernel/ptrace/
H A Dptrace-adv.c10 struct pt_regs *regs = task->thread.regs; local
12 if (regs != NULL) {
15 regs_set_return_msr(regs, regs->msr | MSR_DE);
22 struct pt_regs *regs = task->thread.regs; local
24 if (regs != NULL) {
27 regs_set_return_msr(regs, regs
34 struct pt_regs *regs = task->thread.regs; local
85 struct pt_regs *regs = task->thread.regs; local
[all...]
/linux-master/drivers/rtc/
H A Drtc-rx8010.c65 struct regmap *regs; member in struct:rx8010_data
78 err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
102 err = regmap_write(rx8010->regs, RX8010_FLAG, flagreg);
113 err = regmap_read(rx8010->regs, RX8010_FLAG, &flagreg);
122 err = regmap_bulk_read(rx8010->regs, RX8010_SEC, date, sizeof(date));
144 err = regmap_set_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP);
156 err = regmap_bulk_write(rx8010->regs, RX8010_SEC, date, sizeof(date));
161 err = regmap_clear_bits(rx8010->regs, RX8010_CTRL, RX8010_CTRL_STOP);
165 err = regmap_clear_bits(rx8010->regs, RX8010_FLAG, RX8010_FLAG_VLF);
179 err = regmap_write(rx8010->regs, RX8010_RESV1
[all...]
/linux-master/arch/powerpc/kernel/
H A Dalign.c107 static int emulate_spe(struct pt_regs *regs, unsigned int reg, argument
124 addr = (unsigned char __user *)regs->dar;
130 if (unlikely(!user_mode(regs)))
145 data.w[1] = regs->gpr[reg];
149 data.h[3] = regs->gpr[reg] >> 16;
153 data.h[3] = regs->gpr[reg] & 0xffff;
159 data.w[1] = regs->gpr[reg];
276 regs->gpr[reg] = data.w[1];
301 int fix_alignment(struct pt_regs *regs) argument
307 if (is_kernel_addr(regs
[all...]
/linux-master/drivers/iio/adc/
H A Dnpcm_adc.c31 void __iomem *regs; member in struct:npcm_adc
106 regtemp = ioread32(info->regs + NPCM_ADCCON);
108 iowrite32(regtemp, info->regs + NPCM_ADCCON);
122 regtemp = ioread32(info->regs + NPCM_ADCCON);
126 NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);
131 regtemp = ioread32(info->regs + NPCM_ADCCON);
141 info->regs + NPCM_ADCCON);
149 *val = ioread32(info->regs + NPCM_ADCDATA);
226 info->regs = devm_platform_ioremap_resource(pdev, 0);
227 if (IS_ERR(info->regs))
[all...]

Completed in 204 milliseconds

<<31323334353637383940>>