/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn32/ |
H A D | irq_service_dcn32.c | 209 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 217 .ack_reg = SRI(reg2, block, reg_num),\ 219 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 221 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 223 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ 231 .ack_reg = SRI_DMUB(reg2),\ 233 reg2 ## __ ## mask2 ## _MASK,\ 235 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn35/ |
H A D | irq_service_dcn35.c | 207 #define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\ 215 REG_STRUCT[base + reg_num].ack_reg = SRI(reg2, block, reg_num),\ 217 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 219 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 221 #define IRQ_REG_ENTRY_DMUB(base, reg1, mask1, reg2, mask2)\ 229 REG_STRUCT[base].ack_reg = SRI_DMUB(reg2),\ 231 reg2 ## __ ## mask2 ## _MASK,\ 233 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn315/ |
H A D | irq_service_dcn315.c | 215 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 223 .ack_reg = SRI(reg2, block, reg_num),\ 225 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 227 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 229 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ 237 .ack_reg = SRI_DMUB(reg2),\ 239 reg2 ## __ ## mask2 ## _MASK,\ 241 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
H A D | irq_service_dcn302.c | 195 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 202 .ack_reg = SRI(reg2, block, reg_num),\ 203 .ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 204 .ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 213 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ 221 .ack_reg = SRI_DMUB(reg2),\ 223 reg2 ## __ ## mask2 ## _MASK,\ 225 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
H A D | irq_service_dcn30.c | 220 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 228 .ack_reg = SRI(reg2, block, reg_num),\ 230 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 232 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 234 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ 242 .ack_reg = SRI_DMUB(reg2),\ 244 reg2 ## __ ## mask2 ## _MASK,\ 246 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn31/ |
H A D | irq_service_dcn31.c | 208 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 216 .ack_reg = SRI(reg2, block, reg_num),\ 218 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 220 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 222 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ 230 .ack_reg = SRI_DMUB(reg2),\ 232 reg2 ## __ ## mask2 ## _MASK,\ 234 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn314/ |
H A D | irq_service_dcn314.c | 210 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 218 .ack_reg = SRI(reg2, block, reg_num),\ 220 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 222 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 224 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ 232 .ack_reg = SRI_DMUB(reg2),\ 234 reg2 ## __ ## mask2 ## _MASK,\ 236 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
H A D | irq_service_dcn21.c | 213 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 221 .ack_reg = SRI(reg2, block, reg_num),\ 223 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 225 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 227 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ 235 .ack_reg = SRI_DMUB(reg2),\ 237 reg2 ## __ ## mask2 ## _MASK,\ 239 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn351/ |
H A D | irq_service_dcn351.c | 186 #define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\ 194 REG_STRUCT[base + reg_num].ack_reg = SRI(reg2, block, reg_num),\ 196 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 198 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \ 200 #define IRQ_REG_ENTRY_DMUB(base, reg1, mask1, reg2, mask2)\ 208 REG_STRUCT[base].ack_reg = SRI_DMUB(reg2),\ 210 reg2 ## __ ## mask2 ## _MASK,\ 212 reg2 ## __ ## mask2 ## _MASK \
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/linux-master/arch/s390/boot/ |
H A D | physmem_info.c | 60 unsigned long reg1, reg2, ry; local 71 " epsw %[reg1],%[reg2]\n" 73 " st %[reg2],4(%[psw_pgm])\n" 81 [reg2] "=&a" (reg2), 114 unsigned long reg1, reg2; local 120 " epsw %[reg1],%[reg2]\n" 122 " st %[reg2],4(%[psw_pgm])\n" 130 [reg2] "=&a" (reg2), [all...] |
/linux-master/drivers/mcb/ |
H A D | mcb-parse.c | 48 __le32 reg2; local 55 reg2 = readl(&gdd->reg2); 62 mdev->bar = GDD_BAR(reg2); 63 mdev->group = GDD_GRP(reg2); 64 mdev->inst = GDD_INS(reg2);
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H A D | mcb-internal.h | 67 __le32 reg2; member in struct:chameleon_gdd
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_pmdemand.c | 381 u32 reg1, reg2; local 396 reg2 = intel_de_read(i915, XELPDP_INITIATE_PMDEMAND_REQUEST(1)); 414 REG_FIELD_GET(XELPDP_PMDEMAND_CDCLK_FREQ_MASK, reg2); 416 REG_FIELD_GET(XELPDP_PMDEMAND_DDICLK_FREQ_MASK, reg2); 418 REG_FIELD_GET(XELPDP_PMDEMAND_SCALERS_MASK, reg2); 465 u32 *reg1, u32 *reg2, bool serialized) 503 update_reg(reg2, cdclk_freq_mhz, XELPDP_PMDEMAND_CDCLK_FREQ_MASK); 504 update_reg(reg2, ddiclk_max, XELPDP_PMDEMAND_DDICLK_FREQ_MASK); 505 update_reg(reg2, scalers, XELPDP_PMDEMAND_SCALERS_MASK); 506 update_reg(reg2, pll 463 intel_pmdemand_update_params(const struct intel_pmdemand_state *new, const struct intel_pmdemand_state *old, u32 *reg1, u32 *reg2, bool serialized) argument 519 u32 reg2, mod_reg2; local [all...] |
/linux-master/sound/pci/ice1712/ |
H A D | wm8776.c | 134 .reg2 = WM8776_REG_DACRVOL, 144 .reg2 = WM8776_REG_DACCTRL1, 160 .reg2 = WM8776_REG_HPRVOL, 178 .reg2 = WM8776_REG_HPRVOL, 205 .reg2 = WM8776_REG_PHASESWAP, 221 .reg2 = WM8776_REG_ADCRVOL, 231 .reg2 = WM8776_REG_ADCMUX, 488 val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2; 527 wm->ctl[n].reg1 == wm->ctl[n].reg2) { 534 wm->ctl[n].reg1 != wm->ctl[n].reg2) { [all...] |
H A D | wm8766.c | 35 .reg2 = WM8766_REG_DACR1, 46 .reg2 = WM8766_REG_DACR2, 57 .reg2 = WM8766_REG_DACR3, 218 val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2; 257 wm->ctl[n].reg1 == wm->ctl[n].reg2) { 264 wm->ctl[n].reg1 != wm->ctl[n].reg2) { 265 val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2; 269 snd_wm8766_write(wm, wm->ctl[n].reg2, val);
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/linux-master/drivers/media/tuners/ |
H A D | tda827x.c | 241 unsigned char reg2[2]; local 279 msg.buf = reg2; 281 reg2[0] = 0x80; 282 reg2[1] = 0; 285 reg2[0] = 0x60; 286 reg2[1] = 0xbf; 289 reg2[0] = 0x30; 290 reg2[1] = tuner_reg[4] + 0x80; 294 reg2[0] = 0x30; 295 reg2[ [all...] |
/linux-master/arch/x86/kernel/ |
H A D | uprobes.c | 339 u8 reg2; local 414 reg2 = 0xff; /* Fetch vex.vvvv */ 416 reg2 = insn->vex_prefix.bytes[2]; 424 reg2 = ((reg2 >> 3) & 0x7) ^ 0x7; 431 if (reg != 6 && reg2 != 6) { 432 reg2 = 6; 434 } else if (reg != 7 && reg2 != 7) { 435 reg2 = 7; 439 reg2 [all...] |
/linux-master/arch/s390/kvm/ |
H A D | intercept.c | 361 int reg1, reg2, rc; local 363 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 366 rc = guest_translate_address_with_key(vcpu, vcpu->run->s.regs.gprs[reg2], 367 reg2, &srcaddr, GACC_FETCH, 0); 407 int reg1, reg2, cc = 0, r = 0; local 414 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 416 addr = vcpu->run->s.regs.gprs[reg2]; 422 if (reg1 == reg2 || reg1 & 1 || reg2 & 1) 448 r = write_guest(vcpu, addr, reg2, sctn [all...] |
H A D | priv.c | 260 int reg1, reg2; local 273 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 275 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 307 int reg1, reg2; local 320 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 322 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 358 int reg1, reg2; local 378 kvm_s390_get_regs_rre(vcpu, ®1, ®2); 381 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; 430 vcpu->run->s.regs.gprs[reg2] 453 int reg2; local 1015 int reg1, reg2; local 1045 int reg1, reg2; local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn201/ |
H A D | irq_service_dcn201.c | 152 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 160 .ack_reg = SRI(reg2, block, reg_num),\ 162 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 164 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn303/ |
H A D | irq_service_dcn303.c | 138 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 145 .ack_reg = SRI(reg2, block, reg_num),\ 146 .ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 147 .ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
H A D | irq_service_dcn10.c | 200 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 208 .ack_reg = SRI(reg2, block, reg_num),\ 210 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 212 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dce120/ |
H A D | irq_service_dce120.c | 103 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 111 .ack_reg = SRI(reg2, block, reg_num),\ 113 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 115 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
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/linux-master/drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
H A D | irq_service_dcn20.c | 203 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ 211 .ack_reg = SRI(reg2, block, reg_num),\ 213 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\ 215 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
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/linux-master/sound/pci/ |
H A D | ak4531_codec.c | 198 #define AK4531_INPUT_SW(xname, xindex, reg1, reg2, left_shift, right_shift) \ 202 .private_value = reg1 | (reg2 << 8) | (left_shift << 16) | (right_shift << 24) } 217 int reg2 = (kcontrol->private_value >> 8) & 0xff; local 223 ucontrol->value.integer.value[1] = (ak4531->regs[reg2] >> left_shift) & 1; 225 ucontrol->value.integer.value[3] = (ak4531->regs[reg2] >> right_shift) & 1; 234 int reg2 = (kcontrol->private_value >> 8) & 0xff; local 242 val2 = ak4531->regs[reg2] & ~((1 << left_shift) | (1 << right_shift)); 247 change = val1 != ak4531->regs[reg1] || val2 != ak4531->regs[reg2]; 249 ak4531->write(ak4531, reg2, ak4531->regs[reg2] [all...] |