/linux-master/drivers/soc/fujitsu/ |
H A D | a64fx-diag.c | 44 mmsc = readl(diag_status_reg_addr); 55 mmsc = readl(diag_enable_reg_addr); 68 mmsc = readl(diag_enable_reg_addr);
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/linux-master/drivers/usb/dwc3/ |
H A D | dwc3-rtk.c | 70 val = ~USB2_PHY_SWITCH_MASK & readl(reg); 212 val = readl(reg); 219 val = readl(reg); 225 val = readl(reg); 232 val = readl(reg); 236 val = readl(reg); 240 val = ~CLOCK_ENABLE_FOR_PIPE3_PCLK & readl(reg); 244 val = readl(reg); 248 val = readl(reg); 256 val = readl(re [all...] |
/linux-master/drivers/usb/cdns3/ |
H A D | host.c | 38 value = readl(&xhci->op_regs->command); 43 value = readl(hcd->regs + XECP_AUX_CTRL_REG1); 47 value = readl(hcd->regs + XECP_PORT_CAP_REG);
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/linux-master/drivers/bus/ |
H A D | stm32_etzpc.c | 58 sec_val = (readl(ctrl->mmio + reg_offset) >> offset) & ETZPC_PROT_MASK; 99 readl(etzpc_controller->mmio + ETZPC_HWCFGR)); 101 readl(etzpc_controller->mmio + ETZPC_HWCFGR));
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/linux-master/drivers/ata/ |
H A D | ahci_tegra.c | 188 val = readl(tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); 210 val = readl(tegra->sata_regs + 219 val = readl(tegra->sata_regs + 314 val = readl(tegra->sata_regs + SATA_FPCI_BAR5); 320 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0); 336 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0); 341 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB); 353 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2); 365 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1); 373 val = readl(tegr [all...] |
H A D | libahci.c | 216 tmp = readl(mmio + HOST_CTL); 226 tmp = readl(mmio + HOST_CTL); /* flush && sanity check */ 299 ret = sprintf(buf, "%x\n", readl(port_mmio + PORT_CMD)); 321 em_ctl = readl(mmio + HOST_EM_CTL); 351 msg = readl(em_mmio + i); 387 em_ctl = readl(mmio + HOST_EM_CTL); 418 em_ctl = readl(mmio + HOST_EM_CTL); 467 cap = readl(mmio + HOST_CAP); 473 vers = readl(mmio + HOST_VERSION); 476 hpriv->saved_cap2 = cap2 = readl(mmi [all...] |
/linux-master/drivers/spi/ |
H A D | spi-intel.c | 194 dev_dbg(ispi->dev, "BFPREG=0x%08x\n", readl(ispi->base + BFPREG)); 196 value = readl(ispi->base + HSFSTS_CTL); 201 dev_dbg(ispi->dev, "FADDR=0x%08x\n", readl(ispi->base + FADDR)); 202 dev_dbg(ispi->dev, "DLOCK=0x%08x\n", readl(ispi->base + DLOCK)); 206 i, readl(ispi->base + FDATA(i))); 208 dev_dbg(ispi->dev, "FRACC=0x%08x\n", readl(ispi->base + FRACC)); 212 readl(ispi->base + FREG(i))); 215 readl(ispi->pregs + PR(i))); 218 value = readl(ispi->sregs + SSFSTS_CTL); 221 readl(isp [all...] |
/linux-master/drivers/edac/ |
H A D | xgene_edac.c | 68 *val = readl(edac->pcp_csr + reg); 77 val = readl(edac->pcp_csr + reg); 89 val = readl(edac->pcp_csr + reg); 193 reg = readl(ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE); 208 bank = readl(ctx->mcu_csr + MCUEBLRR0 + 210 col_row = readl(ctx->mcu_csr + MCUERCRR0 + 212 count = readl(ctx->mcu_csr + MCUSBECNT0 + 234 reg = readl(ctx->mcu_csr + MCUGESR); 281 val = readl(ctx->mcu_csr + MCUGECR); 289 val = readl(ct [all...] |
/linux-master/drivers/hsi/controllers/ |
H A D | omap_ssi_port.c | 60 readl(base + SSI_WAKE_REG(port->num))); 62 readl(base + SSI_MPU_ENABLE_REG(port->num, 0))); 64 readl(base + SSI_MPU_STATUS_REG(port->num, 0))); 69 readl(base + SSI_SST_ID_REG)); 71 readl(base + SSI_SST_MODE_REG)); 73 readl(base + SSI_SST_FRAMESIZE_REG)); 75 readl(base + SSI_SST_DIVISOR_REG)); 77 readl(base + SSI_SST_CHANNELS_REG)); 79 readl(base + SSI_SST_ARBMODE_REG)); 81 readl(bas [all...] |
/linux-master/drivers/net/ethernet/cortina/ |
H A D | gemini.c | 232 reg = readl(port->gmac_base + GMAC_CONFIG0); 247 reg = readl(port->gmac_base + GMAC_CONFIG0); 262 val = readl(port->gmac_base + GMAC_CONFIG0); 279 val = readl(port->gmac_base + GMAC_CONFIG0); 298 status.bits32 = readl(port->gmac_base + GMAC_STATUS); 517 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0); 524 readl(port->dma_base + GMAC_AHB_WEIGHT_REG); 770 rw.bits32 = readl(ptr_reg); 883 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG); 961 qt.bits32 = readl(get [all...] |
/linux-master/drivers/net/ethernet/chelsio/cxgb/ |
H A D | tp.c | 73 u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE); 94 u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE); 135 cause = readl(tp->adapter->regs + A_TP_INT_CAUSE); 142 u32 val = readl(tp->adapter->regs + A_TP_GLOBAL_CONFIG);
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/linux-master/drivers/net/wireless/ralink/rt2x00/ |
H A D | rt2x00mmio.h | 24 return readl(rt2x00dev->csr.base + offset);
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/linux-master/drivers/misc/ibmasm/ |
H A D | uart.c | 30 if (0 == readl(iomem_base + UART_SCR)) {
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/linux-master/arch/arm/mach-alpine/ |
H A D | alpine_cpu_pm.c | 57 watermark = readl(&al_cpu_resume_regs->watermark);
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/linux-master/drivers/staging/sm750fb/ |
H A D | ddk750_chip.h | 18 return readl(addr + mmio750);
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/linux-master/arch/nios2/include/asm/ |
H A D | io.h | 22 #define readl_relaxed(addr) readl(addr)
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/linux-master/drivers/clocksource/ |
H A D | timer-meson6.c | 72 return (u64)readl(timer_base + MESON_ISA_TIMERE); 77 u32 val = readl(timer_base + MESON_ISA_TIMER_MUX); 90 u32 val = readl(timer_base + MESON_ISA_TIMER_MUX); 171 val = readl(timer_base + MESON_ISA_TIMER_MUX);
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H A D | clksrc-dbx500-prcmu.c | 62 if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) !=
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H A D | timer-imx-tpm.c | 43 val = readl(timer_base + TPM_C0SC); 53 val = readl(timer_base + TPM_C0SC); 66 return readl(timer_base + TPM_CNT); 199 counter_width = (readl(timer_base + TPM_PARAM)
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/linux-master/arch/mips/loongson2ef/lemote-2f/ |
H A D | clock.c | 45 regval = readl(LOONGSON_CHIPCFG);
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/linux-master/drivers/platform/mips/ |
H A D | ls2k-reset.c | 25 writel((readl(base + PM1_STS) & 0xffffffff), base + PM1_STS);
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/linux-master/drivers/clk/ |
H A D | clk-clps711x.c | 64 tmp = readl(base + CLPS711X_PLLR) >> 24; 70 tmp = readl(base + CLPS711X_SYSFLG2); 88 if (readl(base + CLPS711X_SYSCON2) & SYSCON2_OSTB) 95 tmp = readl(base + CLPS711X_SYSCON1);
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/linux-master/arch/arm/mach-omap1/ |
H A D | time.c | 77 return readl(&timer->read_tim); 84 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl); 91 writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl); 114 writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl);
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/linux-master/arch/arm/mach-bcm/ |
H A D | board_bcm281xx.c | 38 val = readl(base + SECWDOG_OFFSET);
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/linux-master/arch/arm/include/asm/ |
H A D | cputype.h | 159 return readl(BASEADDR_V7M_SCB + offset); 203 return readl(BASEADDR_V7M_SCB + V7M_SCB_CPUID); 208 return readl(BASEADDR_V7M_SCB + V7M_SCB_CTR); 213 return readl(BASEADDR_V7M_SCB + MPU_TYPE);
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