| /linux-master/drivers/clk/stm32/ |
| H A D | clk-stm32mp1.c | 327 const char * const *parent_names; member in struct:clock_config
450 return clk_hw_register_mux(dev, cfg->name, cfg->parent_names,
600 init.parent_names = &parent_name;
626 const char *name, const char * const *parent_names,
675 return clk_hw_register_composite(dev, name, parent_names, num_parents,
898 const char * const *parent_names,
917 init.parent_names = parent_names;
1053 init.parent_names = &parent_name;
1119 return clk_register_pll(dev, cfg->name, cfg->parent_names,
625 clk_stm32_register_composite(struct device *dev, const char *name, const char * const *parent_names, const struct clk_parent_data *parent_data, int num_parents, void __iomem *base, const struct stm32_composite_cfg *cfg, unsigned long flags, spinlock_t *lock) argument
897 clk_register_pll(struct device *dev, const char *name, const char * const *parent_names, int num_parents, void __iomem *reg, void __iomem *mux_reg, unsigned long flags, spinlock_t *lock) argument
[all...] |
| /linux-master/drivers/clk/davinci/ |
| H A D | pll.c | 239 const char * const *parent_names = parent_name ? &parent_name : NULL; local
269 clk = clk_register_composite(dev, name, parent_names, num_parents,
450 init.parent_names = &parent_name;
503 init.parent_names = &parent_name;
615 clk = clk_register_composite(dev, info->name, info->parent_names,
|
| /linux-master/arch/mips/alchemy/common/ |
| H A D | clock.c | 162 id.parent_names = &parent_name;
253 id.parent_names = &parent_name;
761 id.parent_names = alchemy_clk_fgv1_parents;
766 id.parent_names = alchemy_clk_fgv2_parents;
966 id.parent_names = alchemy_clk_csrc_parents;
|
| /linux-master/drivers/clk/imx/ |
| H A D | clk-sscg-pll.c | 501 const char * const *parent_names,
525 init.parent_names = parent_names;
500 imx_clk_hw_sscg_pll(const char *name, const char * const *parent_names, u8 num_parents, u8 parent, u8 bypass1, u8 bypass2, void __iomem *base, unsigned long flags) argument
|
| H A D | clk-imx93.c | 38 static const char *parent_names[MAX_SEL][4] = { variable
318 parent_names[root->sel],
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| H A D | clk-pllv2.c | 259 init.parent_names = &parent;
|
| H A D | clk-frac-pll.c | 221 init.parent_names = &parent_name;
|
| /linux-master/arch/arm/mach-ep93xx/ |
| H A D | clock.c | 142 init.parent_names = (parent_name ? &parent_name : NULL);
339 init.parent_names = mux_parents;
443 init.parent_names = (parent_name ? &parent_name : NULL);
|
| /linux-master/drivers/clk/mmp/ |
| H A D | clk-mix.c | 441 const char * const *parent_names,
458 init.parent_names = parent_names;
439 mmp_clk_register_mix(struct device *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, struct mmp_clk_mix_config *config, spinlock_t *lock) argument
|
| H A D | clk.h | 102 const char * const *parent_names,
|
| /linux-master/drivers/clk/ |
| H A D | clk-xgene.c | 140 init.parent_names = parent_name ? &parent_name : NULL;
356 init.parent_names = parent_name ? &parent_name : NULL;
641 init.parent_names = parent_name ? &parent_name : NULL;
|
| H A D | clk-nomadik.c | 278 init.parent_names = (parent_name ? &parent_name : NULL);
370 init.parent_names = (parent_name ? &parent_name : NULL);
|
| /linux-master/drivers/clk/st/ |
| H A D | clk-flexgen.c | 207 const char **parent_names, u8 num_parents,
223 init.parent_names = parent_names;
206 clk_register_flexgen(const char *name, const char **parent_names, u8 num_parents, void __iomem *reg, spinlock_t *lock, u32 idx, unsigned long flexgen_flags, bool mode) argument
|
| /linux-master/drivers/clk/rockchip/ |
| H A D | clk-pll.c | 1058 const char *name, const char *const *parent_names,
1105 pll_parents[0] = parent_names[0];
1107 pll_parents[2] = parent_names[1];
1112 init.parent_names = pll_parents;
1128 init.parent_names = &parent_names[0];
1056 rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, enum rockchip_pll_type pll_type, const char *name, const char *const *parent_names, u8 num_parents, int con_offset, int grf_lock_offset, int lock_shift, int mode_offset, int mode_shift, struct rockchip_pll_rate_table *rate_table, unsigned long flags, u8 clk_pll_flags) argument
|
| /linux-master/drivers/clocksource/ |
| H A D | ingenic-sysost.c | 194 .parent_names = ingenic_ost_clk_parents,
205 .parent_names = ingenic_ost_clk_parents,
|
| /linux-master/drivers/irqchip/ |
| H A D | irq-loongson-liointc.c | 176 static const char *const parent_names[] = {"int0", "int1", "int2", "int3"}; variable
346 parent_irq[i] = of_irq_get_byname(node, parent_names[i]);
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| /linux-master/drivers/clk/at91/ |
| H A D | clk-peripheral.c | 120 init.parent_names = &parent_name;
471 init.parent_names = &parent_name;
|
| /linux-master/drivers/clk/renesas/ |
| H A D | rcar-gen3-cpg.c | 134 init.parent_names = &parent_name;
286 init.parent_names = &parent_name;
|
| H A D | rcar-gen4-cpg.c | 159 init.parent_names = &parent_name;
305 init.parent_names = &parent_name;
|
| /linux-master/drivers/phy/rockchip/ |
| H A D | phy-rockchip-usb.c | 255 init.parent_names = &clk_name;
259 init.parent_names = NULL;
|
| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-pll.c | 318 init.parent_names = &data->parent_name;
320 init.parent_names = &parent_name;
|
| /linux-master/drivers/gpu/drm/sun4i/ |
| H A D | sun4i_hdmi_tmds_clk.c | 223 init.parent_names = parents;
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| /linux-master/drivers/clk/keystone/ |
| H A D | gate.c | 178 init.parent_names = (parent_name ? &parent_name : NULL);
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| /linux-master/drivers/clk/sunxi/ |
| H A D | clk-sun4i-tcon-ch1.c | 255 init.parent_names = parents;
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| /linux-master/drivers/clk/tegra/ |
| H A D | clk-tegra20-emc.c | 266 init.parent_names = emc_parent_clk_names;
|