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3ea57048 |
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28-Jun-2023 |
Chancel Liu <chancel.liu@nxp.com> |
clk: imx93: Add PDM IPG clk The IPG clk and MCLK of PDM share the same control gate. Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20230628061724.2056520-2-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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a29b2fcc |
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11-Jul-2023 |
Geert Uytterhoeven <geert+renesas@glider.be> |
clk: imx93: Propagate correct error in imx93_clocks_probe() smatch reports: drivers/clk/imx/clk-imx93.c:294 imx93_clocks_probe() error: uninitialized symbol 'base'. Indeed, in case of an error, the wrong (yet uninitialized) variable is converted to an error code and returned. Fix this by propagating the error code in the correct variable. Fixes: e02ba11b45764705 ("clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe") Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/all/9c2acd81-3ad8-485d-819e-9e4201277831@kadam.mountain Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/all/202306161533.4YDmL22b-lkp@intel.com/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230711150812.3562221-1-geert+renesas@glider.be Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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e02ba11b |
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31-May-2023 |
Zhanhao Hu <zero12113@hust.edu.cn> |
clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe In function probe(), it returns directly without unregistered hws when error occurs. Fix this by adding 'goto unregister_hws;' on line 295 and line 310. Use devm_kzalloc() instead of kzalloc() to automatically free the memory using devm_kfree() when error occurs. Replace of_iomap() with devm_of_iomap() to automatically handle the unused ioremap region and delete 'iounmap(anatop_base);' in unregister_hws. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Signed-off-by: Zhanhao Hu <zero12113@hust.edu.cn> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230601033825.336558-1-zero12113@hust.edu.cn Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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#
6b60c3ae |
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03-Apr-2023 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: imx93: Add nic and A55 clk The A55 clock logic as below: A55_PLL ----------------->\ A55_SEL-->A55_CORE A55_CCM_ROOT--->A55_GATE->/ Add A55 CPU clk to support freq change. Add NIC CLK to reflect the clk status Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230403095300.3386988-8-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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#
a740d735 |
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03-Apr-2023 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: imx93: add mcore_booted module paratemter Add mcore_booted boot parameter which could simplify AMP clock management. To i.MX93, there is CCM(clock control Module) to generate clock root clock, anatop(analog PLL module) to generate PLL, and LPCG (clock gating) to gate clocks to peripherals. As below: anatop->ccm->lpcg->peripheral Linux handles the clock management and the auxiliary core is under control of Linux. Although there is per hardware domain control for LPCG and CCM, auxiliary core normally only use LPCG hardware domain control to avoid linux gate off the clk to peripherals and leave CCM ana anatop to Linux. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230403095300.3386988-6-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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#
8cdaad71 |
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04-Jan-2023 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: imx93: invoke imx_register_uart_clocks Invoke imx_register_uart_clocks to keep uart clk on when earlycon specified. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230104110032.1220721-5-peng.fan@oss.nxp.com
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#
8178e245 |
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13-Nov-2022 |
Dario Binacchi <dario.binacchi@amarulasolutions.com> |
clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name() The imx_obtain_fixed_clk_hw name was wrong and misleading. Renaming it to imx_get_clk_hw_by_name clarifies the purpose of the function, and will allow it to be used not only for fixed rate clocks but also in wider contexts. No functional changes intended. The replacements were made with the following command: grep -rl 'imx_obtain_fixed_clk_hw' ./ | \ xargs sed -i 's/imx_obtain_fixed_clk_hw/imx_get_clk_hw_by_name/g' Tested on a BSH SystemMaster (SMM) S2 board. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20221113180839.1625832-1-dario.binacchi@amarulasolutions.com
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#
f8aa5f6d |
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28-Oct-2022 |
Jacky Bai <ping.bai@nxp.com> |
clk: imx93: keep sys ctr clock always on Keep sys ctr clock always on to make sure its register can be accessed for cpuidle. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20221028095211.2598312-7-peng.fan@oss.nxp.com
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#
c9dcb4c1 |
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28-Oct-2022 |
Jacky Bai <ping.bai@nxp.com> |
clk: imx: keep hsio bus clock always on During Linux System suspend/resume stress test after System Sleep enabled, system will stuck sometimes. It is because NICMIX is powered down, which HSIOMIX(always on) is not powered down. When NICMIX powering down, HSIOMIX will get a hardware handshake, without HSIO ROOT clk, the handshake will lose. Then after NICMIX power on when system resume, the access to HSIOMIX through NICMIX would be broken. So keep HSIO ROOT always on. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20221028095211.2598312-6-peng.fan@oss.nxp.com
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#
4ec9a8b9 |
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28-Oct-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: drop tpm1/3, lpit1/2 clk Per Reference Mannual System Clocks Table, LPIT1 and TPM1 sources from bus_aon_root LPIT2 and TPM3 sources from bus_wakeup_root So update driver to reflect that. Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20221028095211.2598312-5-peng.fan@oss.nxp.com
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#
4be5d91b |
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28-Oct-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: correct enet clock Per update Reference Mannual, correct the enet clock parent to wakeup_axi_root. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20221028095211.2598312-3-peng.fan@oss.nxp.com
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#
bda7b7f3 |
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28-Oct-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: unmap anatop base in error handling path The anatop base is not unmapped during error handling path, fix it. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20221028095211.2598312-2-peng.fan@oss.nxp.com
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#
62dfdbcc |
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23-Oct-2022 |
Haibo Chen <haibo.chen@nxp.com> |
clk: imx93: correct the flexspi1 clock setting Correct IMX93_CLK_FLEXSPI1_GATE CCGR setting. Otherwise the flexspi always can't be assigned to a parent clock when dump the clock tree. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/1666589199-1199-1-git-send-email-haibo.chen@nxp.com
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#
67e16ac1 |
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29-Aug-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: add SAI IPG clk The clk topology is as below: bus_aon_root------>\ /--->SAI IPG -->SAI LPCG gate--> sai[x]_clk_root--->/ \--->SAI MCLK So use shared count as i.MX93 MU_B gate. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-9-peng.fan@oss.nxp.com
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92d1496f |
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29-Aug-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: add MU1/2 clock The clk tree should be as: bus_aon_root------>\ /--->MU1_B IP -->MU_B gate--> bus_wakeup_root--->/ \--->MU2_B IP bus_aon_root------>\ /--->MU1_A IP -->MU_A gate--> bus_wakeup_root--->/ \--->MU2_A IP So need use shared count gate. And linux use MU_B, so set MU_A clk as CLK_IGNORE_UNUSED. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-8-peng.fan@oss.nxp.com
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#
d91012fa |
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29-Aug-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: switch to use new clk gate API Use i.MX93 specific clk gate API Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-7-peng.fan@oss.nxp.com
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2b66f02e |
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29-Aug-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: clk-composite-93: check white_list The CCM ROOT AUTHEN register WHITE_LIST indicate: Each bit in this field represent for one domain. Bit16~Bit31 represent for DOMAIN0~DOMAIN15 respectively. Only corresponding bit of the domains is set to 1 can change the registers of this Clock Root. i.MX93 DID is 3, so if BIT(3 + WHITE_LIST_SHIFT) is 0, the clk should be set to read only. To make the imx93_clk_composite_flags be reusable, add a new parameter named did(domain id); Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220830033137.4149542-5-peng.fan@oss.nxp.com
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#
daaa2fbe |
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29-Aug-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: drop of_match_ptr There is build warning when CONFIG_OF is not selected. >> drivers/clk/imx/clk-imx93.c:324:34: warning: 'imx93_clk_of_match' >> defined but not used [-Wunused-const-variable=] 324 | static const struct of_device_id imx93_clk_of_match[] = { | ^~~~~~~~~~~~~~~~~~ The driver only support DT table, no sense to use of_match_ptr. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220830033137.4149542-3-peng.fan@oss.nxp.com Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
ebb4f1eb |
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09-Jun-2022 |
Jacky Bai <ping.bai@nxp.com> |
clk: imx93: Correct the edma1's parent clock For EDMA1 in AONMIX, its parent clock should be from cm33_root, so Correct it. Fixes: 24defbe194b65("clk: imx: add i.MX93 clk") Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220609132902.3504651-4-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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#
1e3c837a |
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09-Jun-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx93: correct nic_media parent NIC_MEDIA sources from media_axi_root, not media_apb_root. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220609132902.3504651-3-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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#
18d6d8fe |
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09-Jun-2022 |
Haibo Chen <haibo.chen@nxp.com> |
clk: imx93: use adc_root as the parent clock of adc1 When debug, find after system boot up, all adc register operation will trigger system hang, this is because the internal adc ipg clock is gate off. In dts, only reference the IMX93_CLK_ADC1_GATE, which is adc1, no one touch the adc_root, so adc_root will be gate off automatically after system boot up. Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20220609132902.3504651-2-peng.fan@oss.nxp.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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#
24defbe194 |
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27-Feb-2022 |
Peng Fan <peng.fan@nxp.com> |
clk: imx: add i.MX93 clk Add i.MX93 clk driver. i.MX93 clk hardware design is different compared with i.MX8M. It supports 4 sources for each clk root and the sources are separated into a few groups, low speed/fast io/audio and etc. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228020908.2810346-6-peng.fan@oss.nxp.com [abel.vesa@nxp.com: Added missing module license and description] Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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