| /linux-master/arch/arm/lib/ |
| H A D | memmove.S | 158 orr lr, lr, ip, lspull #\pull
160 orr ip, ip, r10, lspull #\pull
162 orr r10, r10, r9, lspull #\pull
164 orr r9, r9, r8, lspull #\pull
166 orr r8, r8, r6, lspull #\pull
168 orr r6, r6, r5, lspull #\pull
170 orr r5, r5, r4, lspull #\pull
172 orr r4, r4, r3, lspull #\pull
186 orr lr, lr, r3, lspull #\pull
|
| H A D | io-readsw-armv4.S | 12 orr \rd, \hw1, \hw2, lsl #16
14 orr \rd, \hw2, \hw1, lsl #16
111 orr ip, ip, r3, lsl #8
112 orr ip, ip, r4, push_hbyte0
|
| H A D | getuser.S | 58 orr r2, r2, rb, lsl #8
60 orr r2, rb, r2, lsl #8
125 orr r3, rb, r3, lsl #8
|
| H A D | copy_template.S | 208 orr r3, r3, r4, lspush #\push
210 orr r4, r4, r5, lspush #\push
212 orr r5, r5, r6, lspush #\push
214 orr r6, r6, r8, lspush #\push
216 orr r8, r8, r9, lspush #\push
218 orr r9, r9, r10, lspush #\push
220 orr r10, r10, ip, lspush #\push
222 orr ip, ip, lr, lspush #\push
236 orr r3, r3, lr, lspush #\push
|
| /linux-master/arch/arm/mach-tegra/ |
| H A D | reset-handler.S | 53 orr r1, r1, \
68 orr r1, r1, #1
158 orr r0, r0, #1 << 14 @ erratum 716044
161 orr r0, r0, #1 << 4 @ erratum 742230
162 orr r0, r0, #1 << 11 @ erratum 751472
174 orr r0, r0, #1 << 6 @ erratum 743622
175 orr r0, r0, #1 << 11 @ erratum 751472
268 orr r0, r0, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
269 orr r0, r0, #FLOW_CTRL_CSR_ENABLE
|
| /linux-master/arch/arm/mm/ |
| H A D | proc-v6.S | 107 ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP)
108 ALT_UP(orr r0, r0, #TTB_FLAGS_UP)
116 orr r1, r1, r2 @ insert into new context ID
171 ALT_SMP(orr r1, r1, #TTB_FLAGS_SMP)
172 ALT_UP(orr r1, r1, #TTB_FLAGS_UP)
208 orr r0, r0, #0x20
220 ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP)
221 ALT_UP(orr r4, r4, #TTB_FLAGS_UP)
222 ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP)
223 ALT_UP(orr r
[all...] |
| H A D | abort-macro.S | 36 orr \tmp, #0x000000f0
|
| H A D | proc-arm740.S | 91 orr r0, r0, r4, lsl #1 @ the area register value
92 orr r0, r0, #1 @ set enable bit
104 orr r0, r0, r4, lsl #1 @ the area register value
105 orr r0, r0, #1 @ set enable bit
124 orr r0, r0, #0x0000000d @ MPU/Cache/WB
|
| /linux-master/arch/arm/mach-spear/ |
| H A D | headsmp.S | 33 orr r0, r0, #(1 << 6) | (1 << 0)
|
| /linux-master/arch/arm/mach-imx/ |
| H A D | headsmp.S | 31 orr r1, #0x7
|
| H A D | suspend-imx6.S | 119 orr r6, r6, #(1 << 31)
128 orr r6, r6, #(1 << 31)
194 orr r7, r7, #0x1
199 orr r7, r7, #(1 << 21)
261 orr r10, r10, #(0x20 << 21)
266 orr r10, r10, #(0x1 << 27)
|
| H A D | suspend-imx53.S | 63 orr r2, r2, #M4IF_MCR0_FDVFS
86 orr r7, r7, r6
|
| /linux-master/arch/arm/kernel/ |
| H A D | sleep.S | 44 ARM( orr \dst, \dst, \mask, lsr \rs1 ) @ dst|=(aff1>>rs1)
46 THUMB( orr \dst, \dst, \mask )
48 ARM( orr \dst, \dst, \mask, lsr \rs2 ) @ dst|=(aff2>>rs2)
50 THUMB( orr \dst, \dst, \mask )
|
| /linux-master/arch/arm/mach-socfpga/ |
| H A D | self-refresh.S | 50 orr r2, r2, #1
55 orr r2, r2, #SELFRSHREQ_MASK
|
| /linux-master/arch/arm64/lib/ |
| H A D | tishift.S | 19 orr x1, x1, x3
41 orr x0, x0, x3
63 orr x0, x0, x3
|
| /linux-master/arch/arm/mach-pxa/ |
| H A D | sleep.S | 60 orr r5, r5, #MDREFR_SLFRSH
64 orr r5, r5, r6
101 orr r5, r5, #MDREFR_SLFRSH
118 orr r7, r7, #(1<<5) | (2<<7)
133 orr r0, r0, #2 @ initiate change bit
|
| /linux-master/arch/arm/include/asm/ |
| H A D | uaccess-asm.h | 77 orr \tmp, \tmp, #TTBCR_EPD0 | TTBCR_T0SZ_MASK
78 orr \tmp, \tmp, #TTBCR_A1
144 orr \tmp2, \tmp2, #domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT)
|
| /linux-master/arch/arm/crypto/ |
| H A D | poly1305-armv4.pl | 100 orr r4,r4,r5,lsl#8
102 orr r4,r4,r6,lsl#16
104 orr r4,r4,r7,lsl#24
117 orr r5,r5,r6,lsl#8
119 orr r5,r5,r7,lsl#16
121 orr r5,r5,r8,lsl#24
133 orr r11,r11,#1 @ thumb-ify addresses
134 orr r12,r12,#1
143 orr r6,r6,r7,lsl#8
145 orr r
[all...] |
| /linux-master/arch/arm64/kernel/ |
| H A D | sleep.S | 45 orr \dst, \dst, \mask // dst|=(aff1>>rs1)
48 orr \dst, \dst, \mask // dst|=(aff2>>rs2)
51 orr \dst, \dst, \mask // dst|=(aff3>>rs3)
|
| /linux-master/arch/arm/include/debug/ |
| H A D | omap2plus.S | 64 orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
67 orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
|
| H A D | sa1100.S | 45 orr \rv, \rp, #0xf8000000 @ virtual
46 orr \rp, \rp, #0x80000000 @ physical
|
| /linux-master/arch/arm64/include/asm/ |
| H A D | asm_pointer_auth.h | 65 orr \tmp1, \tmp1, \tmp2
70 orr \tmp2, \tmp2, \tmp1
|
| /linux-master/arch/arm/mach-mvebu/ |
| H A D | coherency_ll.S | 97 orr r2, r2, r3
122 orr r2, r2, r3
|
| /linux-master/arch/arm/mach-omap2/ |
| H A D | sram242x.S | 52 orr r10, r10, #0x8 @ make sure DLL on (es2 bit pos)
53 orr r10, r10, #0x2 @ 90 degree phase for all below 133MHz
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
104 orr r5, r5, r3 @ build value for force
157 orr r3, r3, #0x3
159 orr r3, r3, r0 @ new state value
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
199 orr r8, r8, r7 @ build value for force
242 orr r7, r5, #0x2 @ fast relock val
272 orr r
[all...] |
| H A D | sram243x.S | 52 orr r10, r10, #0x8 @ make sure DLL on (es2 bit pos)
53 orr r10, r10, #0x2 @ 90 degree phase for all below 133MHz
101 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
104 orr r5, r5, r3 @ build value for force
157 orr r3, r3, #0x3
159 orr r3, r3, r0 @ new state value
196 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
199 orr r8, r8, r7 @ build value for force
242 orr r7, r5, #0x2 @ fast relock val
272 orr r
[all...] |