Searched refs:mux (Results 151 - 175 of 399) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/display/dc/gpio/
H A Dgpio_service.c163 struct gpio **mux)
165 if (!mux || !*mux) {
170 dal_gpio_destroy(mux);
171 kfree(*mux);
173 *mux = NULL;
218 struct gpio *mux,
229 return dal_gpio_set_config(mux, &config_data);
162 dal_gpio_destroy_generic_mux( struct gpio **mux) argument
217 dal_mux_setup_config( struct gpio *mux, struct gpio_generic_mux_config *config) argument
/linux-master/drivers/pinctrl/freescale/
H A Dpinctrl-imx1-core.c255 /* create mux map */
262 new_map[0].data.mux.function = parent->name;
263 new_map[0].data.mux.group = np->name;
278 (*map)->data.mux.function, (*map)->data.mux.group, map_num);
308 * Configure the mux mode for each pin in the group for a specific
320 unsigned int mux = pins[i].mux_id; local
322 unsigned int afunction = MX1_MUX_FUNCTION(mux);
323 unsigned int gpio_in_use = MX1_MUX_GPIO(mux);
324 unsigned int direction = MX1_MUX_DIR(mux);
[all...]
/linux-master/drivers/clk/sunxi-ng/
H A Dccu_mult.h41 struct ccu_mux_internal mux; member in struct:ccu_mult
/linux-master/drivers/clk/uniphier/
H A Dclk-uniphier-mio.c26 .data.mux = { \
/linux-master/drivers/clk/sunxi/
H A Dclk-sun9i-core.c122 .mux = 24,
177 .mux = 24,
203 .mux = 24,
260 .mux = 24,
H A Dclk-sun6i-ar100.c63 .mux = 16,
/linux-master/drivers/clk/ti/
H A DMakefile6 fixed-factor.o mux.o apll.o \
/linux-master/drivers/pinctrl/bcm/
H A Dpinctrl-bcm6328.c80 * to their mux offsets.
241 #define BCM6328_MUX_FUN(n, mux) \
246 .mux_val = mux, \
313 unsigned int mode, unsigned int mux)
321 mux << ((pin % 16) * 2));
312 bcm6328_rmw_mux(struct bcm63xx_pinctrl *pc, unsigned pin, unsigned int mode, unsigned int mux) argument
/linux-master/drivers/clk/ingenic/
H A Djz4755-cgu.c142 .mux = { CGU_REG_CPCCR, 29, 1 },
163 .mux = { CGU_REG_CPCCR, 31, 1 },
177 .mux = { CGU_REG_LPCDR, 31, 1 },
184 .mux = { CGU_REG_OPCR, 2, 1},
/linux-master/drivers/platform/chrome/
H A Dcros_ec_typec.h59 struct typec_mux *mux; member in struct:cros_typec_port
/linux-master/kernel/irq/
H A DMakefile18 obj-$(CONFIG_GENERIC_IRQ_IPI_MUX) += ipi-mux.o
/linux-master/drivers/clk/tegra/
H A Dclk-periph.c18 struct clk_hw *mux_hw = &periph->mux.hw;
29 struct clk_hw *mux_hw = &periph->mux.hw;
199 periph->mux.reg = clk_base + offset;
209 periph->mux.hw.clk = clk;
/linux-master/drivers/i2c/
H A DMakefile15 obj-$(CONFIG_I2C_MUX) += i2c-mux.o
/linux-master/drivers/pwm/
H A Dpwm-lp3943.c136 const struct lp3943_reg_cfg *mux = lp3943->mux_cfg; local
141 err = lp3943_update_bits(lp3943, mux[index].reg,
142 mux[index].mask,
143 val << mux[index].shift);
H A Dpwm-meson.c93 struct clk_mux mux; member in struct:meson_pwm_channel
262 * Instead we achieve this by setting mux parent with
354 snprintf(name, sizeof(name), "%s#mux%u", dev_name(dev), i);
362 channel->mux.reg = meson->base + REG_MISC_AB;
363 channel->mux.shift =
365 channel->mux.mask = MISC_CLK_SEL_MASK;
366 channel->mux.flags = 0;
367 channel->mux.lock = &meson->lock;
368 channel->mux.table = NULL;
369 channel->mux
[all...]
/linux-master/arch/powerpc/platforms/52xx/
H A Dmpc52xx_common.c243 u32 mux; local
273 mux = in_be32(&simple_gpio->port_config);
274 out_be32(&simple_gpio->port_config, mux & (~gpio));
298 out_be32(&simple_gpio->port_config, mux);
/linux-master/drivers/media/platform/
H A Dvideo-mux.c3 * video stream multiplexer controlled via mux control
12 #include <linux/mux/consumer.h>
27 struct mux_control *mux; member in struct:video_mux
60 * The mux state is determined by the enabled sink pad link.
85 ret = mux_control_try_select(vmux->mux, local->index);
102 mux_control_deselect(vmux->mux);
124 dev_err(sd->dev, "Can not start streaming on inactive mux\n");
427 vmux->mux = devm_mux_control_get(dev, NULL);
428 if (IS_ERR(vmux->mux)) {
429 ret = PTR_ERR(vmux->mux);
[all...]
/linux-master/drivers/clk/
H A Dclk-stm32f4.c1060 struct clk_mux *mux; local
1068 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
1069 if (!mux) {
1080 mux->reg = reg;
1081 mux->shift = shift;
1082 mux->mask = 3;
1083 mux->flags = 0;
1086 &mux->hw, &cclk_mux_ops,
1093 kfree(mux);
1631 struct clk_mux *mux = NULL; local
[all...]
/linux-master/drivers/phy/ti/
H A Dphy-j721e-wiz.c19 #include <linux/mux/consumer.h>
44 /* To include mux clocks, divider clocks and gate clocks */
785 struct wiz_clk_mux *mux = to_wiz_clk_mux(hw); local
786 struct regmap_field *field = mux->field;
790 return clk_mux_val_to_index(hw, (u32 *)mux->table, 0, val);
795 struct wiz_clk_mux *mux = to_wiz_clk_mux(hw); local
796 struct regmap_field *field = mux->field;
799 val = mux->table[index];
816 struct wiz_clk_mux *mux; local
821 mux
877 struct wiz_clk_mux *mux; local
[all...]
/linux-master/drivers/clk/xilinx/
H A Dxlnx_vcu.c443 struct clk_hw *mux = NULL; local
460 mux = clk_hw_register_mux_parent_data(dev, name_mux,
464 if (IS_ERR(mux))
465 return mux;
472 divider = clk_hw_register_divider_parent_hw(dev, name_div, mux,
494 clk_hw_unregister_mux(mux);
503 struct clk_hw *mux; local
513 mux = clk_hw_get_parent(divider);
514 clk_hw_unregister_mux(mux);
/linux-master/drivers/clk/samsung/
H A Dclk-cpu.c12 * blocks which includes mux and divider blocks. There are a number of other
55 * @mux: offset of MUX register for choosing CPU clock source
66 u32 mux; member in struct:exynos_cpuclk_regs
140 * Helper function to wait until mux has stabilized after the mux selection
156 pr_err("%s: re-parenting mux timed-out\n", __func__);
411 /* Max time for divider or mux to stabilize, usec */
417 .mux = 0x100c,
422 .mux = 0x1000,
520 mux_reg = readl(base + regs->mux);
[all...]
/linux-master/drivers/leds/
H A Dleds-lp5523.c107 #define LED_ACTIVE(mux, led) (!!(mux & (0x0001 << led)))
446 static int lp5523_mux_parse(const char *buf, u16 *mux, size_t len) argument
467 *mux = tmp_mux;
488 char mux[LP5523_MAX_LEDS + 1]; local
490 lp5523_mux_to_array(chip->engines[nr - 1].led_mux, mux);
492 return sprintf(buf, "%s\n", mux);
498 static int lp5523_load_mux(struct lp55xx_chip *chip, u16 mux, int nr) argument
514 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM, (u8)(mux >> 8));
518 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + 1, (u8)(mux));
533 u16 mux = 0; local
[all...]
/linux-master/drivers/soc/ti/
H A Dpruss.c178 * @mux: pointer to store the current mux value into
182 int pruss_cfg_get_gpmux(struct pruss *pruss, enum pruss_pru_id pru_id, u8 *mux) argument
187 if (pru_id >= PRUSS_NUM_PRUS || !mux)
192 *mux = (u8)((val & PRUSS_GPCFG_PRU_MUX_SEL_MASK) >>
202 * @mux: new mux value for PRU
206 int pruss_cfg_set_gpmux(struct pruss *pruss, enum pruss_pru_id pru_id, u8 mux) argument
208 if (mux >= PRUSS_GP_MUX_SEL_MAX ||
214 (u32)mux << PRUSS_GPCFG_PRU_MUX_SEL_SHIF
[all...]
/linux-master/sound/soc/ti/
H A Domap-dmic.c282 struct clk *parent_clk, *mux; local
330 mux = clk_get_parent(dmic->fclk);
331 if (IS_ERR(mux)) {
332 dev_err(dmic->dev, "can't get fck mux parent\n");
341 ret = clk_set_parent(mux, parent_clk);
344 ret = clk_set_parent(mux, parent_clk);
357 clk_put(mux);
/linux-master/drivers/media/test-drivers/vidtv/
H A Dvidtv_bridge.c118 "Size for the internal mux buffer in multiples of 188 bytes");
155 * called on a separate thread by the mux when new packets become available
195 dvb->mux = vidtv_mux_init(dvb->fe[0], dev, &mux_args);
196 if (!dvb->mux)
198 vidtv_mux_start_thread(dvb->mux);
209 vidtv_mux_stop_thread(dvb->mux);
210 vidtv_mux_destroy(dvb->mux);
211 dvb->mux = NULL;

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