/linux-master/drivers/mmc/host/ |
H A D | mmci.h | 323 * @explicit_mclk_control: enable explicit mclk control in driver. 424 unsigned int mclk; member in struct:mmci_host
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/linux-master/sound/soc/codecs/ |
H A D | cs43130.h | 519 unsigned int mclk; member in struct:cs43130_private
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H A D | nau8325.h | 358 int mclk; member in struct:nau8325
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H A D | rt5631.c | 1210 u32 mclk; member in struct:coeff_clk_div 1340 static int get_coeff(int mclk, int rate, int timesofbclk) argument 1345 if (coeff_div[i].mclk == mclk && coeff_div[i].rate == rate &&
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H A D | wm8753.c | 791 u32 mclk; member in struct:_coeff_div 797 /* codec hifi mclk (after PLL) clock divider coefficients */ 847 static int get_coeff(int mclk, int rate) argument 852 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 1224 /* set clk source as mclk */
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H A D | adau1977.c | 778 static bool adau1977_check_sysclk(unsigned int mclk, unsigned int base_freq) argument 782 if (mclk % (base_freq * 128) != 0) 785 mcs = mclk / (128 * base_freq);
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H A D | tlv320aic32x4.c | 601 struct clk *mclk; local 608 mclk = clk_get_parent(pll); 610 return clk_set_rate(mclk, freq); 1223 ret = of_property_match_string(np, "clock-names", "mclk"); 1362 aic32x4->mclk_name = "mclk"; 1374 aic32x4->mclk_name = "mclk";
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H A D | wm8995.c | 380 int mclk[2]; member in struct:wm8995_priv 685 rate = wm8995->mclk[0]; 689 rate = wm8995->mclk[1]; 1926 wm8995->mclk[0] = freq; 1932 wm8995->mclk[1] = freq;
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H A D | cs42l43.c | 1443 ret = clk_prepare_enable(priv->mclk); 1456 clk_disable_unprepare(priv->mclk); 2320 priv->mclk = clk_get_optional(cs42l43->dev, "mclk"); 2321 if (IS_ERR(priv->mclk)) { 2322 ret = PTR_ERR(priv->mclk); 2323 dev_err_probe(priv->dev, ret, "Failed to get mclk\n"); 2340 clk_put(priv->mclk); 2351 clk_put(priv->mclk);
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H A D | rt5640.c | 1843 ret = clk_set_rate(rt5640->mclk, freq); 1953 clk_disable_unprepare(rt5640->mclk); 1955 ret = clk_prepare_enable(rt5640->mclk); 2661 rt5640->mclk = devm_clk_get_optional(component->dev, "mclk"); 2662 if (IS_ERR(rt5640->mclk)) 2663 return PTR_ERR(rt5640->mclk);
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H A D | nau8825.h | 500 struct clk *mclk; member in struct:nau8825 505 int mclk_freq; /* 0 - mclk is disabled */
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | process_pptables_v1_0.c | 352 limits->mclk = le32_to_cpu(limitable->entries[0].ulMCLKLimit); 850 hwmgr->dyn_state.max_clock_voltage_on_dc.mclk = 851 pp_table_information->max_clock_voltage_on_dc.mclk; 1355 vce_state->mclk = le32_to_cpu(mclk_dep_record->ulMclk);
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H A D | smu8_hwmgr.c | 269 table->mclk = sys_info->nbp_memory_clock[0]; 724 stable_pstate_sclk = (hwmgr->dyn_state.max_clock_voltage_on_ac.mclk * 1088 clocks.memoryClock = hwmgr->dyn_state.max_clock_voltage_on_ac.mclk; 1524 info->memory_max_clock = limits->mclk; 1694 clocks->memory_max_clock = limits->mclk;
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H A D | smu10_hwmgr.c | 1297 uint32_t sclk, mclk, activity_percent; local 1319 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency, &mclk); 1321 *((uint32_t *)value) = mclk * 100;
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H A D | vega10_processpptables.c | 836 limits->mclk = le32_to_cpu(limit_table->entries[0].ulMCLKLimit); 994 hwmgr->dyn_state.max_clock_voltage_on_dc.mclk = 995 pp_table_info->max_clock_voltage_on_dc.mclk;
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H A D | hwmgr.c | 246 (hwmgr->dyn_state.max_clock_voltage_on_dc.mclk == 0))
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/linux-master/drivers/media/i2c/ |
H A D | hi556.c | 1213 u32 mclk; local 1230 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); 1236 if (mclk != HI556_MCLK) { 1237 dev_err(dev, "external clock %d is not supported", mclk);
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H A D | ov2740.c | 1125 u32 mclk; local 1137 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); 1144 if (mclk != OV2740_MCLK) { 1148 mclk);
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/linux-master/drivers/ps3/ |
H A D | ps3av_cmd.c | 467 u8 mclk; member in struct:__anon458 483 return ps3av_cnv_mclk_table[i].mclk; 636 param->mclk = ps3av_cnv_mclk(audio_mode->audio_fs) | 0x80;
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/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/ |
H A D | si_dpm.h | 440 RV7XX_SMC_MCLK_VALUE mclk; member in struct:RV770_SMC_HW_PERFORMANCE_LEVEL 607 u32 mclk; member in struct:rv7xx_pl 767 NISLANDS_SMC_MCLK_VALUE mclk; member in struct:NISLANDS_SMC_HW_PERFORMANCE_LEVEL
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/linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
H A D | fiji_smumgr.c | 1143 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk) 1154 mclk->MclkFrequency = clock; 1155 mclk->MclkDivider = (uint8_t)mem_param.mpll_post_divider; 1156 mclk->FreqRange = fiji_get_mclk_frequency_ratio(clock); 1272 uint32_t mclk, SMIO_Pattern *smio_pat) 1282 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { 1142 fiji_calculate_mclk_params(struct pp_hwmgr *hwmgr, uint32_t clock, struct SMU73_Discrete_MemoryLevel *mclk) argument 1271 fiji_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, SMIO_Pattern *smio_pat) argument
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/linux-master/drivers/video/fbdev/ |
H A D | cirrusfb.c | 452 long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; local 455 mclk = (14318 * mclk) >> 3; 456 dev_dbg(info->device, "Read MCLK of %ld kHz\n", mclk); 462 if (abs(freq - mclk) < 250) { 465 } else if (abs(freq - (mclk / 2)) < 250) { 858 /* if freq is close to mclk or mclk/2 select mclk
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/linux-master/drivers/media/dvb-frontends/ |
H A D | stv0367.c | 45 u32 mclk; member in struct:stv0367cab_state 2297 cab_state->mclk = stv0367cab_get_mclk(fe, state->config->xtal); 2506 cab_state->mclk); 2569 cab_state->mclk, 2589 p->symbol_rate = stv0367cab_GetSymbolRate(state, cab_state->mclk); 2967 state->cab_state->mclk = stv0367cab_get_mclk(&state->fe,
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/linux-master/sound/soc/rockchip/ |
H A D | rockchip_i2s_tdm.c | 100 * This function attempts to enable all mclk clocks, but cleans up after 658 struct clk *mclk = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? local 661 err = clk_set_rate(mclk, DEFAULT_MCLK_FS * params_rate(params)); 665 mclk_rate = clk_get_rate(mclk);
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/linux-master/drivers/video/fbdev/aty/ |
H A D | radeonfb.h | 141 int sclk, mclk; member in struct:pll_info
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